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Lines Matching refs:priv

102 #define AVE_DESC_SIZE(priv, num) \  argument
103 ((num) * ((priv)->data->is_desc_64bit ? AVE_DESC_SIZE_64 : \
163 int (*get_pinmode)(struct ave_private *priv);
166 static u32 ave_desc_read(struct ave_private *priv, enum desc_id id, int entry, in ave_desc_read() argument
172 if (priv->data->is_desc_64bit) { in ave_desc_read()
182 return readl(priv->iobase + addr); in ave_desc_read()
185 static u32 ave_desc_read_cmdsts(struct ave_private *priv, enum desc_id id, in ave_desc_read_cmdsts() argument
188 return ave_desc_read(priv, id, entry, AVE_DESC_OFS_CMDSTS); in ave_desc_read_cmdsts()
191 static void ave_desc_write(struct ave_private *priv, enum desc_id id, in ave_desc_write() argument
197 if (priv->data->is_desc_64bit) { in ave_desc_write()
206 writel(val, priv->iobase + addr); in ave_desc_write()
209 static void ave_desc_write_cmdsts(struct ave_private *priv, enum desc_id id, in ave_desc_write_cmdsts() argument
212 ave_desc_write(priv, id, entry, AVE_DESC_OFS_CMDSTS, val); in ave_desc_write_cmdsts()
215 static void ave_desc_write_addr(struct ave_private *priv, enum desc_id id, in ave_desc_write_addr() argument
218 ave_desc_write(priv, id, entry, in ave_desc_write_addr()
220 if (priv->data->is_desc_64bit) in ave_desc_write_addr()
221 ave_desc_write(priv, id, entry, in ave_desc_write_addr()
240 struct ave_private *priv = bus->priv; in ave_mdiobus_read() local
245 writel((phyid << 8) | regnum, priv->iobase + AVE_MDIOAR); in ave_mdiobus_read()
248 mdioctl = readl(priv->iobase + AVE_MDIOCTR); in ave_mdiobus_read()
249 writel(mdioctl | AVE_MDIOCTR_RREQ, priv->iobase + AVE_MDIOCTR); in ave_mdiobus_read()
251 ret = readl_poll_timeout(priv->iobase + AVE_MDIOSR, mdiosr, in ave_mdiobus_read()
256 priv->phydev->dev->name, phyid, regnum); in ave_mdiobus_read()
260 return readl(priv->iobase + AVE_MDIORDR) & GENMASK(15, 0); in ave_mdiobus_read()
266 struct ave_private *priv = bus->priv; in ave_mdiobus_write() local
271 writel((phyid << 8) | regnum, priv->iobase + AVE_MDIOAR); in ave_mdiobus_write()
274 writel(val, priv->iobase + AVE_MDIOWDR); in ave_mdiobus_write()
277 mdioctl = readl(priv->iobase + AVE_MDIOCTR); in ave_mdiobus_write()
279 priv->iobase + AVE_MDIOCTR); in ave_mdiobus_write()
281 ret = readl_poll_timeout(priv->iobase + AVE_MDIOSR, mdiosr, in ave_mdiobus_write()
286 priv->phydev->dev->name, phyid, regnum); in ave_mdiobus_write()
291 static int ave_adjust_link(struct ave_private *priv) in ave_adjust_link() argument
293 struct phy_device *phydev = priv->phydev; in ave_adjust_link()
300 val = readl(priv->iobase + AVE_TXCR); in ave_adjust_link()
308 writel(val, priv->iobase + AVE_TXCR); in ave_adjust_link()
312 val = readl(priv->iobase + AVE_LINKSEL); in ave_adjust_link()
317 writel(val, priv->iobase + AVE_LINKSEL); in ave_adjust_link()
321 rxcr = readl(priv->iobase + AVE_RXCR); in ave_adjust_link()
322 txcr = readl(priv->iobase + AVE_TXCR); in ave_adjust_link()
354 writel(rxcr & ~AVE_RXCR_RXEN, priv->iobase + AVE_RXCR); in ave_adjust_link()
356 writel(txcr, priv->iobase + AVE_TXCR); in ave_adjust_link()
357 writel(rxcr, priv->iobase + AVE_RXCR); in ave_adjust_link()
367 static int ave_mdiobus_init(struct ave_private *priv, const char *name) in ave_mdiobus_init() argument
377 bus->priv = priv; in ave_mdiobus_init()
382 static int ave_phy_init(struct ave_private *priv, void *dev) in ave_phy_init() argument
387 phydev = phy_find_by_mask(priv->bus, mask, priv->phy_mode); in ave_phy_init()
394 if (priv->max_speed) { in ave_phy_init()
395 ret = phy_set_supported(phydev, priv->max_speed); in ave_phy_init()
401 priv->phydev = phydev; in ave_phy_init()
409 struct ave_private *priv = dev_get_priv(dev); in ave_stop() local
413 val = readl(priv->iobase + AVE_GRR); in ave_stop()
417 val = readl(priv->iobase + AVE_RXCR); in ave_stop()
419 writel(val, priv->iobase + AVE_RXCR); in ave_stop()
421 writel(0, priv->iobase + AVE_DESCC); in ave_stop()
422 ret = readl_poll_timeout(priv->iobase + AVE_DESCC, val, !val, in ave_stop()
425 pr_warn("%s: halt timeout\n", priv->phydev->dev->name); in ave_stop()
427 writel(AVE_GRR_GRST, priv->iobase + AVE_GRR); in ave_stop()
429 phy_shutdown(priv->phydev); in ave_stop()
432 static void ave_reset(struct ave_private *priv) in ave_reset() argument
437 val = readl(priv->iobase + AVE_RSTCTRL); in ave_reset()
439 writel(val, priv->iobase + AVE_RSTCTRL); in ave_reset()
442 writel(AVE_GRR_GRST | AVE_GRR_PHYRST, priv->iobase + AVE_GRR); in ave_reset()
446 writel(AVE_GRR_GRST, priv->iobase + AVE_GRR); in ave_reset()
450 writel(0, priv->iobase + AVE_GRR); in ave_reset()
454 val = readl(priv->iobase + AVE_RSTCTRL); in ave_reset()
456 writel(val, priv->iobase + AVE_RSTCTRL); in ave_reset()
461 struct ave_private *priv = dev_get_priv(dev); in ave_start() local
466 ave_reset(priv); in ave_start()
468 priv->rx_pos = 0; in ave_start()
469 priv->rx_off = 2; /* RX data has 2byte offsets */ in ave_start()
470 priv->tx_num = 0; in ave_start()
471 priv->tx_adj_buf = in ave_start()
472 (void *)roundup((uintptr_t)&priv->tx_adj_packetbuf[0], in ave_start()
474 priv->rx_siz = (PKTSIZE_ALIGN - priv->rx_off); in ave_start()
477 if (priv->phy_mode != PHY_INTERFACE_MODE_RGMII) in ave_start()
479 writel(val, priv->iobase + AVE_CFGR); in ave_start()
482 writel(AVE_DESC_SIZE(priv, 1) << 16, priv->iobase + AVE_TXDC); in ave_start()
483 ave_desc_write_cmdsts(priv, AVE_DESCID_TX, 0, 0); in ave_start()
484 ave_desc_write_addr(priv, AVE_DESCID_TX, 0, 0); in ave_start()
487 writel(AVE_DESC_SIZE(priv, PKTBUFSRX) << 16, priv->iobase + AVE_RXDC); in ave_start()
490 ave_cache_flush(paddr, priv->rx_siz + priv->rx_off); in ave_start()
491 ave_desc_write_addr(priv, AVE_DESCID_RX, i, paddr); in ave_start()
492 ave_desc_write_cmdsts(priv, AVE_DESCID_RX, i, priv->rx_siz); in ave_start()
495 writel(AVE_GISR_CLR, priv->iobase + AVE_GISR); in ave_start()
496 writel(AVE_GIMR_CLR, priv->iobase + AVE_GIMR); in ave_start()
499 priv->iobase + AVE_RXCR); in ave_start()
500 writel(AVE_DESCC_RD0 | AVE_DESCC_TD, priv->iobase + AVE_DESCC); in ave_start()
502 phy_startup(priv->phydev); in ave_start()
503 ave_adjust_link(priv); in ave_start()
510 struct ave_private *priv = dev_get_priv(dev); in ave_write_hwaddr() local
515 priv->iobase + AVE_RXMAC1R); in ave_write_hwaddr()
516 writel(mac[4] | mac[5] << 8, priv->iobase + AVE_RXMAC2R); in ave_write_hwaddr()
523 struct ave_private *priv = dev_get_priv(dev); in ave_send() local
530 memcpy(priv->tx_adj_buf, (const void *)ptr, length); in ave_send()
531 ptr = priv->tx_adj_buf; in ave_send()
543 val = ave_desc_read_cmdsts(priv, AVE_DESCID_TX, 0); in ave_send()
549 ave_desc_write_addr(priv, AVE_DESCID_TX, 0, (uintptr_t)ptr); in ave_send()
553 ave_desc_write_cmdsts(priv, AVE_DESCID_TX, 0, val); in ave_send()
554 priv->tx_num++; in ave_send()
558 val = ave_desc_read_cmdsts(priv, AVE_DESCID_TX, 0); in ave_send()
565 priv->phydev->dev->name, le32_to_cpu(val)); in ave_send()
572 struct ave_private *priv = dev_get_priv(dev); in ave_recv() local
578 cmdsts = ave_desc_read_cmdsts(priv, AVE_DESCID_RX, in ave_recv()
579 priv->rx_pos); in ave_recv()
584 ptr = net_rx_packets[priv->rx_pos] + priv->rx_off; in ave_recv()
589 priv->phydev->dev->name, priv->rx_pos, in ave_recv()
604 struct ave_private *priv = dev_get_priv(dev); in ave_free_packet() local
606 ave_cache_flush((uintptr_t)net_rx_packets[priv->rx_pos], in ave_free_packet()
607 priv->rx_siz + priv->rx_off); in ave_free_packet()
609 ave_desc_write_cmdsts(priv, AVE_DESCID_RX, in ave_free_packet()
610 priv->rx_pos, priv->rx_siz); in ave_free_packet()
612 if (++priv->rx_pos >= PKTBUFSRX) in ave_free_packet()
613 priv->rx_pos = 0; in ave_free_packet()
618 static int ave_pro4_get_pinmode(struct ave_private *priv) in ave_pro4_get_pinmode() argument
622 if (priv->regmap_arg > 0) in ave_pro4_get_pinmode()
627 switch (priv->phy_mode) { in ave_pro4_get_pinmode()
638 regmap_read(priv->regmap, SG_ETPINMODE, &reg); in ave_pro4_get_pinmode()
641 regmap_write(priv->regmap, SG_ETPINMODE, reg); in ave_pro4_get_pinmode()
646 static int ave_ld11_get_pinmode(struct ave_private *priv) in ave_ld11_get_pinmode() argument
650 if (priv->regmap_arg > 0) in ave_ld11_get_pinmode()
655 switch (priv->phy_mode) { in ave_ld11_get_pinmode()
665 regmap_read(priv->regmap, SG_ETPINMODE, &reg); in ave_ld11_get_pinmode()
668 regmap_write(priv->regmap, SG_ETPINMODE, reg); in ave_ld11_get_pinmode()
673 static int ave_ld20_get_pinmode(struct ave_private *priv) in ave_ld20_get_pinmode() argument
677 if (priv->regmap_arg > 0) in ave_ld20_get_pinmode()
682 switch (priv->phy_mode) { in ave_ld20_get_pinmode()
692 regmap_read(priv->regmap, SG_ETPINMODE, &reg); in ave_ld20_get_pinmode()
695 regmap_write(priv->regmap, SG_ETPINMODE, reg); in ave_ld20_get_pinmode()
700 static int ave_pxs3_get_pinmode(struct ave_private *priv) in ave_pxs3_get_pinmode() argument
704 if (priv->regmap_arg > 1) in ave_pxs3_get_pinmode()
707 mask = SG_ETPINMODE_RMII(priv->regmap_arg); in ave_pxs3_get_pinmode()
709 switch (priv->phy_mode) { in ave_pxs3_get_pinmode()
711 val = SG_ETPINMODE_RMII(priv->regmap_arg); in ave_pxs3_get_pinmode()
719 regmap_read(priv->regmap, SG_ETPINMODE, &reg); in ave_pxs3_get_pinmode()
722 regmap_write(priv->regmap, SG_ETPINMODE, reg); in ave_pxs3_get_pinmode()
730 struct ave_private *priv = dev_get_priv(dev); in ave_ofdata_to_platdata() local
737 priv->data = (const struct ave_soc_data *)dev_get_driver_data(dev); in ave_ofdata_to_platdata()
738 if (!priv->data) in ave_ofdata_to_platdata()
759 name = priv->data->clock_names[nc]; in ave_ofdata_to_platdata()
762 ret = clk_get_by_name(dev, name, &priv->clk[nc]); in ave_ofdata_to_platdata()
768 priv->nclks++; in ave_ofdata_to_platdata()
772 name = priv->data->reset_names[nr]; in ave_ofdata_to_platdata()
775 ret = reset_get_by_name(dev, name, &priv->rst[nr]); in ave_ofdata_to_platdata()
781 priv->nrsts++; in ave_ofdata_to_platdata()
792 priv->regmap = syscon_node_to_regmap(args.node); in ave_ofdata_to_platdata()
793 if (IS_ERR(priv->regmap)) { in ave_ofdata_to_platdata()
794 ret = PTR_ERR(priv->regmap); in ave_ofdata_to_platdata()
805 priv->regmap_arg = args.args[0]; in ave_ofdata_to_platdata()
811 reset_free(&priv->rst[nr]); in ave_ofdata_to_platdata()
814 clk_free(&priv->clk[nc]); in ave_ofdata_to_platdata()
822 struct ave_private *priv = dev_get_priv(dev); in ave_probe() local
825 priv->data = (const struct ave_soc_data *)dev_get_driver_data(dev); in ave_probe()
826 if (!priv->data) in ave_probe()
829 priv->iobase = pdata->iobase; in ave_probe()
830 priv->phy_mode = pdata->phy_interface; in ave_probe()
831 priv->max_speed = pdata->max_speed; in ave_probe()
833 ret = priv->data->get_pinmode(priv); in ave_probe()
839 for (nc = 0; nc < priv->nclks; nc++) { in ave_probe()
840 ret = clk_enable(&priv->clk[nc]); in ave_probe()
847 for (nr = 0; nr < priv->nrsts; nr++) { in ave_probe()
848 ret = reset_deassert(&priv->rst[nr]); in ave_probe()
855 ave_reset(priv); in ave_probe()
857 ret = ave_mdiobus_init(priv, dev->name); in ave_probe()
863 priv->bus = miiphy_get_dev_by_name(dev->name); in ave_probe()
865 ret = ave_phy_init(priv, dev); in ave_probe()
874 mdio_unregister(priv->bus); in ave_probe()
875 mdio_free(priv->bus); in ave_probe()
877 reset_release_all(priv->rst, nr); in ave_probe()
879 clk_release_all(priv->clk, nc); in ave_probe()
886 struct ave_private *priv = dev_get_priv(dev); in ave_remove() local
888 free(priv->phydev); in ave_remove()
889 mdio_unregister(priv->bus); in ave_remove()
890 mdio_free(priv->bus); in ave_remove()
891 reset_release_all(priv->rst, priv->nrsts); in ave_remove()
892 clk_release_all(priv->clk, priv->nclks); in ave_remove()