Lines Matching refs:reg_set
114 reg_set(comphy_base + COMMON_PHY_SD_CTRL1, in comphy_pcie_power_up()
118 reg_set(comphy_base + COMMON_PHY_SD_CTRL1, in comphy_pcie_power_up()
130 reg_set((void __iomem *)DFX_DEV_GEN_CTRL12, in comphy_pcie_power_up()
147 reg_set(comphy_addr + COMMON_PHY_CFG1_REG, data, mask); in comphy_pcie_power_up()
154 reg_set(comphy_addr + COMMON_PHY_CFG1_REG, data, mask); in comphy_pcie_power_up()
172 reg_set(hpipe_addr + HPIPE_RST_CLK_CTRL_REG, data, mask); in comphy_pcie_power_up()
182 reg_set(hpipe_addr + HPIPE_CLK_SRC_LO_REG, data, mask); in comphy_pcie_power_up()
198 reg_set(hpipe_addr + HPIPE_CLK_SRC_HI_REG, data, mask); in comphy_pcie_power_up()
200 reg_set(hpipe_addr + HPIPE_LANE_EQ_CFG1_REG, in comphy_pcie_power_up()
204 reg_set(hpipe_addr + HPIPE_DFE_CTRL_28_REG, in comphy_pcie_power_up()
236 reg_set(hpipe_addr + HPIPE_MISC_REG, data, mask); in comphy_pcie_power_up()
249 reg_set(hpipe_addr + HPIPE_PWR_PLL_REG, data, mask); in comphy_pcie_power_up()
255 reg_set(hpipe_addr + HPIPE_LANE_ALIGN_REG, data, mask); in comphy_pcie_power_up()
263 reg_set(hpipe_addr + HPIPE_GLOBAL_PM_CTRL, in comphy_pcie_power_up()
277 reg_set(hpipe_addr + HPIPE_INTERFACE_REG, data, mask); in comphy_pcie_power_up()
285 reg_set(hpipe_addr + HPIPE_PCIE_REG0, data, mask); in comphy_pcie_power_up()
296 reg_set(hpipe_addr + HPIPE_TX_TRAIN_CTRL_REG, data, mask); in comphy_pcie_power_up()
304 reg_set(hpipe_addr + HPIPE_TX_TRAIN_REG, data, mask); in comphy_pcie_power_up()
316 reg_set(hpipe_addr + HPIPE_TX_TRAIN_CTRL_11_REG, data, mask); in comphy_pcie_power_up()
330 reg_set(hpipe_addr + HPIPE_TX_TRAIN_CTRL_5_REG, data, mask); in comphy_pcie_power_up()
335 reg_set(hpipe_addr + HPIPE_TX_TRAIN_CTRL_0_REG, data, mask); in comphy_pcie_power_up()
340 reg_set(hpipe_addr + HPIPE_TX_TRAIN_CTRL_4_REG, data, mask); in comphy_pcie_power_up()
346 reg_set(hpipe_addr + HPIPE_TX_TRAIN_CTRL_REG, data, mask); in comphy_pcie_power_up()
351 reg_set(hpipe_addr + HPIPE_PWR_CTR_DTL_REG, data, mask); in comphy_pcie_power_up()
356 reg_set(hpipe_addr + HPIPE_G3_SETTING_4_REG, data, mask); in comphy_pcie_power_up()
361 reg_set(hpipe_addr + HPIPE_DFE_REG0, data, mask); in comphy_pcie_power_up()
372 reg_set(hpipe_addr + HPIPE_G3_SET_1_REG, data, mask); in comphy_pcie_power_up()
377 reg_set(hpipe_addr + HPIPE_SAMPLER_N_PROC_CALIB_CTRL_REG, data, mask); in comphy_pcie_power_up()
379 reg_set(hpipe_addr + HPIPE_SAMPLER_N_PROC_CALIB_CTRL_REG, 0, mask); in comphy_pcie_power_up()
387 reg_set(hpipe_addr + HPIPE_G3_SETTING_3_REG, data, mask); in comphy_pcie_power_up()
392 reg_set(hpipe_addr + HPIPE_FRAME_DETECT_CTRL_3_REG, data, mask); in comphy_pcie_power_up()
401 reg_set(hpipe_addr + HPIPE_CDR_CONTROL_REG, data, mask); in comphy_pcie_power_up()
404 reg_set(hpipe_addr + HPIPE_DFE_CONTROL_REG, data, mask); in comphy_pcie_power_up()
413 reg_set(hpipe_addr + HPIPE_G2_SET_1_REG, data, mask); in comphy_pcie_power_up()
418 reg_set(hpipe_addr + HPIPE_G2_SETTINGS_4_REG, data, mask); in comphy_pcie_power_up()
423 reg_set(hpipe_addr + HPIPE_LANE_CFG4_REG, data, mask); in comphy_pcie_power_up()
428 reg_set(hpipe_addr + HPIPE_VDD_CAL_CTRL_REG, data, mask); in comphy_pcie_power_up()
433 reg_set(hpipe_addr + HPIPE_G3_SETTING_5_REG, data, mask); in comphy_pcie_power_up()
442 reg_set(hpipe_addr + HPIPE_LANE_EQ_REMOTE_SETTING_REG, data, mask); in comphy_pcie_power_up()
448 reg_set(hpipe_addr + HPIPE_LANE_EQU_CONFIG_0_REG, data, mask); in comphy_pcie_power_up()
462 reg_set(comphy_base + COMMON_PHY_SD_CTRL1, in comphy_pcie_power_up()
474 reg_set(HPIPE_ADDR(hpipe_base, 0) + in comphy_pcie_power_up()
485 reg_set(hpipe_addr + HPIPE_RST_CLK_CTRL_REG, in comphy_pcie_power_up()
493 reg_set(comphy_base + COMMON_PHY_SD_CTRL1, in comphy_pcie_power_up()
542 reg_set(comphy_addr + COMMON_PHY_CFG1_REG, data, mask); in comphy_usb3_power_up()
549 reg_set(comphy_addr + COMMON_PHY_CFG1_REG, data, mask); in comphy_usb3_power_up()
568 reg_set(hpipe_addr + HPIPE_RST_CLK_CTRL_REG, data, mask); in comphy_usb3_power_up()
570 reg_set(hpipe_addr + HPIPE_CLK_SRC_LO_REG, in comphy_usb3_power_up()
574 reg_set(hpipe_addr + HPIPE_MISC_REG, in comphy_usb3_power_up()
583 reg_set(hpipe_addr + HPIPE_PWR_PLL_REG, data, mask); in comphy_usb3_power_up()
585 reg_set(hpipe_addr + HPIPE_GLOBAL_PM_CTRL, in comphy_usb3_power_up()
589 reg_set(hpipe_addr + HPIPE_INTERFACE_REG, in comphy_usb3_power_up()
593 reg_set(hpipe_addr + HPIPE_LOOPBACK_REG, in comphy_usb3_power_up()
597 reg_set(hpipe_addr + HPIPE_LANE_CONFIG0_REG, in comphy_usb3_power_up()
601 reg_set(hpipe_addr + HPIPE_TST_MODE_CTRL_REG, in comphy_usb3_power_up()
616 reg_set(hpipe_addr + HPIPE_LANE_CFG4_REG, data, mask); in comphy_usb3_power_up()
621 reg_set(hpipe_addr + HPIPE_RST_CLK_CTRL_REG, in comphy_usb3_power_up()
686 reg_set(sata_base + SATA3_VENDOR_ADDRESS, in comphy_sata_power_up()
701 reg_set(sata_base + SATA3_VENDOR_DATA, data, mask); in comphy_sata_power_up()
713 reg_set(comphy_addr + COMMON_PHY_CFG1_REG, data, mask); in comphy_sata_power_up()
716 reg_set(comphy_addr + COMMON_PHY_CFG6_REG, in comphy_sata_power_up()
725 reg_set(sd_ip_addr + SD_EXTERNAL_CONFIG1_REG, data, mask); in comphy_sata_power_up()
733 reg_set(hpipe_addr + HPIPE_MISC_REG, in comphy_sata_power_up()
742 reg_set(hpipe_addr + HPIPE_PWR_PLL_REG, data, mask); in comphy_sata_power_up()
744 reg_set(hpipe_addr + HPIPE_INTERFACE_REG, in comphy_sata_power_up()
748 reg_set(hpipe_addr + HPIPE_LOOPBACK_REG, in comphy_sata_power_up()
764 reg_set(hpipe_addr + HPIPE_G1_SET_1_REG, data, mask); in comphy_sata_power_up()
776 reg_set(hpipe_addr + HPIPE_G1_SETTINGS_3_REG, data, mask); in comphy_sata_power_up()
789 reg_set(hpipe_addr + HPIPE_G2_SET_1_REG, data, mask); in comphy_sata_power_up()
806 reg_set(hpipe_addr + HPIPE_G3_SET_1_REG, data, mask); in comphy_sata_power_up()
823 reg_set(hpipe_addr + HPIPE_PWR_CTR_DTL_REG, data, mask); in comphy_sata_power_up()
828 reg_set(hpipe_addr + HPIPE_SAMPLER_N_PROC_CALIB_CTRL_REG, data, mask); in comphy_sata_power_up()
831 reg_set(hpipe_addr + HPIPE_SAMPLER_N_PROC_CALIB_CTRL_REG, data, mask); in comphy_sata_power_up()
836 reg_set(hpipe_addr + HPIPE_VDD_CAL_CTRL_REG, data, mask); in comphy_sata_power_up()
841 reg_set(hpipe_addr + HPIPE_DFE_REG0, data, mask); in comphy_sata_power_up()
848 reg_set(hpipe_addr + HPIPE_DFE_F3_F5_REG, data, mask); in comphy_sata_power_up()
861 reg_set(hpipe_addr + HPIPE_G3_SETTING_3_REG, data, mask); in comphy_sata_power_up()
866 reg_set(hpipe_addr + HPIPE_G3_SETTING_4_REG, data, mask); in comphy_sata_power_up()
873 reg_set(hpipe_addr + HPIPE_PHASE_CONTROL_REG, data, mask); in comphy_sata_power_up()
876 reg_set(hpipe_addr + HPIPE_PHASE_CONTROL_REG, data, mask); in comphy_sata_power_up()
879 reg_set(hpipe_addr + HPIPE_PHASE_CONTROL_REG, data, mask); in comphy_sata_power_up()
890 reg_set(hpipe_addr + HPIPE_G1_SET_0_REG, data, mask); in comphy_sata_power_up()
901 reg_set(hpipe_addr + HPIPE_G2_SET_0_REG, data, mask); in comphy_sata_power_up()
916 reg_set(hpipe_addr + HPIPE_G3_SET_0_REG, data, mask); in comphy_sata_power_up()
921 reg_set(sd_ip_addr + SD_EXTERNAL_CONFIG2_REG, data, mask); in comphy_sata_power_up()
924 reg_set(hpipe_addr + HPIPE_PWR_CTR_REG, in comphy_sata_power_up()
927 reg_set(hpipe_addr + HPIPE_PWR_CTR_REG, in comphy_sata_power_up()
931 reg_set(hpipe_addr + HPIPE_PWR_CTR_REG, in comphy_sata_power_up()
934 reg_set(hpipe_addr + HPIPE_PWR_CTR_REG, in comphy_sata_power_up()
943 reg_set(sata_base + SATA3_VENDOR_ADDRESS, in comphy_sata_power_up()
958 reg_set(sata_base + SATA3_VENDOR_DATA, data, mask); in comphy_sata_power_up()
961 reg_set(sata_base + SATA3_VENDOR_ADDRESS, in comphy_sata_power_up()
965 reg_set(sata_base + SATA3_VENDOR_DATA, in comphy_sata_power_up()
1005 reg_set(comphy_addr + COMMON_PHY_CFG1_REG, data, mask); in comphy_sgmii_power_up()
1026 reg_set(sd_ip_addr + SD_EXTERNAL_CONFIG0_REG, data, mask); in comphy_sgmii_power_up()
1035 reg_set(sd_ip_addr + SD_EXTERNAL_CONFIG1_REG, data, mask); in comphy_sgmii_power_up()
1042 reg_set(sd_ip_addr + SD_EXTERNAL_CONFIG1_REG, data, mask); in comphy_sgmii_power_up()
1053 reg_set(hpipe_addr + HPIPE_MISC_REG, data, mask); in comphy_sgmii_power_up()
1059 reg_set(hpipe_addr + HPIPE_PWR_PLL_REG, data, mask); in comphy_sgmii_power_up()
1063 reg_set(hpipe_addr + HPIPE_LOOPBACK_REG, data, mask); in comphy_sgmii_power_up()
1069 reg_set(hpipe_addr + HPIPE_RX_CONTROL_1_REG, data, mask); in comphy_sgmii_power_up()
1073 reg_set(hpipe_addr + HPIPE_PWR_CTR_DTL_REG, data, mask); in comphy_sgmii_power_up()
1078 reg_set(hpipe_addr + HPIPE_G1_SET_0_REG, in comphy_sgmii_power_up()
1090 reg_set(sd_ip_addr + SD_EXTERNAL_CONFIG0_REG, data, mask); in comphy_sgmii_power_up()
1110 reg_set(sd_ip_addr + SD_EXTERNAL_CONFIG1_REG, data, mask); in comphy_sgmii_power_up()
1129 reg_set(sd_ip_addr + SD_EXTERNAL_CONFIG1_REG, data, mask); in comphy_sgmii_power_up()
1151 reg_set(comphy_addr + COMMON_PHY_CFG1_REG, data, mask); in comphy_sfi_power_up()
1166 reg_set(sd_ip_addr + SD_EXTERNAL_CONFIG0_REG, data, mask); in comphy_sfi_power_up()
1175 reg_set(sd_ip_addr + SD_EXTERNAL_CONFIG1_REG, data, mask); in comphy_sfi_power_up()
1181 reg_set(sd_ip_addr + SD_EXTERNAL_CONFIG1_REG, data, mask); in comphy_sfi_power_up()
1196 reg_set(hpipe_addr + HPIPE_MISC_REG, data, mask); in comphy_sfi_power_up()
1202 reg_set(hpipe_addr + HPIPE_PWR_PLL_REG, data, mask); in comphy_sfi_power_up()
1206 reg_set(hpipe_addr + HPIPE_LOOPBACK_REG, data, mask); in comphy_sfi_power_up()
1212 reg_set(hpipe_addr + HPIPE_RX_CONTROL_1_REG, data, mask); in comphy_sfi_power_up()
1216 reg_set(hpipe_addr + HPIPE_PWR_CTR_DTL_REG, data, mask); in comphy_sfi_power_up()
1232 reg_set(hpipe_addr + HPIPE_SPD_DIV_FORCE_REG, data, mask); in comphy_sfi_power_up()
1239 reg_set(sd_ip_addr + SD_EXTERNAL_CONFIG2_REG, data, mask); in comphy_sfi_power_up()
1243 reg_set(hpipe_addr + HPIPE_DFE_REG0, data, mask); in comphy_sfi_power_up()
1254 reg_set(hpipe_addr + HPIPE_G1_SET_0_REG, data, mask); in comphy_sfi_power_up()
1260 reg_set(hpipe_addr + HPIPE_G1_SET_2_REG, data, mask); in comphy_sfi_power_up()
1266 reg_set(hpipe_addr + HPIPE_TX_REG1_REG, data, mask); in comphy_sfi_power_up()
1272 reg_set(hpipe_addr + HPIPE_CAL_REG1_REG, data, mask); in comphy_sfi_power_up()
1276 reg_set(hpipe_addr + HPIPE_G1_SETTING_5_REG, data, mask); in comphy_sfi_power_up()
1297 reg_set(hpipe_addr + HPIPE_G1_SET_1_REG, data, mask); in comphy_sfi_power_up()
1304 reg_set(hpipe_addr + HPIPE_DFE_F3_F5_REG, data, mask); in comphy_sfi_power_up()
1309 reg_set(hpipe_addr + HPIPE_G1_SETTINGS_4_REG, data, mask); in comphy_sfi_power_up()
1322 reg_set(hpipe_addr + HPIPE_G1_SETTINGS_3_REG, data, mask); in comphy_sfi_power_up()
1327 reg_set(hpipe_addr + HPIPE_TX_TRAIN_CTRL_5_REG, data, mask); in comphy_sfi_power_up()
1332 reg_set(hpipe_addr + HPIPE_TX_TRAIN_CTRL_0_REG, data, mask); in comphy_sfi_power_up()
1337 reg_set(hpipe_addr + HPIPE_TX_PRESET_INDEX_REG, data, mask); in comphy_sfi_power_up()
1342 reg_set(hpipe_addr + HPIPE_FRAME_DETECT_CTRL_3_REG, data, mask); in comphy_sfi_power_up()
1349 reg_set(hpipe_addr + HPIPE_TX_TRAIN_REG, data, mask); in comphy_sfi_power_up()
1354 reg_set(hpipe_addr + HPIPE_FRAME_DETECT_CTRL_0_REG, data, mask); in comphy_sfi_power_up()
1359 reg_set(hpipe_addr + HPIPE_DME_REG, data, mask); in comphy_sfi_power_up()
1364 reg_set(hpipe_addr + HPIPE_VDD_CAL_0_REG, data, mask); in comphy_sfi_power_up()
1371 reg_set(hpipe_addr + HPIPE_SAMPLER_N_PROC_CALIB_CTRL_REG, data, mask); in comphy_sfi_power_up()
1374 reg_set(hpipe_addr + HPIPE_SAMPLER_N_PROC_CALIB_CTRL_REG, data, mask); in comphy_sfi_power_up()
1379 reg_set(hpipe_addr + HPIPE_VDD_CAL_CTRL_REG, data, mask); in comphy_sfi_power_up()
1389 reg_set(sd_ip_addr + SD_EXTERNAL_CONFIG0_REG, data, mask); in comphy_sfi_power_up()
1409 reg_set(sd_ip_addr + SD_EXTERNAL_CONFIG1_REG, data, mask); in comphy_sfi_power_up()
1430 reg_set(sd_ip_addr + SD_EXTERNAL_CONFIG1_REG, data, mask); in comphy_sfi_power_up()
1452 reg_set(comphy_addr + COMMON_PHY_CFG1_REG, data, mask); in comphy_rxauii_power_up()
1455 reg_set(comphy_base + COMMON_PHY_SD_CTRL1, in comphy_rxauii_power_up()
1460 reg_set(comphy_base + COMMON_PHY_SD_CTRL1, in comphy_rxauii_power_up()
1480 reg_set(sd_ip_addr + SD_EXTERNAL_CONFIG0_REG, data, mask); in comphy_rxauii_power_up()
1489 reg_set(sd_ip_addr + SD_EXTERNAL_CONFIG1_REG, data, mask); in comphy_rxauii_power_up()
1495 reg_set(sd_ip_addr + SD_EXTERNAL_CONFIG1_REG, data, mask); in comphy_rxauii_power_up()
1503 reg_set(hpipe_addr + HPIPE_MISC_REG, in comphy_rxauii_power_up()
1511 reg_set(hpipe_addr + HPIPE_PWR_PLL_REG, data, mask); in comphy_rxauii_power_up()
1513 reg_set(hpipe_addr + HPIPE_LOOPBACK_REG, in comphy_rxauii_power_up()
1520 reg_set(hpipe_addr + HPIPE_RX_CONTROL_1_REG, data, mask); in comphy_rxauii_power_up()
1522 reg_set(hpipe_addr + HPIPE_PWR_CTR_DTL_REG, in comphy_rxauii_power_up()
1529 reg_set(sd_ip_addr + SD_EXTERNAL_CONFIG2_REG, in comphy_rxauii_power_up()
1533 reg_set(hpipe_addr + HPIPE_DFE_REG0, 0x1 << HPIPE_DFE_RES_FORCE_OFFSET, in comphy_rxauii_power_up()
1536 reg_set(hpipe_addr + HPIPE_G1_SET_0_REG, in comphy_rxauii_power_up()
1546 reg_set(hpipe_addr + HPIPE_G1_SET_1_REG, data, mask); in comphy_rxauii_power_up()
1552 reg_set(hpipe_addr + HPIPE_DFE_F3_F5_REG, data, mask); in comphy_rxauii_power_up()
1557 reg_set(hpipe_addr + HPIPE_G1_SETTINGS_4_REG, data, mask); in comphy_rxauii_power_up()
1567 reg_set(sd_ip_addr + SD_EXTERNAL_CONFIG0_REG, data, mask); in comphy_rxauii_power_up()
1586 reg_set(sd_ip_addr + SD_EXTERNAL_CONFIG1_REG, in comphy_rxauii_power_up()
1608 reg_set(sd_ip_addr + SD_EXTERNAL_CONFIG1_REG, data, mask); in comphy_rxauii_power_up()
1625 reg_set(utmi_cfg_addr, 0x0 << UTMI_PHY_CFG_PU_OFFSET, in comphy_utmi_power_down()
1641 reg_set(usb_cfg_addr, data, mask); in comphy_utmi_power_down()
1650 reg_set(utmi_base_addr + UTMI_CTRL_STATUS0_REG, data, mask); in comphy_utmi_power_down()
1677 reg_set(utmi_base_addr + UTMI_PLL_CTRL_REG, data, mask); in comphy_utmi_phy_config()
1680 reg_set(utmi_base_addr + UTMI_CALIB_CTRL_REG, in comphy_utmi_phy_config()
1690 reg_set(utmi_base_addr + UTMI_TX_CH_CTRL_REG, data, mask); in comphy_utmi_phy_config()
1698 reg_set(utmi_base_addr + UTMI_RX_CH_CTRL0_REG, data, mask); in comphy_utmi_phy_config()
1706 reg_set(utmi_base_addr + UTMI_RX_CH_CTRL1_REG, data, mask); in comphy_utmi_phy_config()
1714 reg_set(utmi_base_addr + UTMI_CHGDTC_CTRL_REG, data, mask); in comphy_utmi_phy_config()
1731 reg_set(utmi_cfg_addr, 0x1 << UTMI_PHY_CFG_PU_OFFSET, in comphy_utmi_power_up()
1734 reg_set(utmi_base_addr + UTMI_CTRL_STATUS0_REG, in comphy_utmi_power_up()
1804 reg_set(cp110_utmi_data[i].usb_cfg_addr, in comphy_utmi_phy_init()
1834 reg_set(cp110_utmi_data[i].usb_cfg_addr, in comphy_utmi_phy_init()