120 u16 uec_phy_read(struct uec_mii_info *mii_info, u16 regnum);
241 	adv = uec_phy_read(mii_info, MII_ADVERTISE);  in config_genmii_advert()
259 	ctrl = uec_phy_read(mii_info, MII_BMCR);  in genmii_setup_forced()
297 	ctl = uec_phy_read(mii_info, MII_BMCR);  in genmii_restart_aneg()
312 		adv = uec_phy_read(mii_info, MII_CTRL1000);  in gbit_config_aneg()
372 	uec_phy_read(mii_info, MII_BMSR);  in genmii_update_link()
378 	status = uec_phy_read(mii_info, MII_BMSR);  in genmii_update_link()
394 			status = uec_phy_read(mii_info, MII_BMSR);  in genmii_update_link()
419 		status = uec_phy_read(mii_info, MII_STAT1000);  in genmii_read_status()
428 			status = uec_phy_read(mii_info, MII_LPA);  in genmii_read_status()
463 			val = uec_phy_read(mii_info, MII_BMSR);  in bcm_init()
469 		val = uec_phy_read(mii_info, 0x18);  in bcm_init()
494 		temp = uec_phy_read(mii_info, MII_M1111_PHY_EXT_CR);  in uec_marvell_init()
506 		temp = uec_phy_read(mii_info, MII_M1111_PHY_EXT_SR);  in uec_marvell_init()
534 		status = uec_phy_read(mii_info, MII_M1011_PHY_SPEC_STATUS);  in marvell_read_status()
564 	uec_phy_read(mii_info, MII_M1011_IEVENT);  in marvell_ack_interrupt()
583 	uec_phy_write(mii_info, MII_BMCR, uec_phy_read(mii_info, MII_BMCR) |  in dm9161_init()
586 	uec_phy_write(mii_info, MII_BMCR, uec_phy_read(mii_info, MII_BMCR) &  in dm9161_init()
615 		status = uec_phy_read(mii_info, MII_DM9161_SCSR);  in dm9161_read_status()
633 	uec_phy_read(mii_info, MII_DM9161_INTR);  in dm9161_ack_interrupt()
697 		status = uec_phy_read(mii_info, 0x1f);  in smsc_read_status()
805 u16 uec_phy_read(struct uec_mii_info *mii_info, u16 regnum)  in uec_phy_read()  function
826 	phy_reg = uec_phy_read(mii_info, MII_PHYSID1);  in uec_get_phy_info()
830 	phy_reg = uec_phy_read(mii_info, MII_PHYSID2);  in uec_get_phy_info()
899 		status = uec_phy_read(mii_info, MII_BMCR);  in marvell_phy_interface_mode()