Lines Matching refs:denali_ctl
116 u32 *denali_ctl = chan->pctl->denali_ctl; in set_memory_map() local
134 clrsetbits_le32(&denali_ctl[191], 0xF, (12 - sdram_ch->col)); in set_memory_map()
135 clrsetbits_le32(&denali_ctl[190], (0x3 << 16) | (0x7 << 24), in set_memory_map()
139 clrsetbits_le32(&denali_ctl[196], 0x3 | (1 << 16), in set_memory_map()
458 u32 *denali_ctl = chan->pctl->denali_ctl; in pctl_cfg() local
461 const u32 *params_ctl = sdram_params->pctl_regs.denali_ctl; in pctl_cfg()
472 copy_to_reg(&denali_ctl[1], ¶ms_ctl[1], in pctl_cfg()
474 writel(params_ctl[0], &denali_ctl[0]); in pctl_cfg()
484 pwrup_srefresh_exit = readl(&denali_ctl[68]) & PWRUP_SREFRESH_EXIT; in pctl_cfg()
485 clrbits_le32(&denali_ctl[68], PWRUP_SREFRESH_EXIT); in pctl_cfg()
491 setbits_le32(&denali_ctl[0], START); in pctl_cfg()
556 } while (!(readl(&denali_ctl[203]) & (1 << 3))); in pctl_cfg()
559 clrsetbits_le32(&denali_ctl[68], PWRUP_SREFRESH_EXIT, in pctl_cfg()
584 u32 *denali_ctl = chan->pctl->denali_ctl; in override_write_leveling_value() local
608 clrsetbits_le32(&denali_ctl[200], 0x1 << 8, 0x1 << 8); in override_write_leveling_value()
976 setbits_le32(&dram->chan[channel].pctl->denali_ctl[276], in dram_all_config()