Lines Matching refs:priv
103 struct fsl_dspi_priv priv; member
132 static void dspi_halt(struct fsl_dspi_priv *priv, u8 halt) in dspi_halt() argument
136 mcr_val = dspi_read32(priv->flags, &priv->regs->mcr); in dspi_halt()
143 dspi_write32(priv->flags, &priv->regs->mcr, mcr_val); in dspi_halt()
146 static void fsl_dspi_init_mcr(struct fsl_dspi_priv *priv, uint cfg_val) in fsl_dspi_init_mcr() argument
149 dspi_halt(priv, 1); in fsl_dspi_init_mcr()
151 dspi_write32(priv->flags, &priv->regs->mcr, cfg_val); in fsl_dspi_init_mcr()
154 dspi_halt(priv, 0); in fsl_dspi_init_mcr()
156 priv->mcr_val = cfg_val; in fsl_dspi_init_mcr()
159 static void fsl_dspi_cfg_cs_active_state(struct fsl_dspi_priv *priv, in fsl_dspi_cfg_cs_active_state() argument
164 dspi_halt(priv, 1); in fsl_dspi_cfg_cs_active_state()
166 mcr_val = dspi_read32(priv->flags, &priv->regs->mcr); in fsl_dspi_cfg_cs_active_state()
173 dspi_write32(priv->flags, &priv->regs->mcr, mcr_val); in fsl_dspi_cfg_cs_active_state()
175 dspi_halt(priv, 0); in fsl_dspi_cfg_cs_active_state()
178 static int fsl_dspi_cfg_ctar_mode(struct fsl_dspi_priv *priv, in fsl_dspi_cfg_ctar_mode() argument
183 bus_setup = dspi_read32(priv->flags, &priv->regs->ctar[0]); in fsl_dspi_cfg_ctar_mode()
186 bus_setup |= priv->ctar_val[cs]; in fsl_dspi_cfg_ctar_mode()
196 dspi_write32(priv->flags, &priv->regs->ctar[0], bus_setup); in fsl_dspi_cfg_ctar_mode()
198 priv->charbit = in fsl_dspi_cfg_ctar_mode()
199 ((dspi_read32(priv->flags, &priv->regs->ctar[0]) & in fsl_dspi_cfg_ctar_mode()
205 static void fsl_dspi_clr_fifo(struct fsl_dspi_priv *priv) in fsl_dspi_clr_fifo() argument
209 dspi_halt(priv, 1); in fsl_dspi_clr_fifo()
210 mcr_val = dspi_read32(priv->flags, &priv->regs->mcr); in fsl_dspi_clr_fifo()
213 dspi_write32(priv->flags, &priv->regs->mcr, mcr_val); in fsl_dspi_clr_fifo()
214 dspi_halt(priv, 0); in fsl_dspi_clr_fifo()
217 static void dspi_tx(struct fsl_dspi_priv *priv, u32 ctrl, u16 data) in dspi_tx() argument
222 while (DSPI_SR_TXCTR(dspi_read32(priv->flags, &priv->regs->sr)) >= 4 && in dspi_tx()
227 dspi_write32(priv->flags, &priv->regs->tfr, (ctrl | data)); in dspi_tx()
232 static u16 dspi_rx(struct fsl_dspi_priv *priv) in dspi_rx() argument
237 while (DSPI_SR_RXCTR(dspi_read32(priv->flags, &priv->regs->sr)) == 0 && in dspi_rx()
243 dspi_read32(priv->flags, &priv->regs->rfr)); in dspi_rx()
250 static int dspi_xfer(struct fsl_dspi_priv *priv, uint cs, unsigned int bitlen, in dspi_xfer() argument
258 if (priv->charbit == 16) { in dspi_xfer()
277 if (priv->charbit == 16) in dspi_xfer()
278 dspi_tx(priv, ctrl, *spi_wr16++); in dspi_xfer()
280 dspi_tx(priv, ctrl, *spi_wr++); in dspi_xfer()
281 dspi_rx(priv); in dspi_xfer()
285 dspi_tx(priv, ctrl, DSPI_IDLE_VAL); in dspi_xfer()
286 if (priv->charbit == 16) in dspi_xfer()
287 *spi_rd16++ = dspi_rx(priv); in dspi_xfer()
289 *spi_rd++ = dspi_rx(priv); in dspi_xfer()
301 if (priv->charbit == 16) in dspi_xfer()
302 dspi_tx(priv, ctrl, *spi_wr16); in dspi_xfer()
304 dspi_tx(priv, ctrl, *spi_wr); in dspi_xfer()
305 dspi_rx(priv); in dspi_xfer()
309 dspi_tx(priv, ctrl, DSPI_IDLE_VAL); in dspi_xfer()
310 if (priv->charbit == 16) in dspi_xfer()
311 *spi_rd16 = dspi_rx(priv); in dspi_xfer()
313 *spi_rd = dspi_rx(priv); in dspi_xfer()
317 dspi_tx(priv, ctrl, DSPI_IDLE_VAL); in dspi_xfer()
318 dspi_rx(priv); in dspi_xfer()
364 static int fsl_dspi_cfg_speed(struct fsl_dspi_priv *priv, uint speed) in fsl_dspi_cfg_speed() argument
370 bus_clk = priv->bus_clk; in fsl_dspi_cfg_speed()
375 bus_setup = dspi_read32(priv->flags, &priv->regs->ctar[0]); in fsl_dspi_cfg_speed()
380 speed = priv->speed_hz; in fsl_dspi_cfg_speed()
386 dspi_write32(priv->flags, &priv->regs->ctar[0], bus_setup); in fsl_dspi_cfg_speed()
388 priv->speed_hz = speed; in fsl_dspi_cfg_speed()
419 dspi->priv.flags |= DSPI_FLAG_REGMAP_ENDIAN_BIG; in spi_setup_slave()
422 dspi->priv.regs = (struct dspi *)MMAP_DSPI; in spi_setup_slave()
425 dspi->priv.bus_clk = gd->bus_clk; in spi_setup_slave()
427 dspi->priv.bus_clk = mxc_get_clock(MXC_DSPI_CLK); in spi_setup_slave()
429 dspi->priv.speed_hz = FSL_DSPI_DEFAULT_SCK_FREQ; in spi_setup_slave()
434 fsl_dspi_init_mcr(&dspi->priv, mcr_cfg_val); in spi_setup_slave()
437 dspi->priv.ctar_val[i] = DSPI_CTAR_DEFAULT_VALUE; in spi_setup_slave()
441 dspi->priv.ctar_val[0] = CONFIG_SYS_DSPI_CTAR0; in spi_setup_slave()
445 dspi->priv.ctar_val[1] = CONFIG_SYS_DSPI_CTAR1; in spi_setup_slave()
449 dspi->priv.ctar_val[2] = CONFIG_SYS_DSPI_CTAR2; in spi_setup_slave()
453 dspi->priv.ctar_val[3] = CONFIG_SYS_DSPI_CTAR3; in spi_setup_slave()
457 dspi->priv.ctar_val[4] = CONFIG_SYS_DSPI_CTAR4; in spi_setup_slave()
461 dspi->priv.ctar_val[5] = CONFIG_SYS_DSPI_CTAR5; in spi_setup_slave()
465 dspi->priv.ctar_val[6] = CONFIG_SYS_DSPI_CTAR6; in spi_setup_slave()
469 dspi->priv.ctar_val[7] = CONFIG_SYS_DSPI_CTAR7; in spi_setup_slave()
472 fsl_dspi_cfg_speed(&dspi->priv, max_hz); in spi_setup_slave()
475 fsl_dspi_cfg_ctar_mode(&dspi->priv, cs, mode); in spi_setup_slave()
478 fsl_dspi_cfg_cs_active_state(&dspi->priv, cs, mode); in spi_setup_slave()
495 fsl_dspi_clr_fifo(&dspi->priv); in spi_claim_bus()
498 sr_val = dspi_read32(dspi->priv.flags, &dspi->priv.regs->sr); in spi_claim_bus()
511 dspi_halt(&dspi->priv, 1); in spi_release_bus()
519 return dspi_xfer(&dspi->priv, slave->cs, bitlen, dout, din, flags); in spi_xfer()
525 struct fsl_dspi_priv *priv = dev_get_priv(dev->parent); in fsl_dspi_child_pre_probe() local
527 if (slave_plat->cs >= priv->num_chipselect) { in fsl_dspi_child_pre_probe()
529 slave_plat->cs, priv->num_chipselect - 1); in fsl_dspi_child_pre_probe()
533 priv->ctar_val[slave_plat->cs] = DSPI_CTAR_DEFAULT_VALUE; in fsl_dspi_child_pre_probe()
544 struct fsl_dspi_priv *priv = dev_get_priv(bus); in fsl_dspi_probe() local
554 priv->regs = (struct dspi *)plat->regs_addr; in fsl_dspi_probe()
555 priv->flags = plat->flags; in fsl_dspi_probe()
557 priv->bus_clk = gd->bus_clk; in fsl_dspi_probe()
559 priv->bus_clk = mxc_get_clock(MXC_DSPI_CLK); in fsl_dspi_probe()
561 priv->num_chipselect = plat->num_chipselect; in fsl_dspi_probe()
562 priv->speed_hz = plat->speed_hz; in fsl_dspi_probe()
564 priv->charbit = 8; in fsl_dspi_probe()
571 fsl_dspi_init_mcr(priv, mcr_cfg_val); in fsl_dspi_probe()
581 struct fsl_dspi_priv *priv; in fsl_dspi_claim_bus() local
586 priv = dev_get_priv(bus); in fsl_dspi_claim_bus()
592 fsl_dspi_cfg_ctar_mode(priv, slave_plat->cs, priv->mode); in fsl_dspi_claim_bus()
595 fsl_dspi_cfg_cs_active_state(priv, slave_plat->cs, in fsl_dspi_claim_bus()
596 priv->mode); in fsl_dspi_claim_bus()
598 fsl_dspi_clr_fifo(priv); in fsl_dspi_claim_bus()
601 sr_val = dspi_read32(priv->flags, &priv->regs->sr); in fsl_dspi_claim_bus()
613 struct fsl_dspi_priv *priv = dev_get_priv(bus); in fsl_dspi_release_bus() local
618 dspi_halt(priv, 1); in fsl_dspi_release_bus()
669 struct fsl_dspi_priv *priv; in fsl_dspi_xfer() local
674 priv = dev_get_priv(bus); in fsl_dspi_xfer()
676 return dspi_xfer(priv, slave_plat->cs, bitlen, dout, din, flags); in fsl_dspi_xfer()
681 struct fsl_dspi_priv *priv = dev_get_priv(bus); in fsl_dspi_set_speed() local
683 return fsl_dspi_cfg_speed(priv, speed); in fsl_dspi_set_speed()
688 struct fsl_dspi_priv *priv = dev_get_priv(bus); in fsl_dspi_set_mode() local
698 priv->mode = mode; in fsl_dspi_set_mode()