Lines Matching refs:__raw_writel
68 __raw_writel(0x2, DMFC_IC_CTRL); in ipu_dmfc_init()
131 __raw_writel(dmfc_wr_chan, DMFC_WR_CHAN); in ipu_dmfc_init()
132 __raw_writel(0x202020F6, DMFC_WR_CHAN_DEF); in ipu_dmfc_init()
133 __raw_writel(dmfc_dp_chan, DMFC_DP_CHAN); in ipu_dmfc_init()
135 __raw_writel(0x2020F6F6, DMFC_DP_CHAN_DEF); in ipu_dmfc_init()
176 __raw_writel(dmfc_gen1, DMFC_GENERAL1); in ipu_dmfc_set_wait4eot()
186 __raw_writel(reg, DI_DW_GEN(di, wave_gen)); in ipu_di_data_wave_config()
197 __raw_writel(reg, DI_DW_GEN(di, wave_gen)); in ipu_di_data_pin_config()
199 __raw_writel((down << 16) | up, DI_DW_SET(di, wave_gen, set)); in ipu_di_data_pin_config()
222 __raw_writel(reg, DI_SW_GEN0(di, wave_gen)); in ipu_di_sync_config()
230 __raw_writel(reg, DI_SW_GEN1(di, wave_gen)); in ipu_di_sync_config()
234 __raw_writel(reg, DI_STP_REP(di, wave_gen)); in ipu_di_sync_config()
245 __raw_writel(reg, DC_MAP_CONF_VAL(ptr)); in ipu_dc_map_config()
250 __raw_writel(reg, DC_MAP_CONF_PTR(map)); in ipu_dc_map_config()
256 __raw_writel(reg & ~(0xFFFF << (16 * (map & 0x1))), in ipu_dc_map_clear()
271 __raw_writel(reg, ipu_dc_tmpl_reg + word * 2); in ipu_dc_write_tmpl()
276 __raw_writel(reg, ipu_dc_tmpl_reg + word * 2 + 1); in ipu_dc_write_tmpl()
286 __raw_writel(reg, DC_RL_CH(chan, event)); in ipu_dc_link_event()
389 __raw_writel(reg, DP_COM_CONF()); in ipu_dp_csc_setup()
395 __raw_writel(mask_a((*coeff)[0][0]) | in ipu_dp_csc_setup()
397 __raw_writel(mask_a((*coeff)[0][2]) | in ipu_dp_csc_setup()
399 __raw_writel(mask_a((*coeff)[1][1]) | in ipu_dp_csc_setup()
401 __raw_writel(mask_a((*coeff)[2][0]) | in ipu_dp_csc_setup()
403 __raw_writel(mask_a((*coeff)[2][2]) | in ipu_dp_csc_setup()
406 __raw_writel(mask_b((*coeff)[3][1]) | ((*coeff)[4][1] << 14) | in ipu_dp_csc_setup()
413 __raw_writel(reg, IPU_SRM_PRI2); in ipu_dp_csc_setup()
492 __raw_writel(reg | color_key, DP_GRAPH_WIND_CTRL()); in ipu_dp_init()
572 __raw_writel(reg, DC_WR_CH_CONF(dc_chan)); in ipu_dc_init()
574 __raw_writel(0x00000000, DC_WR_CH_ADDR(dc_chan)); in ipu_dc_init()
576 __raw_writel(0x00000084, DC_GEN); in ipu_dc_init()
623 __raw_writel(reg | DP_COM_CONF_FG_EN, DP_COM_CONF()); in ipu_dp_dc_enable()
626 __raw_writel(reg, IPU_SRM_PRI2); in ipu_dp_dc_enable()
637 __raw_writel(reg, DC_WR_CH_CONF(6 - dc_chan)); in ipu_dp_dc_enable()
642 __raw_writel(reg, DC_WR_CH_CONF(dc_chan)); in ipu_dp_dc_enable()
675 __raw_writel(reg, DP_COM_CONF()); in ipu_dp_dc_disable()
678 __raw_writel(reg, IPU_SRM_PRI2); in ipu_dp_dc_disable()
710 __raw_writel(reg, DC_WR_CH_CONF(6 - dc_chan)); in ipu_dp_dc_disable()
713 __raw_writel(reg, DC_WR_CH_CONF(dc_chan)); in ipu_dp_dc_disable()
716 __raw_writel(IPUIRQ_2_MASK(irq), IPUIRQ_2_STATREG(irq)); in ipu_dp_dc_disable()
723 __raw_writel(reg, DC_WR_CH_CONF(dc_chan)); in ipu_dp_dc_disable()
730 __raw_writel(reg, IPU_DISP_GEN); in ipu_dp_dc_disable()
1066 __raw_writel(reg, DI_SW_GEN1(disp, 9)); in ipu_init_sync_panel()
1068 __raw_writel(v_total / 2 - 1, DI_SCR_CONF(disp)); in ipu_init_sync_panel()
1092 __raw_writel(v_total - 1, DI_SCR_CONF(disp)); in ipu_init_sync_panel()
1106 __raw_writel(0, DI_SW_GEN0(disp, 6)); in ipu_init_sync_panel()
1107 __raw_writel(0, DI_SW_GEN1(disp, 6)); in ipu_init_sync_panel()
1108 __raw_writel(0, DI_SW_GEN0(disp, 7)); in ipu_init_sync_panel()
1109 __raw_writel(0, DI_SW_GEN1(disp, 7)); in ipu_init_sync_panel()
1110 __raw_writel(0, DI_SW_GEN0(disp, 8)); in ipu_init_sync_panel()
1111 __raw_writel(0, DI_SW_GEN1(disp, 8)); in ipu_init_sync_panel()
1112 __raw_writel(0, DI_SW_GEN0(disp, 9)); in ipu_init_sync_panel()
1113 __raw_writel(0, DI_SW_GEN1(disp, 9)); in ipu_init_sync_panel()
1117 __raw_writel(reg, DI_STP_REP(disp, 6)); in ipu_init_sync_panel()
1118 __raw_writel(0, DI_STP_REP(disp, 7)); in ipu_init_sync_panel()
1119 __raw_writel(0, DI_STP_REP9(disp)); in ipu_init_sync_panel()
1142 __raw_writel(di_gen, DI_GENERAL(disp)); in ipu_init_sync_panel()
1144 __raw_writel((--vsync_cnt << DI_VSYNC_SEL_OFFSET) | in ipu_init_sync_panel()
1153 __raw_writel(reg, DI_POL(disp)); in ipu_init_sync_panel()
1155 __raw_writel(width, DC_DISP_CONF2(DC_DISP_ID_SYNC(disp))); in ipu_init_sync_panel()
1197 __raw_writel(reg & ~DP_COM_CONF_GWSEL, DP_COM_CONF()); in ipu_disp_set_global_alpha()
1200 __raw_writel(reg | DP_COM_CONF_GWSEL, DP_COM_CONF()); in ipu_disp_set_global_alpha()
1205 __raw_writel(reg | ((uint32_t) alpha << 24), in ipu_disp_set_global_alpha()
1209 __raw_writel(reg | DP_COM_CONF_GWAM, DP_COM_CONF()); in ipu_disp_set_global_alpha()
1212 __raw_writel(reg & ~DP_COM_CONF_GWAM, DP_COM_CONF()); in ipu_disp_set_global_alpha()
1216 __raw_writel(reg, IPU_SRM_PRI2); in ipu_disp_set_global_alpha()
1275 __raw_writel(reg | color_key, DP_GRAPH_WIND_CTRL()); in ipu_disp_set_color_key()
1278 __raw_writel(reg | DP_COM_CONF_GWCKE, DP_COM_CONF()); in ipu_disp_set_color_key()
1281 __raw_writel(reg & ~DP_COM_CONF_GWCKE, DP_COM_CONF()); in ipu_disp_set_color_key()
1285 __raw_writel(reg, IPU_SRM_PRI2); in ipu_disp_set_color_key()