Lines Matching refs:gtt_write
247 static inline void gtt_write(void *bar, u32 reg, u32 data) in gtt_write() function
255 gtt_write(bar, pm->reg, pm->value); in gtt_write_powermeter()
283 gtt_write(gtt_bar, 0xa18c, 0x00000001); in gma_pm_init_pre_vbios()
286 gtt_write(gtt_bar, 0xa180, 1 << 5); in gma_pm_init_pre_vbios()
287 gtt_write(gtt_bar, 0xa188, 0xffff0001); in gma_pm_init_pre_vbios()
295 gtt_write(gtt_bar, 0x42004, reg32); in gma_pm_init_pre_vbios()
302 gtt_write(gtt_bar, 0x45010, reg32); in gma_pm_init_pre_vbios()
344 gtt_write(gtt_bar, 0xa004, 0x00000010); in gma_pm_init_pre_vbios()
347 gtt_write(gtt_bar, 0xa000, 0x00070020); in gma_pm_init_pre_vbios()
350 gtt_write(gtt_bar, 0xa080, 0x00000004); in gma_pm_init_pre_vbios()
358 gtt_write(gtt_bar, 0xa180, reg32); in gma_pm_init_pre_vbios()
365 gtt_write(gtt_bar, 0x9400, reg32); in gma_pm_init_pre_vbios()
370 gtt_write(gtt_bar, 0x941c, reg32); in gma_pm_init_pre_vbios()
377 gtt_write(gtt_bar, 0x907c, reg32); in gma_pm_init_pre_vbios()
380 gtt_write(gtt_bar, 0x9424, 0x00000001); in gma_pm_init_pre_vbios()
383 gtt_write(gtt_bar, 0x9424, 0x00000000); in gma_pm_init_pre_vbios()
388 gtt_write(gtt_bar, 0x138128, 0x00000029); /* Mailbox Data */ in gma_pm_init_pre_vbios()
390 gtt_write(gtt_bar, 0x138124, 0x80000004); in gma_pm_init_pre_vbios()
392 gtt_write(gtt_bar, 0x138124, 0x8000000a); in gma_pm_init_pre_vbios()
397 gtt_write(gtt_bar, 0xa090, 0x00000000); /* RC Control */ in gma_pm_init_pre_vbios()
398 gtt_write(gtt_bar, 0xa098, 0x03e80000); /* RC1e Wake Rate Limit */ in gma_pm_init_pre_vbios()
399 gtt_write(gtt_bar, 0xa09c, 0x0028001e); /* RC6/6p Wake Rate Limit */ in gma_pm_init_pre_vbios()
400 gtt_write(gtt_bar, 0xa0a0, 0x0000001e); /* RC6pp Wake Rate Limit */ in gma_pm_init_pre_vbios()
401 gtt_write(gtt_bar, 0xa0a8, 0x0001e848); /* RC Evaluation Interval */ in gma_pm_init_pre_vbios()
402 gtt_write(gtt_bar, 0xa0ac, 0x00000019); /* RC Idle Hysteresis */ in gma_pm_init_pre_vbios()
405 gtt_write(gtt_bar, 0x2054, 0x0000000a); /* Render Idle Max Count */ in gma_pm_init_pre_vbios()
406 gtt_write(gtt_bar, 0x12054, 0x0000000a); /* Video Idle Max Count */ in gma_pm_init_pre_vbios()
407 gtt_write(gtt_bar, 0x22054, 0x0000000a); /* Blitter Idle Max Count */ in gma_pm_init_pre_vbios()
410 gtt_write(gtt_bar, 0xa0b0, 0x00000000); /* Unblock Ack to Busy */ in gma_pm_init_pre_vbios()
411 gtt_write(gtt_bar, 0xa0b4, 0x000003e8); /* RC1e Threshold */ in gma_pm_init_pre_vbios()
412 gtt_write(gtt_bar, 0xa0b8, 0x0000c350); /* RC6 Threshold */ in gma_pm_init_pre_vbios()
413 gtt_write(gtt_bar, 0xa0bc, 0x000186a0); /* RC6p Threshold */ in gma_pm_init_pre_vbios()
414 gtt_write(gtt_bar, 0xa0c0, 0x0000fa00); /* RC6pp Threshold */ in gma_pm_init_pre_vbios()
417 gtt_write(gtt_bar, 0xa010, 0x000f4240); /* RP Down Timeout */ in gma_pm_init_pre_vbios()
418 gtt_write(gtt_bar, 0xa014, 0x12060000); /* RP Interrupt Limits */ in gma_pm_init_pre_vbios()
419 gtt_write(gtt_bar, 0xa02c, 0x00015f90); /* RP Up Threshold */ in gma_pm_init_pre_vbios()
420 gtt_write(gtt_bar, 0xa030, 0x000186a0); /* RP Down Threshold */ in gma_pm_init_pre_vbios()
421 gtt_write(gtt_bar, 0xa068, 0x000186a0); /* RP Up EI */ in gma_pm_init_pre_vbios()
422 gtt_write(gtt_bar, 0xa06c, 0x000493e0); /* RP Down EI */ in gma_pm_init_pre_vbios()
423 gtt_write(gtt_bar, 0xa070, 0x0000000a); /* RP Idle Hysteresis */ in gma_pm_init_pre_vbios()
433 gtt_write(gtt_bar, 0xa090, 0x88040000); /* HW RC Control */ in gma_pm_init_pre_vbios()
435 gtt_write(gtt_bar, 0xa090, 0x88040000); /* HW RC Control */ in gma_pm_init_pre_vbios()
444 gtt_write(gtt_bar, 0xa008, reg32); in gma_pm_init_pre_vbios()
447 gtt_write(gtt_bar, 0xa024, 0x00000592); in gma_pm_init_pre_vbios()
450 gtt_write(gtt_bar, 0x4402c, 0x03000076); in gma_pm_init_pre_vbios()
455 gtt_write(gtt_bar, 0x6c024, reg32); in gma_pm_init_pre_vbios()
470 gtt_write(gtt_bar, 0xa18c, gtt_read(gtt_bar, 0xa18c) & ~1); in gma_pm_init_post_vbios()
473 gtt_write(gtt_bar, 0xa188, 0x1fffe); in gma_pm_init_post_vbios()
475 gtt_write(gtt_bar, 0xa188, in gma_pm_init_post_vbios()
481 gtt_write(gtt_bar, 0xa094, 0x00060000); in gma_pm_init_post_vbios()
495 gtt_write(gtt_bar, 0xc4030, reg32); in gma_pm_init_post_vbios()
507 gtt_write(gtt_bar, 0xc7208, reg32); in gma_pm_init_post_vbios()
517 gtt_write(gtt_bar, 0xc720c, reg32); in gma_pm_init_post_vbios()
527 gtt_write(gtt_bar, 0xc7210, reg32); in gma_pm_init_post_vbios()
533 gtt_write(gtt_bar, 0x48250, (1 << 31)); in gma_pm_init_post_vbios()
534 gtt_write(gtt_bar, 0x48254, reg32); in gma_pm_init_post_vbios()
538 gtt_write(gtt_bar, 0xc8250, (1 << 31)); in gma_pm_init_post_vbios()
539 gtt_write(gtt_bar, 0xc8254, reg32); in gma_pm_init_post_vbios()