Lines Matching refs:reg32
277 u32 reg32; in gma_pm_init_pre_vbios() local
293 reg32 = gtt_read(gtt_bar, 0x42004); in gma_pm_init_pre_vbios()
294 reg32 |= (1 << 14) | (1 << 15); in gma_pm_init_pre_vbios()
295 gtt_write(gtt_bar, 0x42004, reg32); in gma_pm_init_pre_vbios()
300 reg32 = gtt_read(gtt_bar, 0x45010); in gma_pm_init_pre_vbios()
301 reg32 |= (1 << 1) | (1 << 0); in gma_pm_init_pre_vbios()
302 gtt_write(gtt_bar, 0x45010, reg32); in gma_pm_init_pre_vbios()
306 reg32 = gtt_read(gtt_bar, 0x911c); in gma_pm_init_pre_vbios()
308 if (reg32 & (1 << 13)) { in gma_pm_init_pre_vbios()
318 if (reg32 & (1 << 13)) { in gma_pm_init_pre_vbios()
353 reg32 = gtt_read(gtt_bar, 0xa180); in gma_pm_init_pre_vbios()
354 reg32 |= (1 << 26) | (1 << 31); in gma_pm_init_pre_vbios()
357 reg32 |= (1 << 20); in gma_pm_init_pre_vbios()
358 gtt_write(gtt_bar, 0xa180, reg32); in gma_pm_init_pre_vbios()
363 reg32 = gtt_read(gtt_bar, 0x9400); in gma_pm_init_pre_vbios()
364 reg32 |= (1 << 7); in gma_pm_init_pre_vbios()
365 gtt_write(gtt_bar, 0x9400, reg32); in gma_pm_init_pre_vbios()
367 reg32 = gtt_read(gtt_bar, 0x941c); in gma_pm_init_pre_vbios()
368 reg32 &= 0xf; in gma_pm_init_pre_vbios()
369 reg32 |= (1 << 1); in gma_pm_init_pre_vbios()
370 gtt_write(gtt_bar, 0x941c, reg32); in gma_pm_init_pre_vbios()
375 reg32 = gtt_read(gtt_bar, 0x907c); in gma_pm_init_pre_vbios()
376 reg32 |= (1 << 16); in gma_pm_init_pre_vbios()
377 gtt_write(gtt_bar, 0x907c, reg32); in gma_pm_init_pre_vbios()
440 reg32 = readl(MCHBAR_REG(0x5998)); in gma_pm_init_pre_vbios()
441 reg32 >>= 16; in gma_pm_init_pre_vbios()
442 reg32 &= 0xef; in gma_pm_init_pre_vbios()
443 reg32 <<= 25; in gma_pm_init_pre_vbios()
444 gtt_write(gtt_bar, 0xa008, reg32); in gma_pm_init_pre_vbios()
453 reg32 = gtt_read(gtt_bar, 0x6c024); in gma_pm_init_pre_vbios()
454 reg32 &= ~0x000001c0; in gma_pm_init_pre_vbios()
455 gtt_write(gtt_bar, 0x6c024, reg32); in gma_pm_init_pre_vbios()
464 u32 reg32, cycle_delay; in gma_pm_init_post_vbios() local
484 reg32 = gtt_read(gtt_bar, 0xc4030); in gma_pm_init_post_vbios()
485 if (!reg32) { in gma_pm_init_post_vbios()
492 reg32 = (dp_hotplug[0] & 0x7) << 2; in gma_pm_init_post_vbios()
493 reg32 |= (dp_hotplug[0] & 0x7) << 10; in gma_pm_init_post_vbios()
494 reg32 |= (dp_hotplug[0] & 0x7) << 18; in gma_pm_init_post_vbios()
495 gtt_write(gtt_bar, 0xc4030, reg32); in gma_pm_init_post_vbios()
499 reg32 = gtt_read(gtt_bar, 0xc7208); in gma_pm_init_post_vbios()
500 if (!reg32) { in gma_pm_init_post_vbios()
501 reg32 = (unsigned)fdtdec_get_int(blob, node, in gma_pm_init_post_vbios()
503 reg32 |= fdtdec_get_int(blob, node, "panel-power-up-delay", 0) in gma_pm_init_post_vbios()
505 reg32 |= fdtdec_get_int(blob, node, in gma_pm_init_post_vbios()
507 gtt_write(gtt_bar, 0xc7208, reg32); in gma_pm_init_post_vbios()
511 reg32 = gtt_read(gtt_bar, 0xc720c); in gma_pm_init_post_vbios()
512 if (!reg32) { in gma_pm_init_post_vbios()
513 reg32 = fdtdec_get_int(blob, node, "panel-power-down-delay", 0) in gma_pm_init_post_vbios()
515 reg32 |= fdtdec_get_int(blob, node, in gma_pm_init_post_vbios()
517 gtt_write(gtt_bar, 0xc720c, reg32); in gma_pm_init_post_vbios()
524 reg32 = gtt_read(gtt_bar, 0xc7210); in gma_pm_init_post_vbios()
525 reg32 &= ~0xff; in gma_pm_init_post_vbios()
526 reg32 |= cycle_delay; in gma_pm_init_post_vbios()
527 gtt_write(gtt_bar, 0xc7210, reg32); in gma_pm_init_post_vbios()
531 reg32 = fdtdec_get_int(blob, node, "intel,cpu-backlight", 0); in gma_pm_init_post_vbios()
532 if (reg32) { in gma_pm_init_post_vbios()
534 gtt_write(gtt_bar, 0x48254, reg32); in gma_pm_init_post_vbios()
536 reg32 = fdtdec_get_int(blob, node, "intel,pch-backlight", 0); in gma_pm_init_post_vbios()
537 if (reg32) { in gma_pm_init_post_vbios()
539 gtt_write(gtt_bar, 0xc8254, reg32); in gma_pm_init_post_vbios()
655 u32 reg32; in sandybridge_setup_graphics() local
696 reg32 = readl(MCHBAR_REG(0x5f00)); in sandybridge_setup_graphics()
697 reg32 |= (1 << 9) | (1 << 10); in sandybridge_setup_graphics()
698 writel(reg32, MCHBAR_REG(0x5f00)); in sandybridge_setup_graphics()
701 reg32 = readl(MCHBAR_REG(0x5f00)); in sandybridge_setup_graphics()
702 writel(reg32 | 1, MCHBAR_REG(0x5f00)); in sandybridge_setup_graphics()
705 reg32 = readl(MCHBAR_REG(0x5d14)); in sandybridge_setup_graphics()
706 reg32 |= (1 << 31); in sandybridge_setup_graphics()
707 writel(reg32, MCHBAR_REG(0x5d14)); in sandybridge_setup_graphics()
710 reg32 = readl(MCHBAR_REG(0x6120)); in sandybridge_setup_graphics()
711 reg32 &= ~(1 << 0); in sandybridge_setup_graphics()
712 writel(reg32, MCHBAR_REG(0x6120)); in sandybridge_setup_graphics()
714 reg32 = readl(MCHBAR_REG(0x5418)); in sandybridge_setup_graphics()
715 reg32 |= (1 << 4) | (1 << 5); in sandybridge_setup_graphics()
716 writel(reg32, MCHBAR_REG(0x5418)); in sandybridge_setup_graphics()
724 u32 reg32; in gma_func0_init() local
739 dm_pci_read_config32(dev, PCI_COMMAND, ®32); in gma_func0_init()
740 reg32 |= PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY | PCI_COMMAND_IO; in gma_func0_init()
741 dm_pci_write_config32(dev, PCI_COMMAND, reg32); in gma_func0_init()