173 			      unsigned char *test_data, unsigned char size)  in rk_mipi_phy_write()  argument
187 		rk_mipi_dsi_write(regs, PHY_TESTDIN, test_data[i]);  in rk_mipi_phy_write()
209 	unsigned char test_data[2] = {0};  in rk_mipi_phy_enable()  local
233 	test_data[0] = 0x80 | (ddr_clk / (200 * MHz)) << 3 | 0x3;  in rk_mipi_phy_enable()
234 	rk_mipi_phy_write(regs, CODE_PLL_VCORANGE_VCOCAP, test_data, 1);  in rk_mipi_phy_enable()
236 	test_data[0] = 0x8;  in rk_mipi_phy_enable()
237 	rk_mipi_phy_write(regs, CODE_PLL_CPCTRL, test_data, 1);  in rk_mipi_phy_enable()
239 	test_data[0] = 0x80 | 0x40;  in rk_mipi_phy_enable()
240 	rk_mipi_phy_write(regs, CODE_PLL_LPF_CP, test_data, 1);  in rk_mipi_phy_enable()
251 	test_data[0] = freq_rang[i][1] << 1;  in rk_mipi_phy_enable()
252 	rk_mipi_phy_write(regs, CODE_HS_RX_LANE0, test_data, 1);  in rk_mipi_phy_enable()
288 	test_data[0] = prediv - 1;  in rk_mipi_phy_enable()
289 	rk_mipi_phy_write(regs, CODE_PLL_INPUT_DIV_RAT, test_data, 1);  in rk_mipi_phy_enable()
290 	test_data[0] = (fbdiv - 1) & 0x1f;  in rk_mipi_phy_enable()
291 	rk_mipi_phy_write(regs, CODE_PLL_LOOP_DIV_RAT, test_data, 1);  in rk_mipi_phy_enable()
292 	test_data[0] = (fbdiv - 1) >> 5 | 0x80;  in rk_mipi_phy_enable()
293 	rk_mipi_phy_write(regs, CODE_PLL_LOOP_DIV_RAT, test_data, 1);  in rk_mipi_phy_enable()
294 	test_data[0] = 0x30;  in rk_mipi_phy_enable()
295 	rk_mipi_phy_write(regs, CODE_PLL_INPUT_LOOP_DIV_RAT, test_data, 1);  in rk_mipi_phy_enable()
298 	test_data[0] = 0x4d;  in rk_mipi_phy_enable()
299 	rk_mipi_phy_write(regs, CODE_BANDGAP_BIAS_CTRL, test_data, 1);  in rk_mipi_phy_enable()
301 	test_data[0] = 0x3d;  in rk_mipi_phy_enable()
302 	rk_mipi_phy_write(regs, CODE_TERMINATION_CTRL, test_data, 1);  in rk_mipi_phy_enable()
304 	test_data[0] = 0xdf;  in rk_mipi_phy_enable()
305 	rk_mipi_phy_write(regs, CODE_TERMINATION_CTRL, test_data, 1);  in rk_mipi_phy_enable()
307 	test_data[0] =  0x7;  in rk_mipi_phy_enable()
308 	rk_mipi_phy_write(regs, CODE_AFE_BIAS_BANDGAP_ANOLOG, test_data, 1);  in rk_mipi_phy_enable()
310 	test_data[0] = 0x80 | 0x7;  in rk_mipi_phy_enable()
311 	rk_mipi_phy_write(regs, CODE_AFE_BIAS_BANDGAP_ANOLOG, test_data, 1);  in rk_mipi_phy_enable()
313 	test_data[0] = 0x80 | 15;  in rk_mipi_phy_enable()
315 			  test_data, 1);  in rk_mipi_phy_enable()
316 	test_data[0] = 0x80 | 85;  in rk_mipi_phy_enable()
318 			  test_data, 1);  in rk_mipi_phy_enable()
319 	test_data[0] = 0x40 | 10;  in rk_mipi_phy_enable()
321 			  test_data, 1);  in rk_mipi_phy_enable()