Lines Matching defs:fm_bmi_rx_port
68 struct fm_bmi_rx_port { struct
69 u32 fmbm_rcfg; /* Rx configuration */
70 u32 fmbm_rst; /* Rx status */
71 u32 fmbm_rda; /* Rx DMA attributes */
72 u32 fmbm_rfp; /* Rx FIFO parameters */
73 u32 fmbm_rfed; /* Rx frame end data */
74 u32 fmbm_ricp; /* Rx internal context parameters */
75 u32 fmbm_rim; /* Rx internal margins */
76 u32 fmbm_rebm; /* Rx external buffer margins */
77 u32 fmbm_rfne; /* Rx frame next engine */
78 u32 fmbm_rfca; /* Rx frame command attributes */
79 u32 fmbm_rfpne; /* Rx frame parser next engine */
80 u32 fmbm_rpso; /* Rx parse start offset */
81 u32 fmbm_rpp; /* Rx policer profile */
82 u32 fmbm_rccb; /* Rx coarse classification base */
83 u32 res1[0x2];
84 u32 fmbm_rprai[0x8]; /* Rx parse results array Initialization */
85 u32 fmbm_rfqid; /* Rx frame queue ID */
86 u32 fmbm_refqid; /* Rx error frame queue ID */
87 u32 fmbm_rfsdm; /* Rx frame status discard mask */
88 u32 fmbm_rfsem; /* Rx frame status error mask */
89 u32 fmbm_rfene; /* Rx frame enqueue next engine */
90 u32 res2[0x23];
91 u32 fmbm_ebmpi[0x8]; /* buffer manager pool information */
92 u32 fmbm_acnt[0x8]; /* allocate counter */
93 u32 res3[0x8];
94 u32 fmbm_cgm[0x8]; /* congestion group map */
95 u32 fmbm_mpd; /* BMan pool depletion */
96 u32 res4[0x1F];
97 u32 fmbm_rstc; /* Rx statistics counters */
98 u32 fmbm_rfrc; /* Rx frame counters */
99 u32 fmbm_rfbc; /* Rx bad frames counter */
100 u32 fmbm_rlfc; /* Rx large frames counter */
101 u32 fmbm_rffc; /* Rx filter frames counter */
102 u32 fmbm_rfdc; /* Rx frame discard counter */
103 u32 fmbm_rfldec; /* Rx frames list DMA error counter */
104 u32 fmbm_rodc; /* Rx out of buffers discard counter */
105 u32 fmbm_rbdc; /* Rx buffers deallocate counter */
106 u32 res5[0x17];
107 u32 fmbm_rpc; /* Rx performance counters */
108 u32 fmbm_rpcp; /* Rx performance count parameters */
109 u32 fmbm_rccn; /* Rx cycle counter */
110 u32 fmbm_rtuc; /* Rx tasks utilization counter */
111 u32 fmbm_rrquc; /* Rx receive queue utilization counter */
112 u32 fmbm_rduc; /* Rx DMA utilization counter */
113 u32 fmbm_rfuc; /* Rx FIFO utilization counter */
114 u32 fmbm_rpac; /* Rx pause activation counter */
115 u32 res6[0x18];
116 u32 fmbm_rdbg; /* Rx debug configuration */