1616       __ vld1(Neon8, NeonListOperand(i.OutputDoubleRegister()),  in AssembleArchInstruction()
1621       __ vst1(Neon8, NeonListOperand(i.InputDoubleRegister(0)),  in AssembleArchInstruction()
1626       __ vld1(Neon8, NeonListOperand(i.OutputSimd128Register()),  in AssembleArchInstruction()
1631       __ vst1(Neon8, NeonListOperand(i.InputSimd128Register(0)),  in AssembleArchInstruction()
2160       __ vdup(Neon8, i.OutputSimd128Register(), i.InputRegister(0));  in AssembleArchInstruction()
2174       __ vneg(Neon8, i.OutputSimd128Register(), i.InputSimd128Register(0));  in AssembleArchInstruction()
2191       __ vadd(Neon8, i.OutputSimd128Register(), i.InputSimd128Register(0),  in AssembleArchInstruction()
2201       __ vsub(Neon8, i.OutputSimd128Register(), i.InputSimd128Register(0),  in AssembleArchInstruction()
2211       __ vmul(Neon8, i.OutputSimd128Register(), i.InputSimd128Register(0),  in AssembleArchInstruction()
2226       __ vceq(Neon8, i.OutputSimd128Register(), i.InputSimd128Register(0),  in AssembleArchInstruction()
2232       __ vceq(Neon8, dst, i.InputSimd128Register(0), i.InputSimd128Register(1));  in AssembleArchInstruction()
2479       __ vzip(Neon8, dst.low(), dst.high());  // dst = [0, 16, 1, 17, ... 23]  in AssembleArchInstruction()
2488       __ vzip(Neon8, dst.low(), dst.high());  // dst = [8, 24, 9, 25, ... 31]  in AssembleArchInstruction()
2499       __ vuzp(Neon8, dst, scratch);  // dst = [0, 2, 4, 6, ... 30]  in AssembleArchInstruction()
2510       __ vuzp(Neon8, scratch, dst);  // dst = [1, 3, 5, 7, ... 31]  in AssembleArchInstruction()
2521       __ vtrn(Neon8, dst, scratch);  // dst = [0, 16, 2, 18, ... 30]  in AssembleArchInstruction()
2532       __ vtrn(Neon8, scratch, dst);  // dst = [1, 17, 3, 19, ... 31]  in AssembleArchInstruction()
2584       __ vrev64(Neon8, i.OutputSimd128Register(), i.InputSimd128Register(0));  in AssembleArchInstruction()
2588       __ vrev32(Neon8, i.OutputSimd128Register(), i.InputSimd128Register(0));  in AssembleArchInstruction()
2592       __ vrev16(Neon8, i.OutputSimd128Register(), i.InputSimd128Register(0));  in AssembleArchInstruction()
3240         __ vst1(Neon8, NeonListOperand(src.low(), 2), NeonMemOperand(temp));  in AssembleMove()
3261         __ vld1(Neon8, NeonListOperand(dst.low(), 2), NeonMemOperand(temp));  in AssembleMove()
3282         __ vld1(Neon8, NeonListOperand(temp_q.low(), 2), NeonMemOperand(temp));  in AssembleMove()
3284         __ vst1(Neon8, NeonListOperand(temp_q.low(), 2), NeonMemOperand(temp));  in AssembleMove()
3393         __ vld1(Neon8, NeonListOperand(src.low(), 2), NeonMemOperand(temp));  in AssembleSwap()
3394         __ vst1(Neon8, NeonListOperand(temp_q.low(), 2), NeonMemOperand(temp));  in AssembleSwap()