1576         __ mov_b(operand, i.InputInt8(index));  in AssembleArchInstruction()
1799       int8_t lane = i.InputInt8(1);  in AssembleArchInstruction()
1810       int8_t lane = i.InputInt8(1);  in AssembleArchInstruction()
1823                   i.InputInt8(1) << 4);  in AssembleArchInstruction()
1829                    i.InputOperand(2), i.InputInt8(1) << 4);  in AssembleArchInstruction()
2036       __ Pextrd(i.OutputRegister(), i.InputSimd128Register(0), i.InputInt8(1));  in AssembleArchInstruction()
2042       __ pinsrd(i.OutputSimd128Register(), i.InputOperand(2), i.InputInt8(1));  in AssembleArchInstruction()
2048                  i.InputOperand(2), i.InputInt8(1));  in AssembleArchInstruction()
2111       __ pslld(i.OutputSimd128Register(), i.InputInt8(1));  in AssembleArchInstruction()
2117                 i.InputInt8(1));  in AssembleArchInstruction()
2122       __ psrad(i.OutputSimd128Register(), i.InputInt8(1));  in AssembleArchInstruction()
2128                 i.InputInt8(1));  in AssembleArchInstruction()
2323       __ psrld(i.OutputSimd128Register(), i.InputInt8(1));  in AssembleArchInstruction()
2329                 i.InputInt8(1));  in AssembleArchInstruction()
2404       __ Pextrw(dst, i.InputSimd128Register(0), i.InputInt8(1));  in AssembleArchInstruction()
2410       __ pinsrw(i.OutputSimd128Register(), i.InputOperand(2), i.InputInt8(1));  in AssembleArchInstruction()
2416                  i.InputOperand(2), i.InputInt8(1));  in AssembleArchInstruction()
2443       __ psllw(i.OutputSimd128Register(), i.InputInt8(1));  in AssembleArchInstruction()
2449                 i.InputInt8(1));  in AssembleArchInstruction()
2454       __ psraw(i.OutputSimd128Register(), i.InputInt8(1));  in AssembleArchInstruction()
2460                 i.InputInt8(1));  in AssembleArchInstruction()
2629       __ psrlw(i.OutputSimd128Register(), i.InputInt8(1));  in AssembleArchInstruction()
2635                 i.InputInt8(1));  in AssembleArchInstruction()
2756       __ Pextrb(dst, i.InputSimd128Register(0), i.InputInt8(1));  in AssembleArchInstruction()
2763       __ pinsrb(i.OutputSimd128Register(), i.InputOperand(2), i.InputInt8(1));  in AssembleArchInstruction()
2769                  i.InputOperand(2), i.InputInt8(1));  in AssembleArchInstruction()
2798       int8_t shift = i.InputInt8(1) & 0x7;  in AssembleArchInstruction()
2818       int8_t shift = i.InputInt8(1) & 0x7;  in AssembleArchInstruction()
2838       int8_t shift = i.InputInt8(1) & 0x7;  in AssembleArchInstruction()
3098       int8_t shift = i.InputInt8(1) & 0x7;  in AssembleArchInstruction()
3288       __ Pshufd(i.OutputSimd128Register(), i.InputOperand(0), i.InputInt8(1));  in AssembleArchInstruction()
3293       int8_t shuffle = i.InputInt8(2);  in AssembleArchInstruction()
3297       __ Pblendw(i.OutputSimd128Register(), kScratchDoubleReg, i.InputInt8(3));  in AssembleArchInstruction()
3301       ASSEMBLE_SIMD_IMM_SHUFFLE(pblendw, SSE4_1, i.InputInt8(2));  in AssembleArchInstruction()
3305       __ Pshuflw(dst, i.InputOperand(0), i.InputInt8(1));  in AssembleArchInstruction()
3306       __ Pshufhw(dst, dst, i.InputInt8(2));  in AssembleArchInstruction()
3311       __ Pshuflw(kScratchDoubleReg, i.InputOperand(1), i.InputInt8(2));  in AssembleArchInstruction()
3312       __ Pshufhw(kScratchDoubleReg, kScratchDoubleReg, i.InputInt8(3));  in AssembleArchInstruction()
3313       __ Pshuflw(dst, i.InputOperand(0), i.InputInt8(2));  in AssembleArchInstruction()
3314       __ Pshufhw(dst, dst, i.InputInt8(3));  in AssembleArchInstruction()
3315       __ Pblendw(dst, kScratchDoubleReg, i.InputInt8(4));  in AssembleArchInstruction()
3319       ASSEMBLE_SIMD_IMM_SHUFFLE(palignr, SSSE3, i.InputInt8(2));  in AssembleArchInstruction()
3324       int8_t lane = i.InputInt8(1) & 0x7;  in AssembleArchInstruction()
3339       int8_t lane = i.InputInt8(1) & 0xf;  in AssembleArchInstruction()