Lines Matching refs:kSimd128ScratchReg
2436 __ move_v(kSimd128ScratchReg, src0); in AssembleArchInstruction()
2437 src0 = kSimd128ScratchReg; in AssembleArchInstruction()
2439 __ move_v(kSimd128ScratchReg, src1); in AssembleArchInstruction()
2440 src1 = kSimd128ScratchReg; in AssembleArchInstruction()
2600 __ move_v(kSimd128ScratchReg, src0); in AssembleArchInstruction()
2601 src0 = kSimd128ScratchReg; in AssembleArchInstruction()
2603 __ move_v(kSimd128ScratchReg, src1); in AssembleArchInstruction()
2604 src1 = kSimd128ScratchReg; in AssembleArchInstruction()
2624 __ shf_w(kSimd128ScratchReg, i.InputSimd128Register(0), 0xB1); in AssembleArchInstruction()
2625 __ shf_b(i.OutputSimd128Register(), kSimd128ScratchReg, 0x1B); in AssembleArchInstruction()
2646 __ ilvr_h(kSimd128ScratchReg, src, src); in AssembleArchInstruction()
2647 __ slli_w(dst, kSimd128ScratchReg, 16); in AssembleArchInstruction()
2655 __ ilvl_h(kSimd128ScratchReg, src, src); in AssembleArchInstruction()
2656 __ slli_w(dst, kSimd128ScratchReg, 16); in AssembleArchInstruction()
2678 __ ilvr_b(kSimd128ScratchReg, src, src); in AssembleArchInstruction()
2679 __ slli_h(dst, kSimd128ScratchReg, 8); in AssembleArchInstruction()
2687 __ ilvl_b(kSimd128ScratchReg, src, src); in AssembleArchInstruction()
2688 __ slli_h(dst, kSimd128ScratchReg, 8); in AssembleArchInstruction()
2697 __ sat_s_w(kSimd128ScratchReg, src0, 15); in AssembleArchInstruction()
2699 __ pckev_h(dst, kSimd128RegZero, kSimd128ScratchReg); in AssembleArchInstruction()
2707 __ sat_u_w(kSimd128ScratchReg, src0, 15); in AssembleArchInstruction()
2709 __ pckev_h(dst, kSimd128RegZero, kSimd128ScratchReg); in AssembleArchInstruction()
2731 __ sat_s_h(kSimd128ScratchReg, src0, 7); in AssembleArchInstruction()
2733 __ pckev_b(dst, kSimd128RegZero, kSimd128ScratchReg); in AssembleArchInstruction()
2741 __ sat_u_h(kSimd128ScratchReg, src0, 7); in AssembleArchInstruction()
2743 __ pckev_b(dst, kSimd128RegZero, kSimd128ScratchReg); in AssembleArchInstruction()
2751 __ shf_w(kSimd128ScratchReg, src0, 0xB1); // 2 3 0 1 : 10110001 : 0xB1 in AssembleArchInstruction()
2753 __ fadd_w(kSimd128ScratchReg, kSimd128ScratchReg, src0); in AssembleArchInstruction()
2755 __ pckev_w(dst, kSimd128RegZero, kSimd128ScratchReg); in AssembleArchInstruction()
2763 __ hadd_s_d(kSimd128ScratchReg, src0, src0); in AssembleArchInstruction()
2765 __ pckev_w(dst, kSimd128RegZero, kSimd128ScratchReg); in AssembleArchInstruction()
2773 __ hadd_s_w(kSimd128ScratchReg, src0, src0); in AssembleArchInstruction()
2775 __ pckev_h(dst, kSimd128RegZero, kSimd128ScratchReg); in AssembleArchInstruction()
3468 MSARegister temp = kSimd128ScratchReg; in AssembleMove()
3516 MSARegister temp = kSimd128ScratchReg; in AssembleSwap()
3550 MSARegister temp = kSimd128ScratchReg; in AssembleSwap()
3587 MSARegister temp_1 = kSimd128ScratchReg; in AssembleSwap()