Lines Matching refs:InputInt8
1804 __ movb(operand, Immediate(i.InputInt8(index))); in AssembleArchInstruction()
2131 __ extractps(kScratchRegister, i.InputSimd128Register(0), i.InputInt8(1)); in AssembleArchInstruction()
2139 byte select = i.InputInt8(1) << 4 & 0x30; in AssembleArchInstruction()
2238 __ Pextrd(i.OutputRegister(), i.InputSimd128Register(0), i.InputInt8(1)); in AssembleArchInstruction()
2245 i.InputInt8(1)); in AssembleArchInstruction()
2247 __ Pinsrd(i.OutputSimd128Register(), i.InputOperand(2), i.InputInt8(1)); in AssembleArchInstruction()
2265 __ pslld(i.OutputSimd128Register(), i.InputInt8(1)); in AssembleArchInstruction()
2269 __ psrad(i.OutputSimd128Register(), i.InputInt8(1)); in AssembleArchInstruction()
2323 __ psrld(i.OutputSimd128Register(), i.InputInt8(1)); in AssembleArchInstruction()
2369 __ pextrw(dst, i.InputSimd128Register(0), i.InputInt8(1)); in AssembleArchInstruction()
2377 i.InputInt8(1)); in AssembleArchInstruction()
2379 __ pinsrw(i.OutputSimd128Register(), i.InputOperand(2), i.InputInt8(1)); in AssembleArchInstruction()
2397 __ psllw(i.OutputSimd128Register(), i.InputInt8(1)); in AssembleArchInstruction()
2401 __ psraw(i.OutputSimd128Register(), i.InputInt8(1)); in AssembleArchInstruction()
2463 __ psrlw(i.OutputSimd128Register(), i.InputInt8(1)); in AssembleArchInstruction()
2513 __ pextrb(dst, i.InputSimd128Register(0), i.InputInt8(1)); in AssembleArchInstruction()
2521 i.InputInt8(1)); in AssembleArchInstruction()
2523 __ pinsrb(i.OutputSimd128Register(), i.InputOperand(2), i.InputInt8(1)); in AssembleArchInstruction()