Lines Matching refs:Instr
285 const Instr kPopInstruction = ADDIU | (sp.code() << kRsShift) |
289 const Instr kPushInstruction = ADDIU | (sp.code() << kRsShift) |
293 const Instr kPushRegPattern =
296 const Instr kPopRegPattern =
299 const Instr kLwRegFpOffsetPattern =
302 const Instr kSwRegFpOffsetPattern =
305 const Instr kLwRegFpNegOffsetPattern =
308 const Instr kSwRegFpNegOffsetPattern =
311 const Instr kRtMask = kRtFieldMask;
312 const Instr kLwSwInstrTypeMask = 0xFFE00000;
313 const Instr kLwSwInstrArgumentMask = ~kLwSwInstrTypeMask;
314 const Instr kLwSwOffsetMask = kImm16Mask;
371 Register Assembler::GetRtReg(Instr instr) { in GetRtReg()
376 Register Assembler::GetRsReg(Instr instr) { in GetRsReg()
381 Register Assembler::GetRdReg(Instr instr) { in GetRdReg()
386 uint32_t Assembler::GetRt(Instr instr) { in GetRt()
391 uint32_t Assembler::GetRtField(Instr instr) { in GetRtField()
396 uint32_t Assembler::GetRs(Instr instr) { in GetRs()
401 uint32_t Assembler::GetRsField(Instr instr) { in GetRsField()
406 uint32_t Assembler::GetRd(Instr instr) { in GetRd()
411 uint32_t Assembler::GetRdField(Instr instr) { in GetRdField()
416 uint32_t Assembler::GetSa(Instr instr) { in GetSa()
421 uint32_t Assembler::GetSaField(Instr instr) { in GetSaField()
426 uint32_t Assembler::GetOpcodeField(Instr instr) { in GetOpcodeField()
431 uint32_t Assembler::GetFunction(Instr instr) { in GetFunction()
436 uint32_t Assembler::GetFunctionField(Instr instr) { in GetFunctionField()
441 uint32_t Assembler::GetImmediate16(Instr instr) { in GetImmediate16()
446 uint32_t Assembler::GetLabelConst(Instr instr) { in GetLabelConst()
451 bool Assembler::IsPop(Instr instr) { in IsPop()
456 bool Assembler::IsPush(Instr instr) { in IsPush()
461 bool Assembler::IsSwRegFpOffset(Instr instr) { in IsSwRegFpOffset()
466 bool Assembler::IsLwRegFpOffset(Instr instr) { in IsLwRegFpOffset()
471 bool Assembler::IsSwRegFpNegOffset(Instr instr) { in IsSwRegFpNegOffset()
477 bool Assembler::IsLwRegFpNegOffset(Instr instr) { in IsLwRegFpNegOffset()
502 bool Assembler::IsMsaBranch(Instr instr) { in IsMsaBranch()
526 bool Assembler::IsBranch(Instr instr) { in IsBranch()
551 bool Assembler::IsBc(Instr instr) { in IsBc()
557 bool Assembler::IsNal(Instr instr) { in IsNal()
564 bool Assembler::IsBzc(Instr instr) { in IsBzc()
572 bool Assembler::IsEmittedConstant(Instr instr) { in IsEmittedConstant()
578 bool Assembler::IsBeq(Instr instr) { in IsBeq()
583 bool Assembler::IsBne(Instr instr) { in IsBne()
588 bool Assembler::IsBeqzc(Instr instr) { in IsBeqzc()
594 bool Assembler::IsBnezc(Instr instr) { in IsBnezc()
600 bool Assembler::IsBeqc(Instr instr) { in IsBeqc()
608 bool Assembler::IsBnec(Instr instr) { in IsBnec()
615 bool Assembler::IsJicOrJialc(Instr instr) { in IsJicOrJialc()
621 bool Assembler::IsJump(Instr instr) { in IsJump()
632 bool Assembler::IsJ(Instr instr) { in IsJ()
639 bool Assembler::IsJal(Instr instr) { in IsJal()
644 bool Assembler::IsJr(Instr instr) { in IsJr()
654 bool Assembler::IsJalr(Instr instr) { in IsJalr()
660 bool Assembler::IsLui(Instr instr) { in IsLui()
667 bool Assembler::IsOri(Instr instr) { in IsOri()
673 bool Assembler::IsMov(Instr instr, Register rd, Register rs) { in IsMov()
687 bool Assembler::IsNop(Instr instr, unsigned int type) { in IsNop()
711 int32_t Assembler::GetBranchOffset(Instr instr) { in GetBranchOffset()
717 bool Assembler::IsLw(Instr instr) { in IsLw()
722 int16_t Assembler::GetLwOffset(Instr instr) { in GetLwOffset()
728 Instr Assembler::SetLwOffset(Instr instr, int16_t offset) { in SetLwOffset()
732 Instr temp_instr = LW | (instr & kRsFieldMask) | (instr & kRtFieldMask) in SetLwOffset()
739 bool Assembler::IsSw(Instr instr) { in IsSw()
744 Instr Assembler::SetSwOffset(Instr instr, int16_t offset) { in SetSwOffset()
750 bool Assembler::IsAddImmediate(Instr instr) { in IsAddImmediate()
755 Instr Assembler::SetAddImmediateOffset(Instr instr, int16_t offset) { in SetAddImmediateOffset()
761 bool Assembler::IsAndImmediate(Instr instr) { in IsAndImmediate()
766 static Assembler::OffsetSize OffsetSizeInBits(Instr instr) { in OffsetSizeInBits()
778 static inline int32_t AddBranchOffset(int pos, Instr instr) { in AddBranchOffset()
795 uint32_t Assembler::CreateTargetAddress(Instr instr_lui, Instr instr_jic) { in CreateTargetAddress()
838 Instr instr = instr_at(pos); in target_at()
864 Instr instr_lui = instr_at(pos + 2 * kInstrSize); in target_at()
865 Instr instr_ori = instr_at(pos + 3 * kInstrSize); in target_at()
879 Instr instr_lui = instr_at(pos + 0 * kInstrSize); in target_at()
880 Instr instr_ori = instr_at(pos + 2 * kInstrSize); in target_at()
891 Instr instr1 = instr_at(pos + 0 * kInstrSize); in target_at()
892 Instr instr2 = instr_at(pos + 1 * kInstrSize); in target_at()
917 static inline Instr SetBranchOffset(int32_t pos, int32_t target_pos, in SetBranchOffset()
918 Instr instr) { in SetBranchOffset()
934 Instr instr = instr_at(pos); in target_at_put()
954 Instr instr_lui = instr_at(pos + 2 * kInstrSize); in target_at_put()
955 Instr instr_ori = instr_at(pos + 3 * kInstrSize); in target_at_put()
964 Instr instr_b = BEQ; in target_at_put()
967 Instr instr_j = instr_at(pos + 5 * kInstrSize); in target_at_put()
968 Instr instr_branch_delay; in target_at_put()
991 Instr instr_lui = instr_at(pos + 0 * kInstrSize); in target_at_put()
992 Instr instr_ori = instr_at(pos + 2 * kInstrSize); in target_at_put()
1001 Instr instr_b = REGIMM | BGEZAL; // Branch and link. in target_at_put()
1005 Instr instr_a = ADDIU | ra.code() << kRsShift | ra.code() << kRtShift | in target_at_put()
1019 Instr instr1 = instr_at(pos + 0 * kInstrSize); in target_at_put()
1020 Instr instr2 = instr_at(pos + 1 * kInstrSize); in target_at_put()
1053 Instr instr = instr_at(l.pos()); in print()
1084 Instr instr = instr_at(fixup_pos); in bind_to()
1150 int Assembler::BranchOffset(Instr instr) { in BranchOffset()
1192 Instr instr = opcode | (rs.code() << kRsShift) | (rt.code() << kRtShift) in GenInstrRegister()
1205 Instr instr = opcode | (rs.code() << kRsShift) | (rt.code() << kRtShift) in GenInstrRegister()
1218 Instr instr = opcode | fmt | (ft.code() << kFtShift) | (fs.code() << kFsShift) in GenInstrRegister()
1231 Instr instr = opcode | (fr.code() << kFrShift) | (ft.code() << kFtShift) in GenInstrRegister()
1244 Instr instr = opcode | fmt | (rt.code() << kRtShift) in GenInstrRegister()
1256 Instr instr = in GenInstrRegister()
1268 Instr instr = opcode | (rs.code() << kRsShift) | (rt.code() << kRtShift) in GenInstrImmediate()
1278 Instr instr = opcode | (base.code() << kBaseShift) | (rt.code() << kRtShift) | in GenInstrImmediate()
1288 Instr instr = opcode | (rs.code() << kRsShift) | SF | (j & kImm16Mask); in GenInstrImmediate()
1297 Instr instr = opcode | (rs.code() << kRsShift) | (ft.code() << kFtShift) in GenInstrImmediate()
1306 Instr instr = opcode | (rs.code() << kRsShift) | (offset21 & kImm21Mask); in GenInstrImmediate()
1314 Instr instr = opcode | (rs.code() << kRsShift) | (offset21 & kImm21Mask); in GenInstrImmediate()
1322 Instr instr = opcode | (offset26 & kImm26Mask); in GenInstrImmediate()
1331 Instr instr = opcode | address; in GenInstrJump()
1341 Instr instr = MSA | operation | ((imm8 & kImm8Mask) << kWtShift) | in GenInstrMsaI8()
1355 Instr instr = MSA | operation | df | ((imm5 & kImm5Mask) << kWtShift) | in GenInstrMsaI5()
1364 Instr instr = MSA | operation | df | (m << kWtShift) | in GenInstrMsaBit()
1373 Instr instr = MSA | operation | df | ((imm10 & kImm10Mask) << kWsShift) | in GenInstrMsaI10()
1383 Instr instr = MSA | operation | df | (t.code() << kWtShift) | in GenInstrMsa3R()
1393 Instr instr = MSA | operation | df | (n << kWtShift) | in GenInstrMsaElm()
1404 Instr instr = MSA | operation | (df << 21) | (wt.code() << kWtShift) | in GenInstrMsa3RF()
1413 Instr instr = MSA | operation | (wt.code() << kWtShift) | in GenInstrMsaVec()
1423 Instr instr = MSA | operation | ((s10 & kImm10Mask) << kWtShift) | in GenInstrMsaMI10()
1432 Instr instr = MSA | MSA_2R_FORMAT | operation | df | (ws.code() << kWsShift) | in GenInstrMsa2R()
1441 Instr instr = MSA | MSA_2RF_FORMAT | operation | df | in GenInstrMsa2RF()
1452 Instr instr = in GenInstrMsaBranch()
2072 Instr instr = SPECIAL | (1 << kRsShift) | (rt.code() << kRtShift) in rotr()
2082 Instr instr = SPECIAL | (rs.code() << kRsShift) | (rt.code() << kRtShift) in rotrv()
2092 Instr instr = SPECIAL | rs.code() << kRsShift | rt.code() << kRtShift | in lsa()
2387 Instr break_instr = SPECIAL | BREAK | (code << 6); in break_()
2405 Instr instr = SPECIAL | TGE | rs.code() << kRsShift in tge()
2413 Instr instr = SPECIAL | TGEU | rs.code() << kRsShift in tgeu()
2421 Instr instr = in tlt()
2429 Instr instr = in tltu()
2438 Instr instr = in teq()
2446 Instr instr = in tne()
2452 Instr sync_instr = SPECIAL | SYNC; in sync()
2554 Instr instr = PREF | (rs.rm().code() << kRsShift) | (hint << kRtShift) in pref()
3150 Instr instr = COP1 | fmt | ft.code() << kFtShift | in cmp()
3170 Instr instr = COP1 | BC1EQZ | ft.code() << kFtShift | (offset & kImm16Mask); in bc1eqz()
3179 Instr instr = COP1 | BC1NEZ | ft.code() << kFtShift | (offset & kImm16Mask); in bc1nez()
3191 Instr instr = COP1 | fmt | ft.code() << 16 | fs.code() << kFsShift in c()
3221 Instr instr = COP1 | BC1 | cc << 18 | 0 << 16 | (offset & kImm16Mask); in bc1f()
3230 Instr instr = COP1 | BC1 | cc << 18 | 1 << 16 | (offset & kImm16Mask); in bc1t()
3394 Instr instr = MSA | MSA_2R_FORMAT | FILL | MSA_2R_DF_##format | \
3688 Instr instr = MSA | MOVE_V | (ws.code() << kWsShift) | in move_v()
3696 Instr instr = MSA | CTCMSA | (rs.code() << kWsShift) | in ctcmsa()
3704 Instr instr = MSA | CFCMSA | (cs.code() << kWsShift) | in cfcmsa()
3742 Instr instr = instr_at(pc); in MSA_BIT_LIST()
3754 Instr instr1 = instr_at(pc + 0 * kInstrSize); in MSA_BIT_LIST()
3755 Instr instr2 = instr_at(pc + 1 * kInstrSize); in MSA_BIT_LIST()
3966 Instr instr1 = instr_at(pc); in target_address_at()
3967 Instr instr2 = instr_at(pc + kInstrSize); in target_address_at()
4006 Instr instr2 = instr_at(pc + kInstrSize); in set_target_value_at()
4012 Instr instr1 = instr_at(pc); in set_target_value_at()