Lines Matching defs:rt
44 static inline bool IsZero(const Operand& rt) { in IsZero()
370 void TurboAssembler::Addu(Register rd, Register rs, const Operand& rt) { in Addu()
387 void TurboAssembler::Subu(Register rd, Register rs, const Operand& rt) { in Subu()
412 void TurboAssembler::Mul(Register rd, Register rs, const Operand& rt) { in Mul()
436 const Operand& rt) { in Mul()
480 const Operand& rt) { in Mulu()
510 void TurboAssembler::Mulh(Register rd, Register rs, const Operand& rt) { in Mulh()
533 void TurboAssembler::Mult(Register rs, const Operand& rt) { in Mult()
546 void TurboAssembler::Mulhu(Register rd, Register rs, const Operand& rt) { in Mulhu()
569 void TurboAssembler::Multu(Register rs, const Operand& rt) { in Multu()
582 void TurboAssembler::Div(Register rs, const Operand& rt) { in Div()
596 const Operand& rt) { in Div()
623 void TurboAssembler::Div(Register res, Register rs, const Operand& rt) { in Div()
646 void TurboAssembler::Mod(Register rd, Register rs, const Operand& rt) { in Mod()
669 void TurboAssembler::Modu(Register rd, Register rs, const Operand& rt) { in Modu()
692 void TurboAssembler::Divu(Register rs, const Operand& rt) { in Divu()
705 void TurboAssembler::Divu(Register res, Register rs, const Operand& rt) { in Divu()
728 void TurboAssembler::And(Register rd, Register rs, const Operand& rt) { in And()
745 void TurboAssembler::Or(Register rd, Register rs, const Operand& rt) { in Or()
762 void TurboAssembler::Xor(Register rd, Register rs, const Operand& rt) { in Xor()
779 void TurboAssembler::Nor(Register rd, Register rs, const Operand& rt) { in Nor()
792 void TurboAssembler::Neg(Register rs, const Operand& rt) { in Neg()
796 void TurboAssembler::Slt(Register rd, Register rs, const Operand& rt) { in Slt()
814 void TurboAssembler::Sltu(Register rd, Register rs, const Operand& rt) { in Sltu()
838 void TurboAssembler::Sle(Register rd, Register rs, const Operand& rt) { in Sle()
853 void TurboAssembler::Sleu(Register rd, Register rs, const Operand& rt) { in Sleu()
868 void TurboAssembler::Sge(Register rd, Register rs, const Operand& rt) { in Sge()
873 void TurboAssembler::Sgeu(Register rd, Register rs, const Operand& rt) { in Sgeu()
878 void TurboAssembler::Sgt(Register rd, Register rs, const Operand& rt) { in Sgt()
892 void TurboAssembler::Sgtu(Register rd, Register rs, const Operand& rt) { in Sgtu()
906 void TurboAssembler::Ror(Register rd, Register rs, const Operand& rt) { in Ror()
945 void TurboAssembler::Lsa(Register rd, Register rt, Register rs, uint8_t sa, in Lsa()
958 void TurboAssembler::Bovc(Register rs, Register rt, Label* L) { in Bovc()
969 void TurboAssembler::Bnvc(Register rs, Register rt, Label* L) { in Bnvc()
1637 void TurboAssembler::Ext(Register rt, Register rs, uint16_t pos, in Ext()
1657 void TurboAssembler::Ins(Register rt, Register rs, uint16_t pos, in Ins()
1711 void TurboAssembler::Seb(Register rd, Register rt) { in Seb()
1721 void TurboAssembler::Seh(Register rd, Register rt) { in Seh()
2071 void TurboAssembler::Mthc1(Register rt, FPURegister fs) { in Mthc1()
2081 void TurboAssembler::Mfhc1(Register rt, FPURegister fs) { in Mfhc1()
2332 const Operand& rt, Condition cond) { in LoadZeroOnCondition()
2459 void TurboAssembler::Movz(Register rd, Register rs, Register rt) { in Movz()
2470 void TurboAssembler::Movn(Register rd, Register rs, Register rt) { in Movn()
2753 #define BRANCH_ARGS_CHECK(cond, rs, rt) \ argument
2763 const Operand& rt, BranchDelaySlot bdslot) { in Branch()
2786 const Operand& rt, BranchDelaySlot bdslot) { in Branch()
2869 Register TurboAssembler::GetRtAsRegisterHelper(const Operand& rt, in GetRtAsRegisterHelper()
2890 Register& scratch, const Operand& rt) { in CalculateOffset()
2899 const Operand& rt) { in BranchShortHelperR6()
3110 Register rs, const Operand& rt, in BranchShortHelper()
3246 Register rs, const Operand& rt, in BranchShortCheck()
3269 const Operand& rt, BranchDelaySlot bdslot) { in BranchShort()
3274 const Operand& rt, BranchDelaySlot bdslot) { in BranchShort()
3283 const Operand& rt, BranchDelaySlot bdslot) { in BranchAndLink()
3306 const Operand& rt, BranchDelaySlot bdslot) { in BranchAndLink()
3366 const Operand& rt) { in BranchAndLinkShortHelperR6()
3509 const Operand& rt, in BranchAndLinkShortHelper()
3600 const Operand& rt, in BranchAndLinkShortCheck()
3647 Register rs, const Operand& rt, BranchDelaySlot bd) { in Jump()
3675 Condition cond, Register rs, const Operand& rt, in Jump()
3706 Condition cond, Register rs, const Operand& rt, in Jump()
3740 Condition cond, Register rs, const Operand& rt, in Jump()
3765 Register rs, const Operand& rt, BranchDelaySlot bd) { in Jump()
3771 Condition cond, Register rs, const Operand& rt, in Jump()
3800 Register rs, const Operand& rt, BranchDelaySlot bd) { in Call()
3829 Condition cond, Register rs, const Operand& rt, in Call()
3860 Register rs, const Operand& rt, BranchDelaySlot bd) { in Call()
3879 Condition cond, Register rs, const Operand& rt, in Call()
3907 void TurboAssembler::Ret(Condition cond, Register rs, const Operand& rt, in Ret()
4620 Operand rt) { in Assert()
4626 Operand rt) { in Check()