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Lines Matching refs:rd

370 void TurboAssembler::Addu(Register rd, Register rs, const Operand& rt) {  in Addu()  argument
372 addu(rd, rs, rt.rm()); in Addu()
375 addiu(rd, rs, static_cast<int32_t>(rt.immediate())); in Addu()
382 addu(rd, rs, scratch); in Addu()
387 void TurboAssembler::Daddu(Register rd, Register rs, const Operand& rt) { in Daddu() argument
389 daddu(rd, rs, rt.rm()); in Daddu()
392 daddiu(rd, rs, static_cast<int32_t>(rt.immediate())); in Daddu()
399 daddu(rd, rs, scratch); in Daddu()
404 void TurboAssembler::Subu(Register rd, Register rs, const Operand& rt) { in Subu() argument
406 subu(rd, rs, rt.rm()); in Subu()
410 addiu(rd, rs, in Subu()
420 addu(rd, rs, scratch); in Subu()
424 subu(rd, rs, scratch); in Subu()
430 void TurboAssembler::Dsubu(Register rd, Register rs, const Operand& rt) { in Dsubu() argument
432 dsubu(rd, rs, rt.rm()); in Dsubu()
434 daddiu(rd, rs, in Dsubu()
447 Daddu(rd, rs, scratch); in Dsubu()
453 dsubu(rd, rs, scratch); in Dsubu()
458 void TurboAssembler::Mul(Register rd, Register rs, const Operand& rt) { in Mul() argument
460 mul(rd, rs, rt.rm()); in Mul()
467 mul(rd, rs, scratch); in Mul()
471 void TurboAssembler::Mulh(Register rd, Register rs, const Operand& rt) { in Mulh() argument
475 mfhi(rd); in Mulh()
477 muh(rd, rs, rt.rm()); in Mulh()
487 mfhi(rd); in Mulh()
489 muh(rd, rs, scratch); in Mulh()
494 void TurboAssembler::Mulhu(Register rd, Register rs, const Operand& rt) { in Mulhu() argument
498 mfhi(rd); in Mulhu()
500 muhu(rd, rs, rt.rm()); in Mulhu()
510 mfhi(rd); in Mulhu()
512 muhu(rd, rs, scratch); in Mulhu()
517 void TurboAssembler::Dmul(Register rd, Register rs, const Operand& rt) { in Dmul() argument
520 dmul(rd, rs, rt.rm()); in Dmul()
523 mflo(rd); in Dmul()
532 dmul(rd, rs, scratch); in Dmul()
535 mflo(rd); in Dmul()
540 void TurboAssembler::Dmulh(Register rd, Register rs, const Operand& rt) { in Dmulh() argument
543 dmuh(rd, rs, rt.rm()); in Dmulh()
546 mfhi(rd); in Dmulh()
555 dmuh(rd, rs, scratch); in Dmulh()
558 mfhi(rd); in Dmulh()
651 void TurboAssembler::Mod(Register rd, Register rs, const Operand& rt) { in Mod() argument
655 mfhi(rd); in Mod()
657 mod(rd, rs, rt.rm()); in Mod()
667 mfhi(rd); in Mod()
669 mod(rd, rs, scratch); in Mod()
674 void TurboAssembler::Modu(Register rd, Register rs, const Operand& rt) { in Modu() argument
678 mfhi(rd); in Modu()
680 modu(rd, rs, rt.rm()); in Modu()
690 mfhi(rd); in Modu()
692 modu(rd, rs, scratch); in Modu()
710 void TurboAssembler::Ddiv(Register rd, Register rs, const Operand& rt) { in Ddiv() argument
714 mflo(rd); in Ddiv()
722 mflo(rd); in Ddiv()
726 ddiv(rd, rs, rt.rm()); in Ddiv()
733 ddiv(rd, rs, scratch); in Ddiv()
810 void TurboAssembler::Dmod(Register rd, Register rs, const Operand& rt) { in Dmod() argument
814 mfhi(rd); in Dmod()
822 mfhi(rd); in Dmod()
826 dmod(rd, rs, rt.rm()); in Dmod()
833 dmod(rd, rs, scratch); in Dmod()
838 void TurboAssembler::Dmodu(Register rd, Register rs, const Operand& rt) { in Dmodu() argument
842 mfhi(rd); in Dmodu()
850 mfhi(rd); in Dmodu()
854 dmodu(rd, rs, rt.rm()); in Dmodu()
861 dmodu(rd, rs, scratch); in Dmodu()
866 void TurboAssembler::And(Register rd, Register rs, const Operand& rt) { in And() argument
868 and_(rd, rs, rt.rm()); in And()
871 andi(rd, rs, static_cast<int32_t>(rt.immediate())); in And()
878 and_(rd, rs, scratch); in And()
883 void TurboAssembler::Or(Register rd, Register rs, const Operand& rt) { in Or() argument
885 or_(rd, rs, rt.rm()); in Or()
888 ori(rd, rs, static_cast<int32_t>(rt.immediate())); in Or()
895 or_(rd, rs, scratch); in Or()
900 void TurboAssembler::Xor(Register rd, Register rs, const Operand& rt) { in Xor() argument
902 xor_(rd, rs, rt.rm()); in Xor()
905 xori(rd, rs, static_cast<int32_t>(rt.immediate())); in Xor()
912 xor_(rd, rs, scratch); in Xor()
917 void TurboAssembler::Nor(Register rd, Register rs, const Operand& rt) { in Nor() argument
919 nor(rd, rs, rt.rm()); in Nor()
926 nor(rd, rs, scratch); in Nor()
934 void TurboAssembler::Slt(Register rd, Register rs, const Operand& rt) { in Slt() argument
936 slt(rd, rs, rt.rm()); in Slt()
939 slti(rd, rs, static_cast<int32_t>(rt.immediate())); in Slt()
947 slt(rd, rs, scratch); in Slt()
952 void TurboAssembler::Sltu(Register rd, Register rs, const Operand& rt) { in Sltu() argument
954 sltu(rd, rs, rt.rm()); in Sltu()
959 sltiu(rd, rs, static_cast<int32_t>(rt.immediate())); in Sltu()
963 sltiu(rd, rs, static_cast<uint16_t>(rt.immediate())); in Sltu()
971 sltu(rd, rs, scratch); in Sltu()
976 void TurboAssembler::Sle(Register rd, Register rs, const Operand& rt) { in Sle() argument
978 slt(rd, rt.rm(), rs); in Sle()
986 slt(rd, scratch, rs); in Sle()
988 xori(rd, rd, 1); in Sle()
991 void TurboAssembler::Sleu(Register rd, Register rs, const Operand& rt) { in Sleu() argument
993 sltu(rd, rt.rm(), rs); in Sleu()
1001 sltu(rd, scratch, rs); in Sleu()
1003 xori(rd, rd, 1); in Sleu()
1006 void TurboAssembler::Sge(Register rd, Register rs, const Operand& rt) { in Sge() argument
1007 Slt(rd, rs, rt); in Sge()
1008 xori(rd, rd, 1); in Sge()
1011 void TurboAssembler::Sgeu(Register rd, Register rs, const Operand& rt) { in Sgeu() argument
1012 Sltu(rd, rs, rt); in Sgeu()
1013 xori(rd, rd, 1); in Sgeu()
1016 void TurboAssembler::Sgt(Register rd, Register rs, const Operand& rt) { in Sgt() argument
1018 slt(rd, rt.rm(), rs); in Sgt()
1026 slt(rd, scratch, rs); in Sgt()
1030 void TurboAssembler::Sgtu(Register rd, Register rs, const Operand& rt) { in Sgtu() argument
1032 sltu(rd, rt.rm(), rs); in Sgtu()
1040 sltu(rd, scratch, rs); in Sgtu()
1044 void TurboAssembler::Ror(Register rd, Register rs, const Operand& rt) { in Ror() argument
1046 rotrv(rd, rs, rt.rm()); in Ror()
1052 rotr(rd, rs, ror_value); in Ror()
1056 void TurboAssembler::Dror(Register rd, Register rs, const Operand& rt) { in Dror() argument
1058 drotrv(rd, rs, rt.rm()); in Dror()
1063 drotr(rd, rs, dror_value); in Dror()
1065 drotr32(rd, rs, dror_value - 32); in Dror()
1075 void TurboAssembler::Lsa(Register rd, Register rt, Register rs, uint8_t sa, in Lsa() argument
1079 lsa(rd, rt, rs, sa - 1); in Lsa()
1081 Register tmp = rd == rt ? scratch : rd; in Lsa()
1084 Addu(rd, rt, tmp); in Lsa()
1088 void TurboAssembler::Dlsa(Register rd, Register rt, Register rs, uint8_t sa, in Dlsa() argument
1092 dlsa(rd, rt, rs, sa - 1); in Dlsa()
1094 Register tmp = rd == rt ? scratch : rd; in Dlsa()
1097 Daddu(rd, rt, tmp); in Dlsa()
1155 void TurboAssembler::Ulw(Register rd, const MemOperand& rs) { in Ulw() argument
1156 DCHECK(rd != at); in Ulw()
1159 Lw(rd, rs); in Ulw()
1166 if (rd != source.rm()) { in Ulw()
1167 lwr(rd, MemOperand(source.rm(), source.offset() + kMipsLwrOffset)); in Ulw()
1168 lwl(rd, MemOperand(source.rm(), source.offset() + kMipsLwlOffset)); in Ulw()
1174 mov(rd, scratch); in Ulw()
1179 void TurboAssembler::Ulwu(Register rd, const MemOperand& rs) { in Ulwu() argument
1181 Lwu(rd, rs); in Ulwu()
1184 Ulw(rd, rs); in Ulwu()
1185 Dext(rd, rd, 0, 32); in Ulwu()
1189 void TurboAssembler::Usw(Register rd, const MemOperand& rs) { in Usw() argument
1190 DCHECK(rd != at); in Usw()
1192 DCHECK(rd != rs.rm()); in Usw()
1194 Sw(rd, rs); in Usw()
1201 swr(rd, MemOperand(source.rm(), source.offset() + kMipsSwrOffset)); in Usw()
1202 swl(rd, MemOperand(source.rm(), source.offset() + kMipsSwlOffset)); in Usw()
1206 void TurboAssembler::Ulh(Register rd, const MemOperand& rs) { in Ulh() argument
1207 DCHECK(rd != at); in Ulh()
1210 Lh(rd, rs); in Ulh()
1220 Lb(rd, MemOperand(source.rm(), source.offset() + 1)); in Ulh()
1223 Lb(rd, source); in Ulh()
1229 Lb(rd, MemOperand(source.rm(), source.offset() + 1)); in Ulh()
1232 Lb(rd, source); in Ulh()
1235 dsll(rd, rd, 8); in Ulh()
1236 or_(rd, rd, scratch); in Ulh()
1240 void TurboAssembler::Ulhu(Register rd, const MemOperand& rs) { in Ulhu() argument
1241 DCHECK(rd != at); in Ulhu()
1244 Lhu(rd, rs); in Ulhu()
1254 Lbu(rd, MemOperand(source.rm(), source.offset() + 1)); in Ulhu()
1257 Lbu(rd, source); in Ulhu()
1263 Lbu(rd, MemOperand(source.rm(), source.offset() + 1)); in Ulhu()
1266 Lbu(rd, source); in Ulhu()
1269 dsll(rd, rd, 8); in Ulhu()
1270 or_(rd, rd, scratch); in Ulhu()
1274 void TurboAssembler::Ush(Register rd, const MemOperand& rs, Register scratch) { in Ush() argument
1275 DCHECK(rd != at); in Ush()
1280 Sh(rd, rs); in Ush()
1287 if (scratch != rd) { in Ush()
1288 mov(scratch, rd); in Ush()
1303 void TurboAssembler::Uld(Register rd, const MemOperand& rs) { in Uld() argument
1304 DCHECK(rd != at); in Uld()
1307 Ld(rd, rs); in Uld()
1314 if (rd != source.rm()) { in Uld()
1315 ldr(rd, MemOperand(source.rm(), source.offset() + kMipsLdrOffset)); in Uld()
1316 ldl(rd, MemOperand(source.rm(), source.offset() + kMipsLdlOffset)); in Uld()
1322 mov(rd, scratch); in Uld()
1331 void MacroAssembler::LoadWordPair(Register rd, const MemOperand& rs, in LoadWordPair() argument
1333 Lwu(rd, rs); in LoadWordPair()
1336 Daddu(rd, rd, scratch); in LoadWordPair()
1339 void TurboAssembler::Usd(Register rd, const MemOperand& rs) { in Usd() argument
1340 DCHECK(rd != at); in Usd()
1343 Sd(rd, rs); in Usd()
1350 sdr(rd, MemOperand(source.rm(), source.offset() + kMipsSdrOffset)); in Usd()
1351 sdl(rd, MemOperand(source.rm(), source.offset() + kMipsSdlOffset)); in Usd()
1357 void MacroAssembler::StoreWordPair(Register rd, const MemOperand& rs, in StoreWordPair() argument
1359 Sw(rd, rs); in StoreWordPair()
1360 dsrl32(scratch, rd, 0); in StoreWordPair()
1410 void TurboAssembler::Lb(Register rd, const MemOperand& rs) { in Lb() argument
1413 lb(rd, source); in Lb()
1416 void TurboAssembler::Lbu(Register rd, const MemOperand& rs) { in Lbu() argument
1419 lbu(rd, source); in Lbu()
1422 void TurboAssembler::Sb(Register rd, const MemOperand& rs) { in Sb() argument
1425 sb(rd, source); in Sb()
1428 void TurboAssembler::Lh(Register rd, const MemOperand& rs) { in Lh() argument
1431 lh(rd, source); in Lh()
1434 void TurboAssembler::Lhu(Register rd, const MemOperand& rs) { in Lhu() argument
1437 lhu(rd, source); in Lhu()
1440 void TurboAssembler::Sh(Register rd, const MemOperand& rs) { in Sh() argument
1443 sh(rd, source); in Sh()
1446 void TurboAssembler::Lw(Register rd, const MemOperand& rs) { in Lw() argument
1449 lw(rd, source); in Lw()
1452 void TurboAssembler::Lwu(Register rd, const MemOperand& rs) { in Lwu() argument
1455 lwu(rd, source); in Lwu()
1458 void TurboAssembler::Sw(Register rd, const MemOperand& rs) { in Sw() argument
1461 sw(rd, source); in Sw()
1464 void TurboAssembler::Ld(Register rd, const MemOperand& rs) { in Ld() argument
1467 ld(rd, source); in Ld()
1470 void TurboAssembler::Sd(Register rd, const MemOperand& rs) { in Sd() argument
1473 sd(rd, source); in Sd()
1500 void TurboAssembler::Ll(Register rd, const MemOperand& rs) { in Ll() argument
1504 ll(rd, rs); in Ll()
1510 ll(rd, MemOperand(scratch, 0)); in Ll()
1514 void TurboAssembler::Lld(Register rd, const MemOperand& rs) { in Lld() argument
1518 lld(rd, rs); in Lld()
1524 lld(rd, MemOperand(scratch, 0)); in Lld()
1528 void TurboAssembler::Sc(Register rd, const MemOperand& rs) { in Sc() argument
1532 sc(rd, rs); in Sc()
1538 sc(rd, MemOperand(scratch, 0)); in Sc()
1542 void TurboAssembler::Scd(Register rd, const MemOperand& rs) { in Scd() argument
1546 scd(rd, rs); in Scd()
1552 scd(rd, MemOperand(scratch, 0)); in Scd()
1585 void TurboAssembler::LiLower32BitHelper(Register rd, Operand j) { in LiLower32BitHelper() argument
1587 daddiu(rd, zero_reg, (j.immediate() & kImm16Mask)); in LiLower32BitHelper()
1589 ori(rd, zero_reg, j.immediate() & kImm16Mask); in LiLower32BitHelper()
1591 lui(rd, j.immediate() >> kLuiShift & kImm16Mask); in LiLower32BitHelper()
1593 ori(rd, rd, j.immediate() & kImm16Mask); in LiLower32BitHelper()
1704 void TurboAssembler::li_optimized(Register rd, Operand j, LiFlags mode) { in li_optimized() argument
1711 LiLower32BitHelper(rd, j); in li_optimized()
1719 ori(rd, zero_reg, j.immediate() & kImm16Mask); in li_optimized()
1720 dahi(rd, j.immediate() >> 32 & kImm16Mask); in li_optimized()
1726 ori(rd, zero_reg, j.immediate() & kImm16Mask); in li_optimized()
1727 dati(rd, j.immediate() >> 48 & kImm16Mask); in li_optimized()
1733 lui(rd, j.immediate() >> kLuiShift & kImm16Mask); in li_optimized()
1734 dahi(rd, ((j.immediate() >> 32) + bit31) & kImm16Mask); in li_optimized()
1742 lui(rd, j.immediate() >> kLuiShift & kImm16Mask); in li_optimized()
1743 dati(rd, ((j.immediate() >> 48) + bit31) & kImm16Mask); in li_optimized()
1749 daddiu(rd, zero_reg, j.immediate() & kImm16Mask); in li_optimized()
1750 dahi(rd, ((j.immediate() >> 32) + bit31) & kImm16Mask); in li_optimized()
1757 daddiu(rd, zero_reg, j.immediate() & kImm16Mask); in li_optimized()
1758 dati(rd, ((j.immediate() >> 48) + bit31) & kImm16Mask); in li_optimized()
1764 daddiu(rd, zero_reg, -1); in li_optimized()
1766 dsrl(rd, rd, shift_cnt); in li_optimized()
1768 dsrl32(rd, rd, shift_cnt & 31); in li_optimized()
1777 ori(rd, zero_reg, tmp & kImm16Mask); in li_optimized()
1779 dsll(rd, rd, shift_cnt); in li_optimized()
1781 dsll32(rd, rd, shift_cnt & 31); in li_optimized()
1786 daddiu(rd, zero_reg, static_cast<int32_t>(tmp)); in li_optimized()
1788 dsll(rd, rd, shift_cnt); in li_optimized()
1790 dsll32(rd, rd, shift_cnt & 31); in li_optimized()
1796 LiLower32BitHelper(rd, j); in li_optimized()
1797 Dins(rd, rd, 32, 32); in li_optimized()
1802 lui(rd, tmp >> kLuiShift & kImm16Mask); in li_optimized()
1803 ori(rd, rd, tmp & kImm16Mask); in li_optimized()
1805 dsll(rd, rd, shift_cnt); in li_optimized()
1807 dsll32(rd, rd, shift_cnt & 31); in li_optimized()
1815 ori(rd, zero_reg, tmp & kImm16Mask); in li_optimized()
1817 dsll(rd, rd, shift_cnt); in li_optimized()
1819 dsll32(rd, rd, shift_cnt & 31); in li_optimized()
1821 ori(rd, rd, j.immediate() & kImm16Mask); in li_optimized()
1825 daddiu(rd, zero_reg, static_cast<int32_t>(tmp)); in li_optimized()
1827 dsll(rd, rd, shift_cnt); in li_optimized()
1829 dsll32(rd, rd, shift_cnt & 31); in li_optimized()
1831 ori(rd, rd, j.immediate() & kImm16Mask); in li_optimized()
1835 LiLower32BitHelper(rd, j); in li_optimized()
1836 Dins(rd, rd, 32, 32); in li_optimized()
1842 LiLower32BitHelper(rd, j); in li_optimized()
1845 dahi(rd, imm & kImm16Mask); in li_optimized()
1849 dati(rd, imm & kImm16Mask); in li_optimized()
1854 LiLower32BitHelper(rd, k); in li_optimized()
1855 dsll(rd, rd, 16); in li_optimized()
1857 ori(rd, rd, j.immediate() & kImm16Mask); in li_optimized()
1861 LiLower32BitHelper(rd, k); in li_optimized()
1863 dsll(rd, rd, 16); in li_optimized()
1864 ori(rd, rd, (j.immediate() >> 16) & kImm16Mask); in li_optimized()
1865 dsll(rd, rd, 16); in li_optimized()
1867 ori(rd, rd, j.immediate() & kImm16Mask); in li_optimized()
1870 dsll32(rd, rd, 0); in li_optimized()
1872 ori(rd, rd, j.immediate() & kImm16Mask); in li_optimized()
1882 void TurboAssembler::li(Register rd, Operand j, LiFlags mode) { in li() argument
1893 li_optimized(rd, Operand(-j.immediate()), mode); in li()
1894 Dsubu(rd, zero_reg, rd); in li()
1897 li_optimized(rd, Operand(~j.immediate()), mode); in li()
1898 nor(rd, rd, rd); in li()
1900 li_optimized(rd, j, mode); in li()
1912 lui(rd, (immediate >> 32) & kImm16Mask); in li()
1913 ori(rd, rd, (immediate >> 16) & kImm16Mask); in li()
1914 dsll(rd, rd, 16); in li()
1915 ori(rd, rd, immediate & kImm16Mask); in li()
1919 lui(rd, (j.immediate() >> 32) & kImm16Mask); in li()
1920 ori(rd, rd, (j.immediate() >> 16) & kImm16Mask); in li()
1921 dsll(rd, rd, 16); in li()
1922 ori(rd, rd, j.immediate() & kImm16Mask); in li()
1927 lui(rd, imm >> kLuiShift & kImm16Mask); in li()
1928 ori(rd, rd, (imm & kImm16Mask)); in li()
1930 dahi(rd, imm & kImm16Mask & kImm16Mask); in li()
1932 dati(rd, imm & kImm16Mask & kImm16Mask); in li()
1934 lui(rd, (j.immediate() >> 48) & kImm16Mask); in li()
1935 ori(rd, rd, (j.immediate() >> 32) & kImm16Mask); in li()
1936 dsll(rd, rd, 16); in li()
1937 ori(rd, rd, (j.immediate() >> 16) & kImm16Mask); in li()
1938 dsll(rd, rd, 16); in li()
1939 ori(rd, rd, j.immediate() & kImm16Mask); in li()
2319 void TurboAssembler::Trunc_uw_d(Register rd, FPURegister fs, in Trunc_uw_d() argument
2322 DCHECK(rd != at); in Trunc_uw_d()
2342 mfc1(rd, scratch); in Trunc_uw_d()
2343 Or(rd, rd, 1 << 31); in Trunc_uw_d()
2350 mfc1(rd, scratch); in Trunc_uw_d()
2355 void TurboAssembler::Trunc_uw_s(Register rd, FPURegister fs, in Trunc_uw_s() argument
2358 DCHECK(rd != at); in Trunc_uw_s()
2377 mfc1(rd, scratch); in Trunc_uw_s()
2378 Or(rd, rd, 1 << 31); in Trunc_uw_s()
2385 mfc1(rd, scratch); in Trunc_uw_s()
2390 void TurboAssembler::Trunc_ul_d(Register rd, FPURegister fs, in Trunc_ul_d() argument
2393 DCHECK(result.is_valid() ? !AreAliased(rd, result, at) : !AreAliased(rd, at)); in Trunc_ul_d()
2419 dmfc1(rd, scratch); in Trunc_ul_d()
2420 Or(rd, rd, Operand(1UL << 63)); in Trunc_ul_d()
2426 dmfc1(rd, scratch); in Trunc_ul_d()
2445 void TurboAssembler::Trunc_ul_s(Register rd, FPURegister fs, in Trunc_ul_s() argument
2448 DCHECK(result.is_valid() ? !AreAliased(rd, result, at) : !AreAliased(rd, at)); in Trunc_ul_s()
2478 dmfc1(rd, scratch); in Trunc_ul_s()
2479 Or(rd, rd, Operand(1UL << 63)); in Trunc_ul_s()
2485 dmfc1(rd, scratch); in Trunc_ul_s()
2839 void TurboAssembler::Movz(Register rd, Register rs, Register rt) { in Movz() argument
2843 mov(rd, rs); in Movz()
2846 movz(rd, rs, rt); in Movz()
2850 void TurboAssembler::Movn(Register rd, Register rs, Register rt) { in Movn() argument
2854 mov(rd, rs); in Movn()
2857 movn(rd, rs, rt); in Movn()
2861 void TurboAssembler::LoadZeroOnCondition(Register rd, Register rs, in LoadZeroOnCondition() argument
2866 mov(rd, zero_reg); in LoadZeroOnCondition()
2871 LoadZeroIfConditionZero(rd, rt.rm()); in LoadZeroOnCondition()
2874 mov(rd, zero_reg); in LoadZeroOnCondition()
2880 LoadZeroIfConditionZero(rd, rs); in LoadZeroOnCondition()
2883 LoadZeroIfConditionZero(rd, t9); in LoadZeroOnCondition()
2889 LoadZeroIfConditionNotZero(rd, rt.rm()); in LoadZeroOnCondition()
2892 mov(rd, zero_reg); in LoadZeroOnCondition()
2898 LoadZeroIfConditionNotZero(rd, rs); in LoadZeroOnCondition()
2901 LoadZeroIfConditionNotZero(rd, t9); in LoadZeroOnCondition()
2908 LoadZeroIfConditionNotZero(rd, t9); in LoadZeroOnCondition()
2912 LoadZeroIfConditionNotZero(rd, t9); in LoadZeroOnCondition()
2917 LoadZeroIfConditionNotZero(rd, t9); in LoadZeroOnCondition()
2922 LoadZeroIfConditionNotZero(rd, t9); in LoadZeroOnCondition()
2929 LoadZeroIfConditionNotZero(rd, t9); in LoadZeroOnCondition()
2935 LoadZeroIfConditionNotZero(rd, t9); in LoadZeroOnCondition()
2940 LoadZeroIfConditionNotZero(rd, t9); in LoadZeroOnCondition()
2945 LoadZeroIfConditionNotZero(rd, t9); in LoadZeroOnCondition()
2989 void TurboAssembler::Movt(Register rd, Register rs, uint16_t cc) { in Movt() argument
2990 movt(rd, rs, cc); in Movt()
2993 void TurboAssembler::Movf(Register rd, Register rs, uint16_t cc) { in Movf() argument
2994 movf(rd, rs, cc); in Movf()
2997 void TurboAssembler::Clz(Register rd, Register rs) { clz(rd, rs); } in Clz() argument
2999 void TurboAssembler::Ctz(Register rd, Register rs) { in Ctz() argument
3004 rotr(rd, rs, 16); in Ctz()
3005 wsbh(rd, rd); in Ctz()
3006 bitswap(rd, rd); in Ctz()
3007 Clz(rd, rd); in Ctz()
3014 Xor(rd, scratch, rs); in Ctz()
3015 And(rd, rd, scratch); in Ctz()
3017 Clz(rd, rd); in Ctz()
3021 Subu(rd, scratch, rd); in Ctz()
3025 void TurboAssembler::Dctz(Register rd, Register rs) { in Dctz() argument
3030 dsbh(rd, rs); in Dctz()
3031 dshd(rd, rd); in Dctz()
3032 dbitswap(rd, rd); in Dctz()
3033 dclz(rd, rd); in Dctz()
3040 Xor(rd, scratch, rs); in Dctz()
3041 And(rd, rd, scratch); in Dctz()
3043 dclz(rd, rd); in Dctz()
3047 Dsubu(rd, scratch, rd); in Dctz()
3051 void TurboAssembler::Popcnt(Register rd, Register rs) { in Popcnt() argument
3089 And(rd, scratch, scratch2); in Popcnt()
3092 Addu(scratch, rd, scratch); in Popcnt()
3093 srl(rd, scratch, 4); in Popcnt()
3094 Addu(rd, rd, scratch); in Popcnt()
3096 And(rd, rd, scratch2); in Popcnt()
3098 Mul(rd, rd, scratch); in Popcnt()
3099 srl(rd, rd, shift); in Popcnt()
3102 void TurboAssembler::Dpopcnt(Register rd, Register rs) { in Dpopcnt() argument
3118 And(rd, scratch, scratch2); in Dpopcnt()
3121 Daddu(scratch, rd, scratch); in Dpopcnt()
3122 dsrl(rd, scratch, 4); in Dpopcnt()
3123 Daddu(rd, rd, scratch); in Dpopcnt()
3125 And(rd, rd, scratch2); in Dpopcnt()
3127 Dmul(rd, rd, scratch); in Dpopcnt()
3128 dsrl32(rd, rd, shift); in Dpopcnt()