Lines Matching refs:opnd
2390 void TurboAssembler::MulP(Register dst, const Operand& opnd) { in MulP() argument
2392 msgfi(dst, opnd); in MulP()
2394 msfi(dst, opnd); in MulP()
2416 void TurboAssembler::MulP(Register dst, const MemOperand& opnd) { in MulP() argument
2418 if (is_uint16(opnd.offset())) { in MulP()
2419 ms(dst, opnd); in MulP()
2420 } else if (is_int20(opnd.offset())) { in MulP()
2421 msy(dst, opnd); in MulP()
2426 if (is_int20(opnd.offset())) { in MulP()
2427 msg(dst, opnd); in MulP()
2450 void TurboAssembler::Add32(Register dst, const Operand& opnd) { in Add32() argument
2451 if (is_int16(opnd.immediate())) in Add32()
2452 ahi(dst, opnd); in Add32()
2454 afi(dst, opnd); in Add32()
2458 void TurboAssembler::Add32_RI(Register dst, const Operand& opnd) { in Add32_RI() argument
2460 Add32(dst, opnd); in Add32_RI()
2464 void TurboAssembler::AddP(Register dst, const Operand& opnd) { in AddP() argument
2466 if (is_int16(opnd.immediate())) in AddP()
2467 aghi(dst, opnd); in AddP()
2469 agfi(dst, opnd); in AddP()
2471 Add32(dst, opnd); in AddP()
2476 void TurboAssembler::Add32(Register dst, Register src, const Operand& opnd) { in Add32() argument
2478 if (CpuFeatures::IsSupported(DISTINCT_OPS) && is_int16(opnd.immediate())) { in Add32()
2479 ahik(dst, src, opnd); in Add32()
2484 Add32(dst, opnd); in Add32()
2489 const Operand& opnd) { in Add32_RRI() argument
2491 Add32(dst, src, opnd); in Add32_RRI()
2495 void TurboAssembler::AddP(Register dst, Register src, const Operand& opnd) { in AddP() argument
2497 if (CpuFeatures::IsSupported(DISTINCT_OPS) && is_int16(opnd.immediate())) { in AddP()
2498 AddPImm_RRI(dst, src, opnd); in AddP()
2503 AddP(dst, opnd); in AddP()
2580 void TurboAssembler::Add32(Register dst, const MemOperand& opnd) { in Add32() argument
2581 DCHECK(is_int20(opnd.offset())); in Add32()
2582 if (is_uint12(opnd.offset())) in Add32()
2583 a(dst, opnd); in Add32()
2585 ay(dst, opnd); in Add32()
2589 void TurboAssembler::AddP(Register dst, const MemOperand& opnd) { in AddP() argument
2591 DCHECK(is_int20(opnd.offset())); in AddP()
2592 ag(dst, opnd); in AddP()
2594 Add32(dst, opnd); in AddP()
2602 void TurboAssembler::AddP_ExtendSrc(Register dst, const MemOperand& opnd) { in AddP_ExtendSrc() argument
2604 DCHECK(is_int20(opnd.offset())); in AddP_ExtendSrc()
2605 agf(dst, opnd); in AddP_ExtendSrc()
2607 Add32(dst, opnd); in AddP_ExtendSrc()
2612 void TurboAssembler::Add32(const MemOperand& opnd, const Operand& imm) { in Add32() argument
2614 DCHECK(is_int20(opnd.offset())); in Add32()
2616 asi(opnd, imm); in Add32()
2620 void TurboAssembler::AddP(const MemOperand& opnd, const Operand& imm) { in AddP() argument
2622 DCHECK(is_int20(opnd.offset())); in AddP()
2625 agsi(opnd, imm); in AddP()
2627 asi(opnd, imm); in AddP()
2683 void TurboAssembler::AddLogical(Register dst, const MemOperand& opnd) { in AddLogical() argument
2684 DCHECK(is_int20(opnd.offset())); in AddLogical()
2685 if (is_uint12(opnd.offset())) in AddLogical()
2686 al_z(dst, opnd); in AddLogical()
2688 aly(dst, opnd); in AddLogical()
2692 void TurboAssembler::AddLogicalP(Register dst, const MemOperand& opnd) { in AddLogicalP() argument
2694 DCHECK(is_int20(opnd.offset())); in AddLogicalP()
2695 alg(dst, opnd); in AddLogicalP()
2697 AddLogical(dst, opnd); in AddLogicalP()
2842 void TurboAssembler::Sub32(Register dst, const MemOperand& opnd) { in Sub32() argument
2843 DCHECK(is_int20(opnd.offset())); in Sub32()
2844 if (is_uint12(opnd.offset())) in Sub32()
2845 s(dst, opnd); in Sub32()
2847 sy(dst, opnd); in Sub32()
2851 void TurboAssembler::SubP(Register dst, const MemOperand& opnd) { in SubP() argument
2853 sg(dst, opnd); in SubP()
2855 Sub32(dst, opnd); in SubP()
2869 void TurboAssembler::SubP_ExtendSrc(Register dst, const MemOperand& opnd) { in SubP_ExtendSrc() argument
2871 DCHECK(is_int20(opnd.offset())); in SubP_ExtendSrc()
2872 sgf(dst, opnd); in SubP_ExtendSrc()
2874 Sub32(dst, opnd); in SubP_ExtendSrc()
2880 const MemOperand& opnd) { in LoadAndSub32() argument
2882 laa(dst, dst, opnd); in LoadAndSub32()
2890 void TurboAssembler::SubLogical(Register dst, const MemOperand& opnd) { in SubLogical() argument
2891 DCHECK(is_int20(opnd.offset())); in SubLogical()
2892 if (is_uint12(opnd.offset())) in SubLogical()
2893 sl(dst, opnd); in SubLogical()
2895 sly(dst, opnd); in SubLogical()
2899 void TurboAssembler::SubLogicalP(Register dst, const MemOperand& opnd) { in SubLogicalP() argument
2900 DCHECK(is_int20(opnd.offset())); in SubLogicalP()
2902 slgf(dst, opnd); in SubLogicalP()
2904 SubLogical(dst, opnd); in SubLogicalP()
2913 const MemOperand& opnd) { in SubLogicalP_ExtendSrc() argument
2915 DCHECK(is_int20(opnd.offset())); in SubLogicalP_ExtendSrc()
2916 slgf(dst, opnd); in SubLogicalP_ExtendSrc()
2918 SubLogical(dst, opnd); in SubLogicalP_ExtendSrc()
2967 void TurboAssembler::And(Register dst, const MemOperand& opnd) { in And() argument
2968 DCHECK(is_int20(opnd.offset())); in And()
2969 if (is_uint12(opnd.offset())) in And()
2970 n(dst, opnd); in And()
2972 ny(dst, opnd); in And()
2976 void TurboAssembler::AndP(Register dst, const MemOperand& opnd) { in AndP() argument
2977 DCHECK(is_int20(opnd.offset())); in AndP()
2979 ng(dst, opnd); in AndP()
2981 And(dst, opnd); in AndP()
2986 void TurboAssembler::And(Register dst, const Operand& opnd) { nilf(dst, opnd); } in And() argument
2989 void TurboAssembler::AndP(Register dst, const Operand& opnd) { in AndP() argument
2991 intptr_t value = opnd.immediate(); in AndP()
2998 And(dst, opnd); in AndP()
3003 void TurboAssembler::And(Register dst, Register src, const Operand& opnd) { in And() argument
3005 nilf(dst, opnd); in And()
3009 void TurboAssembler::AndP(Register dst, Register src, const Operand& opnd) { in AndP() argument
3011 intptr_t value = opnd.immediate(); in AndP()
3046 AndP(dst, opnd); in AndP()
3090 void TurboAssembler::Or(Register dst, const MemOperand& opnd) { in Or() argument
3091 DCHECK(is_int20(opnd.offset())); in Or()
3092 if (is_uint12(opnd.offset())) in Or()
3093 o(dst, opnd); in Or()
3095 oy(dst, opnd); in Or()
3099 void TurboAssembler::OrP(Register dst, const MemOperand& opnd) { in OrP() argument
3100 DCHECK(is_int20(opnd.offset())); in OrP()
3102 og(dst, opnd); in OrP()
3104 Or(dst, opnd); in OrP()
3109 void TurboAssembler::Or(Register dst, const Operand& opnd) { oilf(dst, opnd); } in Or() argument
3112 void TurboAssembler::OrP(Register dst, const Operand& opnd) { in OrP() argument
3114 intptr_t value = opnd.immediate(); in OrP()
3121 Or(dst, opnd); in OrP()
3126 void TurboAssembler::Or(Register dst, Register src, const Operand& opnd) { in Or() argument
3128 oilf(dst, opnd); in Or()
3132 void TurboAssembler::OrP(Register dst, Register src, const Operand& opnd) { in OrP() argument
3134 OrP(dst, opnd); in OrP()
3178 void TurboAssembler::Xor(Register dst, const MemOperand& opnd) { in Xor() argument
3179 DCHECK(is_int20(opnd.offset())); in Xor()
3180 if (is_uint12(opnd.offset())) in Xor()
3181 x(dst, opnd); in Xor()
3183 xy(dst, opnd); in Xor()
3187 void TurboAssembler::XorP(Register dst, const MemOperand& opnd) { in XorP() argument
3188 DCHECK(is_int20(opnd.offset())); in XorP()
3190 xg(dst, opnd); in XorP()
3192 Xor(dst, opnd); in XorP()
3197 void TurboAssembler::Xor(Register dst, const Operand& opnd) { xilf(dst, opnd); } in Xor() argument
3200 void TurboAssembler::XorP(Register dst, const Operand& opnd) { in XorP() argument
3202 intptr_t value = opnd.immediate(); in XorP()
3206 Xor(dst, opnd); in XorP()
3211 void TurboAssembler::Xor(Register dst, Register src, const Operand& opnd) { in Xor() argument
3213 xilf(dst, opnd); in Xor()
3217 void TurboAssembler::XorP(Register dst, Register src, const Operand& opnd) { in XorP() argument
3219 XorP(dst, opnd); in XorP()
3242 void TurboAssembler::Load(Register dst, const Operand& opnd) { in Load() argument
3243 intptr_t value = opnd.immediate(); in Load()
3246 lghi(dst, opnd); in Load()
3248 lhi(dst, opnd); in Load()
3252 lgfi(dst, opnd); in Load()
3254 iilf(dst, opnd); in Load()
3258 llilf(dst, opnd); in Load()
3260 iilf(dst, opnd); in Load()
3271 void TurboAssembler::Load(Register dst, const MemOperand& opnd) { in Load() argument
3272 DCHECK(is_int20(opnd.offset())); in Load()
3274 lgf(dst, opnd); // 64<-32 in Load()
3276 if (is_uint12(opnd.offset())) { in Load()
3277 l(dst, opnd); in Load()
3279 ly(dst, opnd); in Load()
3315 void TurboAssembler::Cmp32(Register dst, const Operand& opnd) { in Cmp32() argument
3316 if (opnd.rmode() == RelocInfo::NONE) { in Cmp32()
3317 intptr_t value = opnd.immediate(); in Cmp32()
3319 chi(dst, opnd); in Cmp32()
3321 cfi(dst, opnd); in Cmp32()
3324 RecordRelocInfo(opnd.rmode(), opnd.immediate()); in Cmp32()
3325 cfi(dst, opnd); in Cmp32()
3331 void TurboAssembler::CmpP(Register dst, const Operand& opnd) { in CmpP() argument
3333 if (opnd.rmode() == RelocInfo::NONE) { in CmpP()
3334 cgfi(dst, opnd); in CmpP()
3336 mov(r0, opnd); // Need to generate 64-bit relocation in CmpP()
3340 Cmp32(dst, opnd); in CmpP()
3345 void TurboAssembler::Cmp32(Register dst, const MemOperand& opnd) { in Cmp32() argument
3347 DCHECK(is_int20(opnd.offset())); in Cmp32()
3348 if (is_uint12(opnd.offset())) in Cmp32()
3349 c(dst, opnd); in Cmp32()
3351 cy(dst, opnd); in Cmp32()
3355 void TurboAssembler::CmpP(Register dst, const MemOperand& opnd) { in CmpP() argument
3357 DCHECK(is_int20(opnd.offset())); in CmpP()
3359 cg(dst, opnd); in CmpP()
3361 Cmp32(dst, opnd); in CmpP()
3367 const MemOperand& opnd) { in CmpAndSwap() argument
3368 if (is_uint12(opnd.offset())) { in CmpAndSwap()
3369 cs(old_val, new_val, opnd); in CmpAndSwap()
3371 csy(old_val, new_val, opnd); in CmpAndSwap()
3392 void TurboAssembler::CmpLogical32(Register dst, const Operand& opnd) { in CmpLogical32() argument
3393 clfi(dst, opnd); in CmpLogical32()
3397 void TurboAssembler::CmpLogicalP(Register dst, const Operand& opnd) { in CmpLogicalP() argument
3399 DCHECK_EQ(static_cast<uint32_t>(opnd.immediate() >> 32), 0); in CmpLogicalP()
3400 clgfi(dst, opnd); in CmpLogicalP()
3402 CmpLogical32(dst, opnd); in CmpLogicalP()
3407 void TurboAssembler::CmpLogical32(Register dst, const MemOperand& opnd) { in CmpLogical32() argument
3409 DCHECK(is_int20(opnd.offset())); in CmpLogical32()
3410 if (is_uint12(opnd.offset())) in CmpLogical32()
3411 cl(dst, opnd); in CmpLogical32()
3413 cly(dst, opnd); in CmpLogical32()
3417 void TurboAssembler::CmpLogicalP(Register dst, const MemOperand& opnd) { in CmpLogicalP() argument
3419 DCHECK(is_int20(opnd.offset())); in CmpLogicalP()
3421 clg(dst, opnd); in CmpLogicalP()
3423 CmpLogical32(dst, opnd); in CmpLogicalP()
3436 void TurboAssembler::Branch(Condition c, const Operand& opnd) { in Branch() argument
3437 intptr_t value = opnd.immediate(); in Branch()
3439 brc(c, opnd); in Branch()
3441 brcl(c, opnd); in Branch()
3627 void TurboAssembler::StoreP(const MemOperand& mem, const Operand& opnd, in StoreP() argument
3630 DCHECK_EQ(opnd.rmode(), RelocInfo::NONE); in StoreP()
3634 mem.getIndexRegister() == r0 && is_int16(opnd.immediate())) { in StoreP()
3636 mvghi(mem, opnd); in StoreP()
3638 mvhi(mem, opnd); in StoreP()
3641 LoadImmP(scratch, opnd); in StoreP()
3949 void TurboAssembler::AddFloat32(DoubleRegister dst, const MemOperand& opnd, in AddFloat32() argument
3951 if (is_uint12(opnd.offset())) { in AddFloat32()
3952 aeb(dst, opnd); in AddFloat32()
3954 ley(scratch, opnd); in AddFloat32()
3959 void TurboAssembler::AddFloat64(DoubleRegister dst, const MemOperand& opnd, in AddFloat64() argument
3961 if (is_uint12(opnd.offset())) { in AddFloat64()
3962 adb(dst, opnd); in AddFloat64()
3964 ldy(scratch, opnd); in AddFloat64()
3969 void TurboAssembler::SubFloat32(DoubleRegister dst, const MemOperand& opnd, in SubFloat32() argument
3971 if (is_uint12(opnd.offset())) { in SubFloat32()
3972 seb(dst, opnd); in SubFloat32()
3974 ley(scratch, opnd); in SubFloat32()
3979 void TurboAssembler::SubFloat64(DoubleRegister dst, const MemOperand& opnd, in SubFloat64() argument
3981 if (is_uint12(opnd.offset())) { in SubFloat64()
3982 sdb(dst, opnd); in SubFloat64()
3984 ldy(scratch, opnd); in SubFloat64()
3989 void TurboAssembler::MulFloat32(DoubleRegister dst, const MemOperand& opnd, in MulFloat32() argument
3991 if (is_uint12(opnd.offset())) { in MulFloat32()
3992 meeb(dst, opnd); in MulFloat32()
3994 ley(scratch, opnd); in MulFloat32()
3999 void TurboAssembler::MulFloat64(DoubleRegister dst, const MemOperand& opnd, in MulFloat64() argument
4001 if (is_uint12(opnd.offset())) { in MulFloat64()
4002 mdb(dst, opnd); in MulFloat64()
4004 ldy(scratch, opnd); in MulFloat64()
4009 void TurboAssembler::DivFloat32(DoubleRegister dst, const MemOperand& opnd, in DivFloat32() argument
4011 if (is_uint12(opnd.offset())) { in DivFloat32()
4012 deb(dst, opnd); in DivFloat32()
4014 ley(scratch, opnd); in DivFloat32()
4019 void TurboAssembler::DivFloat64(DoubleRegister dst, const MemOperand& opnd, in DivFloat64() argument
4021 if (is_uint12(opnd.offset())) { in DivFloat64()
4022 ddb(dst, opnd); in DivFloat64()
4024 ldy(scratch, opnd); in DivFloat64()
4030 const MemOperand& opnd, in LoadFloat32ToDouble() argument
4032 if (is_uint12(opnd.offset())) { in LoadFloat32ToDouble()
4033 ldeb(dst, opnd); in LoadFloat32ToDouble()
4035 ley(scratch, opnd); in LoadFloat32ToDouble()