Lines Matching refs:vt3
1915 const VRegister& vt3, in ld1() argument
1917 USE(vt2, vt3); in ld1()
1919 VIXL_ASSERT(AreSameFormat(vt, vt2, vt3)); in ld1()
1920 VIXL_ASSERT(AreConsecutive(vt, vt2, vt3)); in ld1()
1927 const VRegister& vt3, in ld1() argument
1930 USE(vt2, vt3, vt4); in ld1()
1932 VIXL_ASSERT(AreSameFormat(vt, vt2, vt3, vt4)); in ld1()
1933 VIXL_ASSERT(AreConsecutive(vt, vt2, vt3, vt4)); in ld1()
1974 const VRegister& vt3, in ld3() argument
1976 USE(vt2, vt3); in ld3()
1978 VIXL_ASSERT(AreSameFormat(vt, vt2, vt3)); in ld3()
1979 VIXL_ASSERT(AreConsecutive(vt, vt2, vt3)); in ld3()
1986 const VRegister& vt3, in ld3() argument
1989 USE(vt2, vt3); in ld3()
1991 VIXL_ASSERT(AreSameFormat(vt, vt2, vt3)); in ld3()
1992 VIXL_ASSERT(AreConsecutive(vt, vt2, vt3)); in ld3()
1999 const VRegister& vt3, in ld3r() argument
2001 USE(vt2, vt3); in ld3r()
2003 VIXL_ASSERT(AreSameFormat(vt, vt2, vt3)); in ld3r()
2004 VIXL_ASSERT(AreConsecutive(vt, vt2, vt3)); in ld3r()
2011 const VRegister& vt3, in ld4() argument
2014 USE(vt2, vt3, vt4); in ld4()
2016 VIXL_ASSERT(AreSameFormat(vt, vt2, vt3, vt4)); in ld4()
2017 VIXL_ASSERT(AreConsecutive(vt, vt2, vt3, vt4)); in ld4()
2024 const VRegister& vt3, in ld4() argument
2028 USE(vt2, vt3, vt4); in ld4()
2030 VIXL_ASSERT(AreSameFormat(vt, vt2, vt3, vt4)); in ld4()
2031 VIXL_ASSERT(AreConsecutive(vt, vt2, vt3, vt4)); in ld4()
2038 const VRegister& vt3, in ld4r() argument
2041 USE(vt2, vt3, vt4); in ld4r()
2043 VIXL_ASSERT(AreSameFormat(vt, vt2, vt3, vt4)); in ld4r()
2044 VIXL_ASSERT(AreConsecutive(vt, vt2, vt3, vt4)); in ld4r()
2068 const VRegister& vt3, in st1() argument
2070 USE(vt2, vt3); in st1()
2072 VIXL_ASSERT(AreSameFormat(vt, vt2, vt3)); in st1()
2073 VIXL_ASSERT(AreConsecutive(vt, vt2, vt3)); in st1()
2080 const VRegister& vt3, in st1() argument
2083 USE(vt2, vt3, vt4); in st1()
2085 VIXL_ASSERT(AreSameFormat(vt, vt2, vt3, vt4)); in st1()
2086 VIXL_ASSERT(AreConsecutive(vt, vt2, vt3, vt4)); in st1()
2116 const VRegister& vt3, in st3() argument
2118 USE(vt2, vt3); in st3()
2120 VIXL_ASSERT(AreSameFormat(vt, vt2, vt3)); in st3()
2121 VIXL_ASSERT(AreConsecutive(vt, vt2, vt3)); in st3()
2128 const VRegister& vt3, in st3() argument
2131 USE(vt2, vt3); in st3()
2133 VIXL_ASSERT(AreSameFormat(vt, vt2, vt3)); in st3()
2134 VIXL_ASSERT(AreConsecutive(vt, vt2, vt3)); in st3()
2141 const VRegister& vt3, in st4() argument
2144 USE(vt2, vt3, vt4); in st4()
2146 VIXL_ASSERT(AreSameFormat(vt, vt2, vt3, vt4)); in st4()
2147 VIXL_ASSERT(AreConsecutive(vt, vt2, vt3, vt4)); in st4()
2154 const VRegister& vt3, in st4() argument
2158 USE(vt2, vt3, vt4); in st4()
2160 VIXL_ASSERT(AreSameFormat(vt, vt2, vt3, vt4)); in st4()
2161 VIXL_ASSERT(AreConsecutive(vt, vt2, vt3, vt4)); in st4()