Lines Matching refs:uxtl
1508 LogicVRegister extendedreg = uxtl(vform, temp2, src); in ushll()
2517 LogicVRegister Simulator::uxtl(VectorFormat vform, in uxtl() function in vixl::aarch64::Simulator
2855 uxtl(vform, temp1, src1); in uaddl()
2856 uxtl(vform, temp2, src2); in uaddl()
2879 uxtl(vform, temp, src2); in uaddw()
2947 uxtl(vform, temp1, src1); in usubl()
2948 uxtl(vform, temp2, src2); in usubl()
2971 uxtl(vform, temp, src2); in usubw()
3039 uxtl(vform, temp1, src1); in uabal()
3040 uxtl(vform, temp2, src2); in uabal()
3087 uxtl(vform, temp1, src1); in uabdl()
3088 uxtl(vform, temp2, src2); in uabdl()
3135 uxtl(vform, temp1, src1); in umull()
3136 uxtl(vform, temp2, src2); in umull()
3183 uxtl(vform, temp1, src1); in umlsl()
3184 uxtl(vform, temp2, src2); in umlsl()
3231 uxtl(vform, temp1, src1); in umlal()
3232 uxtl(vform, temp2, src2); in umlal()