Lines Matching refs:vn
1323 void Fadd(const VRegister& vd, const VRegister& vn, const VRegister& vm) { in Fadd() argument
1326 fadd(vd, vn, vm); in Fadd()
1328 void Fccmp(const VRegister& vn,
1336 FPCCompareMacro(vn, vm, nzcv, cond, trap);
1338 void Fccmpe(const VRegister& vn, in Fccmpe() argument
1342 Fccmp(vn, vm, nzcv, cond, EnableTrap); in Fccmpe()
1344 void Fcmp(const VRegister& vn,
1349 FPCompareMacro(vn, vm, trap);
1351 void Fcmp(const VRegister& vn, double value, FPTrapFlags trap = DisableTrap);
1352 void Fcmpe(const VRegister& vn, double value);
1353 void Fcmpe(const VRegister& vn, const VRegister& vm) { in Fcmpe() argument
1354 Fcmp(vn, vm, EnableTrap); in Fcmpe()
1357 const VRegister& vn, in Fcsel() argument
1363 fcsel(vd, vn, vm, cond); in Fcsel()
1365 void Fcvt(const VRegister& vd, const VRegister& vn) { in Fcvt() argument
1368 fcvt(vd, vn); in Fcvt()
1370 void Fcvtl(const VRegister& vd, const VRegister& vn) { in Fcvtl() argument
1373 fcvtl(vd, vn); in Fcvtl()
1375 void Fcvtl2(const VRegister& vd, const VRegister& vn) { in Fcvtl2() argument
1378 fcvtl2(vd, vn); in Fcvtl2()
1380 void Fcvtn(const VRegister& vd, const VRegister& vn) { in Fcvtn() argument
1383 fcvtn(vd, vn); in Fcvtn()
1385 void Fcvtn2(const VRegister& vd, const VRegister& vn) { in Fcvtn2() argument
1388 fcvtn2(vd, vn); in Fcvtn2()
1390 void Fcvtxn(const VRegister& vd, const VRegister& vn) { in Fcvtxn() argument
1393 fcvtxn(vd, vn); in Fcvtxn()
1395 void Fcvtxn2(const VRegister& vd, const VRegister& vn) { in Fcvtxn2() argument
1398 fcvtxn2(vd, vn); in Fcvtxn2()
1400 void Fcvtas(const Register& rd, const VRegister& vn) { in Fcvtas() argument
1404 fcvtas(rd, vn); in Fcvtas()
1406 void Fcvtau(const Register& rd, const VRegister& vn) { in Fcvtau() argument
1410 fcvtau(rd, vn); in Fcvtau()
1412 void Fcvtms(const Register& rd, const VRegister& vn) { in Fcvtms() argument
1416 fcvtms(rd, vn); in Fcvtms()
1418 void Fcvtmu(const Register& rd, const VRegister& vn) { in Fcvtmu() argument
1422 fcvtmu(rd, vn); in Fcvtmu()
1424 void Fcvtns(const Register& rd, const VRegister& vn) { in Fcvtns() argument
1428 fcvtns(rd, vn); in Fcvtns()
1430 void Fcvtnu(const Register& rd, const VRegister& vn) { in Fcvtnu() argument
1434 fcvtnu(rd, vn); in Fcvtnu()
1436 void Fcvtps(const Register& rd, const VRegister& vn) { in Fcvtps() argument
1440 fcvtps(rd, vn); in Fcvtps()
1442 void Fcvtpu(const Register& rd, const VRegister& vn) { in Fcvtpu() argument
1446 fcvtpu(rd, vn); in Fcvtpu()
1448 void Fcvtzs(const Register& rd, const VRegister& vn, int fbits = 0) {
1452 fcvtzs(rd, vn, fbits);
1454 void Fjcvtzs(const Register& rd, const VRegister& vn) { in Fjcvtzs() argument
1458 fjcvtzs(rd, vn); in Fjcvtzs()
1460 void Fcvtzu(const Register& rd, const VRegister& vn, int fbits = 0) {
1464 fcvtzu(rd, vn, fbits);
1466 void Fdiv(const VRegister& vd, const VRegister& vn, const VRegister& vm) { in Fdiv() argument
1469 fdiv(vd, vn, vm); in Fdiv()
1471 void Fmax(const VRegister& vd, const VRegister& vn, const VRegister& vm) { in Fmax() argument
1474 fmax(vd, vn, vm); in Fmax()
1476 void Fmaxnm(const VRegister& vd, const VRegister& vn, const VRegister& vm) { in Fmaxnm() argument
1479 fmaxnm(vd, vn, vm); in Fmaxnm()
1481 void Fmin(const VRegister& vd, const VRegister& vn, const VRegister& vm) { in Fmin() argument
1484 fmin(vd, vn, vm); in Fmin()
1486 void Fminnm(const VRegister& vd, const VRegister& vn, const VRegister& vm) { in Fminnm() argument
1489 fminnm(vd, vn, vm); in Fminnm()
1491 void Fmov(const VRegister& vd, const VRegister& vn) { in Fmov() argument
1498 if (!vd.Is(vn) || !vd.Is64Bits()) { in Fmov()
1499 fmov(vd, vn); in Fmov()
1519 void Fmov(const Register& rd, const VRegister& vn, int index) { in Fmov() argument
1522 fmov(rd, vn, index); in Fmov()
1538 void Fmov(Register rd, VRegister vn) { in Fmov() argument
1542 fmov(rd, vn); in Fmov()
1544 void Fmul(const VRegister& vd, const VRegister& vn, const VRegister& vm) { in Fmul() argument
1547 fmul(vd, vn, vm); in Fmul()
1549 void Fnmul(const VRegister& vd, const VRegister& vn, const VRegister& vm) { in Fnmul() argument
1552 fnmul(vd, vn, vm); in Fnmul()
1555 const VRegister& vn, in Fmadd() argument
1560 fmadd(vd, vn, vm, va); in Fmadd()
1563 const VRegister& vn, in Fmsub() argument
1568 fmsub(vd, vn, vm, va); in Fmsub()
1571 const VRegister& vn, in Fnmadd() argument
1576 fnmadd(vd, vn, vm, va); in Fnmadd()
1579 const VRegister& vn, in Fnmsub() argument
1584 fnmsub(vd, vn, vm, va); in Fnmsub()
1586 void Fsub(const VRegister& vd, const VRegister& vn, const VRegister& vm) { in Fsub() argument
1589 fsub(vd, vn, vm); in Fsub()
2347 void Tbl(const VRegister& vd, const VRegister& vn, const VRegister& vm) { in Tbl() argument
2350 tbl(vd, vn, vm); in Tbl()
2353 const VRegister& vn, in Tbl() argument
2358 tbl(vd, vn, vn2, vm); in Tbl()
2361 const VRegister& vn, in Tbl() argument
2367 tbl(vd, vn, vn2, vn3, vm); in Tbl()
2370 const VRegister& vn, in Tbl() argument
2377 tbl(vd, vn, vn2, vn3, vn4, vm); in Tbl()
2379 void Tbx(const VRegister& vd, const VRegister& vn, const VRegister& vm) { in Tbx() argument
2382 tbx(vd, vn, vm); in Tbx()
2385 const VRegister& vn, in Tbx() argument
2390 tbx(vd, vn, vn2, vm); in Tbx()
2393 const VRegister& vn, in Tbx() argument
2399 tbx(vd, vn, vn2, vn3, vm); in Tbx()
2402 const VRegister& vn, in Tbx() argument
2409 tbx(vd, vn, vn2, vn3, vn4, vm); in Tbx()
2665 void MASM(const VRegister& vd, const VRegister& vn, const VRegister& vm) { \
2668 ASM(vd, vn, vm); \
2749 void MASM(const VRegister& vd, const VRegister& vn) { \
2752 ASM(vd, vn); \
2766 void MASM(const VRegister& vd, const VRegister& vn, double imm) { \ in NEON_2VREG_MACRO_LIST()
2769 ASM(vd, vn, imm); \ in NEON_2VREG_MACRO_LIST()
2810 const VRegister& vn, \
2815 ASM(vd, vn, vm, vm_index); \
2859 void MASM(const VRegister& vd, const VRegister& vn, int shift) { \
2862 ASM(vd, vn, shift); \
2872 void Cmeq(const VRegister& vd, const VRegister& vn, int imm) { in Cmeq() argument
2875 cmeq(vd, vn, imm); in Cmeq()
2877 void Cmge(const VRegister& vd, const VRegister& vn, int imm) { in Cmge() argument
2880 cmge(vd, vn, imm); in Cmge()
2882 void Cmgt(const VRegister& vd, const VRegister& vn, int imm) { in Cmgt() argument
2885 cmgt(vd, vn, imm); in Cmgt()
2887 void Cmle(const VRegister& vd, const VRegister& vn, int imm) { in Cmle() argument
2890 cmle(vd, vn, imm); in Cmle()
2892 void Cmlt(const VRegister& vd, const VRegister& vn, int imm) { in Cmlt() argument
2895 cmlt(vd, vn, imm); in Cmlt()
2897 void Dup(const VRegister& vd, const VRegister& vn, int index) { in Dup() argument
2900 dup(vd, vn, index); in Dup()
2908 const VRegister& vn, in Ext() argument
2913 ext(vd, vn, vm, index); in Ext()
2916 const VRegister& vn, in Fcadd() argument
2921 fcadd(vd, vn, vm, rot); in Fcadd()
2924 const VRegister& vn, in Fcmla() argument
2930 fcmla(vd, vn, vm, vm_index, rot); in Fcmla()
2933 const VRegister& vn, in Fcmla() argument
2938 fcmla(vd, vn, vm, rot); in Fcmla()
2942 const VRegister& vn, in Ins() argument
2946 ins(vd, vd_index, vn, vn_index); in Ins()
3063 const VRegister& vn, in Mov() argument
3067 mov(vd, vd_index, vn, vn_index); in Mov()
3069 void Mov(const VRegister& vd, const VRegister& vn, int index) { in Mov() argument
3072 mov(vd, vn, index); in Mov()
3079 void Mov(const Register& rd, const VRegister& vn, int vn_index) { in Mov() argument
3082 mov(rd, vn, vn_index); in Mov()
3102 void Scvtf(const VRegister& vd, const VRegister& vn, int fbits = 0) {
3105 scvtf(vd, vn, fbits);
3107 void Ucvtf(const VRegister& vd, const VRegister& vn, int fbits = 0) {
3110 ucvtf(vd, vn, fbits);
3112 void Fcvtzs(const VRegister& vd, const VRegister& vn, int fbits = 0) {
3115 fcvtzs(vd, vn, fbits);
3117 void Fcvtzu(const VRegister& vd, const VRegister& vn, int fbits = 0) {
3120 fcvtzu(vd, vn, fbits);
3203 void Smov(const Register& rd, const VRegister& vn, int vn_index) { in Smov() argument
3206 smov(rd, vn, vn_index); in Smov()
3208 void Umov(const Register& rd, const VRegister& vn, int vn_index) { in Umov() argument
3211 umov(rd, vn, vn_index); in Umov()