Lines Matching refs:kDRegSize
249 VIXL_ASSERT((d_size == kDRegSize) || (d_size == kSRegSize) || in Test1Op_Helper()
251 VIXL_ASSERT((n_size == kDRegSize) || (n_size == kSRegSize) || in Test1Op_Helper()
268 if (n_size == kDRegSize) { in Test1Op_Helper()
279 if (d_size == kDRegSize) { in Test1Op_Helper()
391 VIXL_ASSERT((reg_size == kDRegSize) || (reg_size == kSRegSize) || in Test2Op_Helper()
406 bool double_op = reg_size == kDRegSize; in Test2Op_Helper()
549 VIXL_ASSERT((reg_size == kDRegSize) || (reg_size == kSRegSize) || in Test3Op_Helper()
565 bool double_op = reg_size == kDRegSize; in Test3Op_Helper()
708 VIXL_ASSERT((reg_size == kDRegSize) || (reg_size == kSRegSize)); in TestCmp_Helper()
723 bool double_op = reg_size == kDRegSize; in TestCmp_Helper()
850 VIXL_ASSERT((reg_size == kDRegSize) || (reg_size == kSRegSize)); in TestCmpZero_Helper()
864 bool double_op = reg_size == kDRegSize; in TestCmpZero_Helper()
981 VIXL_ASSERT((n_size == kDRegSize) || (n_size == kSRegSize) || in TestFPToFixed_Helper()
996 if (n_size == kDRegSize) { in TestFPToFixed_Helper()
1006 if (n_size == kDRegSize) { in TestFPToFixed_Helper()
1048 VIXL_ASSERT((n_size == kDRegSize) || (n_size == kSRegSize) || in TestFPToInt_Helper()
1065 if (n_size == kDRegSize) { in TestFPToInt_Helper()
1075 if (n_size == kDRegSize) { in TestFPToInt_Helper()
1704 VRegister vn_ext = (kDRegSize == vn_bits) ? vn.V8B() : vn.V16B(); in Test1OpAcrossNEON_Helper()
1705 VRegister vntmp_ext = (kDRegSize == vn_bits) ? vntmp.V8B() : vntmp.V16B(); in Test1OpAcrossNEON_Helper()
2673 VRegister vn_ext = (kDRegSize == vn_bits) ? vn.V8B() : vn.V16B(); in TestOpImmOpImmNEON_Helper()
2674 VRegister vntmp_ext = (kDRegSize == vn_bits) ? vntmp.V8B() : vntmp.V16B(); in TestOpImmOpImmNEON_Helper()