Lines Matching refs:v2i64

589   const v2i64 res0_m = __msa_hadd_s_d((v4i32)in, (v4i32)in);  in func_hadd_sw_s32()
590   const v2i64 res1_m = __msa_splati_d(res0_m, 1);  in func_hadd_sw_s32()
591   const v2i64 out = res0_m + res1_m;  in func_hadd_sw_s32()
606   const v2i64 res0 = __msa_hadd_s_d(res, res);  in func_hadd_sh_s32()
607   const v2i64 res1 = __msa_splati_d(res0, 1);  in func_hadd_sh_s32()
608   const v2i64 res2 = res0 + res1;  in func_hadd_sh_s32()
625   v2u64 res1_m = (v2u64)__msa_splati_d((v2i64)res0_m, 1);  in func_hadd_uh_u32()
699   out = (RTYPE)__msa_insert_d((v2i64)out, 0, in0);  \
700   out = (RTYPE)__msa_insert_d((v2i64)out, 1, in1);  \
720 #define ILVEV_B2_SD(...) ILVEV_B2(v2i64, __VA_ARGS__)
737 #define ILVOD_B2_SD(...) ILVOD_B2(v2i64, __VA_ARGS__)
785 #define ILVEV_W2_SD(...) ILVEV_W2(v2i64, __VA_ARGS__)
831   out0 = (RTYPE)__msa_ilvev_d((v2i64)in1, (v2i64)in0);        \
832   out1 = (RTYPE)__msa_ilvev_d((v2i64)in3, (v2i64)in2);        \
837 #define ILVEV_D2_SD(...) ILVEV_D2(v2i64, __VA_ARGS__)
916   out0 = (RTYPE)__msa_ilvr_d((v2i64)in0, (v2i64)in1);        \
917   out1 = (RTYPE)__msa_ilvr_d((v2i64)in2, (v2i64)in3);        \
1112   in0 = (RTYPE)__msa_srar_d((v2i64)in0, (v2i64)shift);  \
1113   in1 = (RTYPE)__msa_srar_d((v2i64)in1, (v2i64)shift);  \
1116 #define SRAR_D2_SD(...) SRAR_D2(v2i64, __VA_ARGS__)
1123 #define SRAR_D4_SD(...) SRAR_D4(v2i64, __VA_ARGS__)
1285   v2i64 tmp0_m, tmp1_m, tmp2_m, tmp3_m, tmp4_m, tmp5_m;                    \
1338   out0 = (RTYPE)__msa_ilvr_d((v2i64)s2_m, (v2i64)s0_m);                      \
1339   out1 = (RTYPE)__msa_ilvl_d((v2i64)s2_m, (v2i64)s0_m);                      \
1340   out2 = (RTYPE)__msa_ilvr_d((v2i64)s3_m, (v2i64)s1_m);                      \
1341   out3 = (RTYPE)__msa_ilvl_d((v2i64)s3_m, (v2i64)s1_m);                      \