Lines Matching refs:Rd
340 int s, int Rd, int Rn, uint32_t Op2) in dataProcessingCommon() argument
397 case opADD: *mPC++ = A64_ADD_W(Rd, Rn, Rm, shift, amount); break; in dataProcessingCommon()
398 case opAND: *mPC++ = A64_AND_W(Rd, Rn, Rm, shift, amount); break; in dataProcessingCommon()
399 case opORR: *mPC++ = A64_ORR_W(Rd, Rn, Rm, shift, amount); break; in dataProcessingCommon()
400 case opMVN: *mPC++ = A64_ORN_W(Rd, Rn, Rm, shift, amount); break; in dataProcessingCommon()
401 case opSUB: *mPC++ = A64_SUB_W(Rd, Rn, Rm, shift, amount, s);break; in dataProcessingCommon()
408 int s, int Rd, int Rn, uint32_t Op2) in dataProcessing() argument
415 Wd = Rd; in dataProcessing()
455 *mPC++ = A64_CSEL_W(Rd, mTmpReg1, Rd, cc); in dataProcessing()
463 int s, int Rd, int Rn, uint32_t Op2) in ADDR_ADD() argument
473 *mPC++ = A64_ADD_X_Wm_SXTW(Rd, Rn, Rm, amount); in ADDR_ADD()
479 *mPC++ = A64_ADD_X_Wm_SXTW(Rd, Rn, Rm, amount); in ADDR_ADD()
489 *mPC++ = A64_ADD_X_Wm_SXTW(Rd, Rn, Rm, amount); in ADDR_ADD()
498 int s, int Rd, int Rn, uint32_t Op2) in ADDR_SUB() argument
507 *mPC++ = A64_SUB_X_Wm_SXTW(Rd, Rn, mTmpReg1, 0); in ADDR_SUB()
518 void ArmToArm64Assembler::MLA(int cc, int s,int Rd, int Rm, int Rs, int Rn) in MLA() argument
522 *mPC++ = A64_MADD_W(Rd, Rm, Rs, Rn); in MLA()
524 dataProcessingCommon(opSUB, 1, mTmpReg1, Rd, mZeroReg); in MLA()
526 void ArmToArm64Assembler::MUL(int cc, int s, int Rd, int Rm, int Rs) in MUL() argument
530 *mPC++ = A64_MADD_W(Rd, Rm, Rs, mZeroReg); in MUL()
577 int Rd, int Rn, uint32_t op_type, uint32_t size) in dataTransfer() argument
608 *mPC++ = A64_LDRSTR_Wm_SXTW_0(op, size, Rd, addrReg, mZeroReg); in dataTransfer()
617 *mPC++ = A64_LDRSTR_Wm_SXTW_0(op, size, Rd, Rn, mAddrMode.reg_offset); in dataTransfer()
624 *mPC++ = A64_LDRSTR_Wm_SXTW_0(op, size, Rd, Rn, mZeroReg); in dataTransfer()
633 void ArmToArm64Assembler::ADDR_LDR(int cc, int Rd, int Rn, uint32_t op_type) in ADDR_LDR() argument
635 return dataTransfer(opLDR, cc, Rd, Rn, op_type, 64); in ADDR_LDR()
637 void ArmToArm64Assembler::ADDR_STR(int cc, int Rd, int Rn, uint32_t op_type) in ADDR_STR() argument
639 return dataTransfer(opSTR, cc, Rd, Rn, op_type, 64); in ADDR_STR()
641 void ArmToArm64Assembler::LDR(int cc, int Rd, int Rn, uint32_t op_type) in LDR() argument
643 return dataTransfer(opLDR, cc, Rd, Rn, op_type); in LDR()
645 void ArmToArm64Assembler::LDRB(int cc, int Rd, int Rn, uint32_t op_type) in LDRB() argument
647 return dataTransfer(opLDRB, cc, Rd, Rn, op_type); in LDRB()
649 void ArmToArm64Assembler::STR(int cc, int Rd, int Rn, uint32_t op_type) in STR() argument
651 return dataTransfer(opSTR, cc, Rd, Rn, op_type); in STR()
654 void ArmToArm64Assembler::STRB(int cc, int Rd, int Rn, uint32_t op_type) in STRB() argument
656 return dataTransfer(opSTRB, cc, Rd, Rn, op_type); in STRB()
659 void ArmToArm64Assembler::LDRH(int cc, int Rd, int Rn, uint32_t op_type) in LDRH() argument
661 return dataTransfer(opLDRH, cc, Rd, Rn, op_type); in LDRH()
672 void ArmToArm64Assembler::STRH(int cc, int Rd, int Rn, uint32_t op_type) in STRH() argument
674 return dataTransfer(opSTRH, cc, Rd, Rn, op_type); in STRH()
774 int Rd, int Rm, int Rs) in SMUL() argument
788 *mPC++ = A64_MADD_W(Rd,mTmpReg1,mTmpReg2, mZeroReg); in SMUL()
793 void ArmToArm64Assembler::SMULW(int cc, int y, int Rd, int Rm, int Rs) in SMULW() argument
804 *mPC++ = A64_UBFM_X(Rd,mTmpReg3, 16, 47); in SMULW()
809 void ArmToArm64Assembler::SMLA(int cc, int xy, int Rd, int Rm, int Rs, int Rn) in SMLA() argument
816 *mPC++ = A64_MADD_W(Rd, mTmpReg1, mTmpReg2, Rn); in SMLA()
836 void ArmToArm64Assembler::UXTB16(int cc, int Rd, int Rm, int rotate) in UXTB16() argument
845 *mPC++ = A64_AND_W(Rd,mTmpReg1, mTmpReg2); in UXTB16()
851 void ArmToArm64Assembler::UBFX(int cc, int Rd, int Rn, int lsb, int width) in UBFX() argument
854 *mPC++ = A64_UBFM_W(Rd, Rn, lsb, lsb + width - 1); in UBFX()
1044 uint32_t ArmToArm64Assembler::A64_ADD_X_Wm_SXTW(uint32_t Rd, in A64_ADD_X_Wm_SXTW() argument
1049 LOG_INSTR("ADD X%d, X%d, W%d, SXTW #%d\n", Rd, Rn, Rm, amount); in A64_ADD_X_Wm_SXTW()
1051 (0x6 << 13) | (amount << 10) | (Rn << 5) | Rd); in A64_ADD_X_Wm_SXTW()
1055 uint32_t ArmToArm64Assembler::A64_SUB_X_Wm_SXTW(uint32_t Rd, in A64_SUB_X_Wm_SXTW() argument
1060 LOG_INSTR("SUB X%d, X%d, W%d, SXTW #%d\n", Rd, Rn, Rm, amount); in A64_SUB_X_Wm_SXTW()
1062 (0x6 << 13) | (amount << 10) | (Rn << 5) | Rd); in A64_SUB_X_Wm_SXTW()
1072 uint32_t ArmToArm64Assembler::A64_ADD_X(uint32_t Rd, uint32_t Rn, in A64_ADD_X() argument
1077 Rd, Rn, Rm, shift_codes[shift], amount); in A64_ADD_X()
1079 (amount << 10) |(Rn << 5) | Rd); in A64_ADD_X()
1081 uint32_t ArmToArm64Assembler::A64_ADD_IMM_X(uint32_t Rd, uint32_t Rn, in A64_ADD_IMM_X() argument
1084 LOG_INSTR("ADD X%d, X%d, #%d, LSL #%d\n", Rd, Rn, imm, shift); in A64_ADD_IMM_X()
1085 return (0x91 << 24) | ((shift/12) << 22) | (imm << 10) | (Rn << 5) | Rd; in A64_ADD_IMM_X()
1088 uint32_t ArmToArm64Assembler::A64_SUB_IMM_X(uint32_t Rd, uint32_t Rn, in A64_SUB_IMM_X() argument
1091 LOG_INSTR("SUB X%d, X%d, #%d, LSL #%d\n", Rd, Rn, imm, shift); in A64_SUB_IMM_X()
1092 return (0xD1 << 24) | ((shift/12) << 22) | (imm << 10) | (Rn << 5) | Rd; in A64_SUB_IMM_X()
1095 uint32_t ArmToArm64Assembler::A64_ADD_W(uint32_t Rd, uint32_t Rn, in A64_ADD_W() argument
1100 Rd, Rn, Rm, shift_codes[shift], amount); in A64_ADD_W()
1102 (amount << 10) |(Rn << 5) | Rd); in A64_ADD_W()
1105 uint32_t ArmToArm64Assembler::A64_SUB_W(uint32_t Rd, uint32_t Rn, in A64_SUB_W() argument
1113 Rd, Rn, Rm, shift_codes[shift], amount); in A64_SUB_W()
1115 (amount << 10) |(Rn << 5) | Rd); in A64_SUB_W()
1120 Rd, Rn, Rm, shift_codes[shift], amount); in A64_SUB_W()
1122 (amount << 10) |(Rn << 5) | Rd); in A64_SUB_W()
1126 uint32_t ArmToArm64Assembler::A64_AND_W(uint32_t Rd, uint32_t Rn, in A64_AND_W() argument
1131 Rd, Rn, Rm, shift_codes[shift], amount); in A64_AND_W()
1133 (amount << 10) |(Rn << 5) | Rd); in A64_AND_W()
1136 uint32_t ArmToArm64Assembler::A64_ORR_W(uint32_t Rd, uint32_t Rn, in A64_ORR_W() argument
1141 Rd, Rn, Rm, shift_codes[shift], amount); in A64_ORR_W()
1143 (amount << 10) |(Rn << 5) | Rd); in A64_ORR_W()
1146 uint32_t ArmToArm64Assembler::A64_ORN_W(uint32_t Rd, uint32_t Rn, in A64_ORN_W() argument
1151 Rd, Rn, Rm, shift_codes[shift], amount); in A64_ORN_W()
1153 (amount << 10) |(Rn << 5) | Rd); in A64_ORN_W()
1156 uint32_t ArmToArm64Assembler::A64_CSEL_X(uint32_t Rd, uint32_t Rn, in A64_CSEL_X() argument
1159 LOG_INSTR("CSEL X%d, X%d, X%d, %s\n", Rd, Rn, Rm, cc_codes[cond]); in A64_CSEL_X()
1160 return ((0x9A << 24)|(0x1 << 23)|(Rm << 16) |(cond << 12)| (Rn << 5) | Rd); in A64_CSEL_X()
1163 uint32_t ArmToArm64Assembler::A64_CSEL_W(uint32_t Rd, uint32_t Rn, in A64_CSEL_W() argument
1166 LOG_INSTR("CSEL W%d, W%d, W%d, %s\n", Rd, Rn, Rm, cc_codes[cond]); in A64_CSEL_W()
1167 return ((0x1A << 24)|(0x1 << 23)|(Rm << 16) |(cond << 12)| (Rn << 5) | Rd); in A64_CSEL_W()
1176 uint32_t ArmToArm64Assembler::A64_MOVZ_X(uint32_t Rd, uint32_t imm, in A64_MOVZ_X() argument
1179 LOG_INSTR("MOVZ X%d, #0x%x, LSL #%d\n", Rd, imm, shift); in A64_MOVZ_X()
1180 return(0xD2 << 24) | (0x1 << 23) | ((shift/16) << 21) | (imm << 5) | Rd; in A64_MOVZ_X()
1183 uint32_t ArmToArm64Assembler::A64_MOVK_W(uint32_t Rd, uint32_t imm, in A64_MOVK_W() argument
1186 LOG_INSTR("MOVK W%d, #0x%x, LSL #%d\n", Rd, imm, shift); in A64_MOVK_W()
1187 return (0x72 << 24) | (0x1 << 23) | ((shift/16) << 21) | (imm << 5) | Rd; in A64_MOVK_W()
1190 uint32_t ArmToArm64Assembler::A64_MOVZ_W(uint32_t Rd, uint32_t imm, in A64_MOVZ_W() argument
1193 LOG_INSTR("MOVZ W%d, #0x%x, LSL #%d\n", Rd, imm, shift); in A64_MOVZ_W()
1194 return(0x52 << 24) | (0x1 << 23) | ((shift/16) << 21) | (imm << 5) | Rd; in A64_MOVZ_W()
1197 uint32_t ArmToArm64Assembler::A64_SMADDL(uint32_t Rd, uint32_t Rn, in A64_SMADDL() argument
1200 LOG_INSTR("SMADDL X%d, W%d, W%d, X%d\n",Rd, Rn, Rm, Ra); in A64_SMADDL()
1201 return ((0x9B << 24) | (0x1 << 21) | (Rm << 16)|(Ra << 10)|(Rn << 5) | Rd); in A64_SMADDL()
1204 uint32_t ArmToArm64Assembler::A64_MADD_W(uint32_t Rd, uint32_t Rn, in A64_MADD_W() argument
1207 LOG_INSTR("MADD W%d, W%d, W%d, W%d\n",Rd, Rn, Rm, Ra); in A64_MADD_W()
1208 return ((0x1B << 24) | (Rm << 16) | (Ra << 10) |(Rn << 5) | Rd); in A64_MADD_W()
1211 uint32_t ArmToArm64Assembler::A64_SBFM_W(uint32_t Rd, uint32_t Rn, in A64_SBFM_W() argument
1214 LOG_INSTR("SBFM W%d, W%d, #%d, #%d\n", Rd, Rn, immr, imms); in A64_SBFM_W()
1215 return ((0x13 << 24) | (immr << 16) | (imms << 10) | (Rn << 5) | Rd); in A64_SBFM_W()
1218 uint32_t ArmToArm64Assembler::A64_UBFM_W(uint32_t Rd, uint32_t Rn, in A64_UBFM_W() argument
1221 LOG_INSTR("UBFM W%d, W%d, #%d, #%d\n", Rd, Rn, immr, imms); in A64_UBFM_W()
1222 return ((0x53 << 24) | (immr << 16) | (imms << 10) | (Rn << 5) | Rd); in A64_UBFM_W()
1225 uint32_t ArmToArm64Assembler::A64_UBFM_X(uint32_t Rd, uint32_t Rn, in A64_UBFM_X() argument
1228 LOG_INSTR("UBFM X%d, X%d, #%d, #%d\n", Rd, Rn, immr, imms); in A64_UBFM_X()
1230 (immr << 16) | (imms << 10) | (Rn << 5) | Rd); in A64_UBFM_X()
1233 uint32_t ArmToArm64Assembler::A64_EXTR_W(uint32_t Rd, uint32_t Rn, in A64_EXTR_W() argument
1236 LOG_INSTR("EXTR W%d, W%d, W%d, #%d\n", Rd, Rn, Rm, lsb); in A64_EXTR_W()
1237 return (0x13 << 24)|(0x1 << 23) | (Rm << 16) | (lsb << 10)|(Rn << 5) | Rd; in A64_EXTR_W()