Lines Matching refs:Rt
1002 uint32_t size, uint32_t Rt, in A64_LDRSTR_Wm_SXTW_0() argument
1008 dataTransferOpName[op], Rt, Rn, Rm); in A64_LDRSTR_Wm_SXTW_0()
1009 return(dataTransferOpCode[op] | (Rm << 16) | (Rn << 5) | Rt); in A64_LDRSTR_Wm_SXTW_0()
1014 dataTransferOpName[op], Rt, Rn, Rm); in A64_LDRSTR_Wm_SXTW_0()
1015 return(dataTransferOpCode[op] | (0x1<<30) | (Rm<<16) | (Rn<<5)|Rt); in A64_LDRSTR_Wm_SXTW_0()
1019 uint32_t ArmToArm64Assembler::A64_STR_IMM_PreIndex(uint32_t Rt, in A64_STR_IMM_PreIndex() argument
1023 LOG_INSTR("STR W%d, [SP, #%d]!\n", Rt, simm); in A64_STR_IMM_PreIndex()
1025 LOG_INSTR("STR W%d, [X%d, #%d]!\n", Rt, Rn, simm); in A64_STR_IMM_PreIndex()
1028 return (0xB8 << 24) | (imm9 << 12) | (0x3 << 10) | (Rn << 5) | Rt; in A64_STR_IMM_PreIndex()
1031 uint32_t ArmToArm64Assembler::A64_LDR_IMM_PostIndex(uint32_t Rt, in A64_LDR_IMM_PostIndex() argument
1035 LOG_INSTR("LDR W%d, [SP], #%d\n",Rt,simm); in A64_LDR_IMM_PostIndex()
1037 LOG_INSTR("LDR W%d, [X%d], #%d\n",Rt, Rn, simm); in A64_LDR_IMM_PostIndex()
1041 (imm9 << 12) | (0x1 << 10) | (Rn << 5) | Rt; in A64_LDR_IMM_PostIndex()