Lines Matching refs:amount
374 uint32_t amount; in dataProcessingCommon() local
380 amount = mAddrMode.reg_imm_shift; in dataProcessingCommon()
386 amount = 0; in dataProcessingCommon()
397 case opADD: *mPC++ = A64_ADD_W(Rd, Rn, Rm, shift, amount); break; in dataProcessingCommon()
398 case opAND: *mPC++ = A64_AND_W(Rd, Rn, Rm, shift, amount); break; in dataProcessingCommon()
399 case opORR: *mPC++ = A64_ORR_W(Rd, Rn, Rm, shift, amount); break; in dataProcessingCommon()
400 case opMVN: *mPC++ = A64_ORN_W(Rd, Rn, Rm, shift, amount); break; in dataProcessingCommon()
401 case opSUB: *mPC++ = A64_SUB_W(Rd, Rn, Rm, shift, amount, s);break; in dataProcessingCommon()
472 int amount = mAddrMode.reg_imm_shift; in ADDR_ADD() local
473 *mPC++ = A64_ADD_X_Wm_SXTW(Rd, Rn, Rm, amount); in ADDR_ADD()
478 int amount = 0; in ADDR_ADD() local
479 *mPC++ = A64_ADD_X_Wm_SXTW(Rd, Rn, Rm, amount); in ADDR_ADD()
488 int amount = 0; in ADDR_ADD() local
489 *mPC++ = A64_ADD_X_Wm_SXTW(Rd, Rn, Rm, amount); in ADDR_ADD()
1047 uint32_t amount) in A64_ADD_X_Wm_SXTW() argument
1049 LOG_INSTR("ADD X%d, X%d, W%d, SXTW #%d\n", Rd, Rn, Rm, amount); in A64_ADD_X_Wm_SXTW()
1051 (0x6 << 13) | (amount << 10) | (Rn << 5) | Rd); in A64_ADD_X_Wm_SXTW()
1058 uint32_t amount) in A64_SUB_X_Wm_SXTW() argument
1060 LOG_INSTR("SUB X%d, X%d, W%d, SXTW #%d\n", Rd, Rn, Rm, amount); in A64_SUB_X_Wm_SXTW()
1062 (0x6 << 13) | (amount << 10) | (Rn << 5) | Rd); in A64_SUB_X_Wm_SXTW()
1074 uint32_t amount) in A64_ADD_X() argument
1077 Rd, Rn, Rm, shift_codes[shift], amount); in A64_ADD_X()
1079 (amount << 10) |(Rn << 5) | Rd); in A64_ADD_X()
1097 uint32_t amount) in A64_ADD_W() argument
1100 Rd, Rn, Rm, shift_codes[shift], amount); in A64_ADD_W()
1102 (amount << 10) |(Rn << 5) | Rd); in A64_ADD_W()
1107 uint32_t amount, in A64_SUB_W() argument
1113 Rd, Rn, Rm, shift_codes[shift], amount); in A64_SUB_W()
1115 (amount << 10) |(Rn << 5) | Rd); in A64_SUB_W()
1120 Rd, Rn, Rm, shift_codes[shift], amount); in A64_SUB_W()
1122 (amount << 10) |(Rn << 5) | Rd); in A64_SUB_W()
1128 uint32_t amount) in A64_AND_W() argument
1131 Rd, Rn, Rm, shift_codes[shift], amount); in A64_AND_W()
1133 (amount << 10) |(Rn << 5) | Rd); in A64_AND_W()
1138 uint32_t amount) in A64_ORR_W() argument
1141 Rd, Rn, Rm, shift_codes[shift], amount); in A64_ORR_W()
1143 (amount << 10) |(Rn << 5) | Rd); in A64_ORR_W()
1148 uint32_t amount) in A64_ORN_W() argument
1151 Rd, Rn, Rm, shift_codes[shift], amount); in A64_ORN_W()
1153 (amount << 10) |(Rn << 5) | Rd); in A64_ORN_W()