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Lines Matching refs:AL

207             MOV(AL, 0, parts.count.reg,  in scanline_core()
209 ADD(AL, 0, parts.count.reg, parts.count.reg, in scanline_core()
211 MOV(AL, 0, parts.count.reg, in scanline_core()
264 AND(AL, 0, parts.dither.reg, parts.count.reg, imm(mask)); in scanline_core()
265 ADDR_ADD(AL, 0, parts.dither.reg, ctxtReg, parts.dither.reg); in scanline_core()
266 LDRB(AL, parts.dither.reg, parts.dither.reg, in scanline_core()
323 SUB(AL, S, parts.count.reg, parts.count.reg, imm(1<<16)); in scanline_core()
338 ADDR_ADD(AL, 0, parts.cbPtr.reg, parts.cbPtr.reg, imm(parts.cbPtr.size>>3)); in scanline_core()
340 SUB(AL, S, parts.count.reg, parts.count.reg, imm(1<<16)); in scanline_core()
365 SUB(AL, 0, parts.count.reg, parts.count.reg, Rx); in build_scanline_prolog()
366 SUB(AL, 0, parts.count.reg, parts.count.reg, imm(1)); in build_scanline_prolog()
376 AND(AL, 0, tx, Rx, imm(GGL_DITHER_MASK)); in build_scanline_prolog()
377 AND(AL, 0, ty, Ry, imm(GGL_DITHER_MASK)); in build_scanline_prolog()
378 ADD(AL, 0, tx, tx, reg_imm(ty, LSL, GGL_DITHER_ORDER_SHIFT)); in build_scanline_prolog()
379 ORR(AL, 0, parts.count.reg, tx, reg_imm(parts.count.reg, LSL, 16)); in build_scanline_prolog()
383 MOV(AL, 0, parts.count.reg, reg_imm(parts.count.reg, LSL, 16)); in build_scanline_prolog()
394 SMLABB(AL, Rs, Ry, Rs, Rx); // Rs = Rx + Ry*Rs in build_scanline_prolog()
409 MLA(AL, 0, f, Rx, dfdx, ydfdy); in build_scanline_prolog()
422 MLA(AL, 0, parts.z.reg, Rx, dzdx, ydzdy); in build_scanline_prolog()
430 SMLABB(AL, Rs, Ry, Rs, Rx); in build_scanline_prolog()
431 ADD(AL, 0, Rs, Rs, reg_imm(parts.count.reg, LSR, 16)); in build_scanline_prolog()
432 ADDR_ADD(AL, 0, zbase, zbase, reg_imm(Rs, LSL, 1)); in build_scanline_prolog()
447 ADDR_ADD(AL, 0, parts.covPtr.reg, parts.covPtr.reg, reg_imm(Rx, LSL, 1)); in build_scanline_prolog()
554 MOV(AL, 0, fragment.reg, reg_imm(incoming.reg, LSR, incoming.l)); in build_incoming_component()
573 MOV(AL, 0, mAlphaSource.reg, in build_incoming_component()
582 MOV(AL, 0, mAlphaSource.reg, in build_incoming_component()
585 MOV(AL, 0, mAlphaSource.reg, fragment.reg); in build_incoming_component()
652 ADD(AL, 0, c, c, dx); in build_smooth_shade()
681 LDRH(AL, cf, parts.covPtr.reg, immed8_post(2)); in build_coverage_application()
684 SMULWB(AL, fragment.reg, incoming.reg, cf); in build_coverage_application()
686 MOV(AL, 0, fragment.reg, reg_imm(incoming.reg, LSL, 1)); in build_coverage_application()
687 SMULWB(AL, fragment.reg, fragment.reg, cf); in build_coverage_application()
703 if (shift) CMP(AL, fragment.reg, reg_imm(ref, LSR, shift)); in build_alpha_test()
704 else CMP(AL, fragment.reg, ref); in build_alpha_test()
730 int cc=AL, ic=AL; in build_depth_test()
742 B(AL, "discard_before_textures"); in build_depth_test()
767 ADDR_SUB(AL, 0, zbase, zbase, reg_imm(parts.count.reg, LSR, 15)); in build_depth_test()
771 LDRH(AL, depth, zbase); // stall in build_depth_test()
772 CMP(AL, depth, reg_imm(z, LSR, 16)); in build_depth_test()
778 ic = AL; in build_depth_test()
780 MOV(AL, 0, depth, reg_imm(z, LSR, 16)); in build_depth_test()
793 ADD(AL, 0, parts.z.reg, parts.z.reg, dzdx); in build_iterate_z()
806 ADD(AL, 0, f, f, dfdx); in build_iterate_f()
830 case GGL_CLEAR: MOV(AL, 0, pixel.reg, imm(0)); break; in build_logic_op()
831 case GGL_AND: AND(AL, 0, pixel.reg, s.reg, d.reg); break; in build_logic_op()
832 case GGL_AND_REVERSE: BIC(AL, 0, pixel.reg, s.reg, d.reg); break; in build_logic_op()
834 case GGL_AND_INVERTED: BIC(AL, 0, pixel.reg, d.reg, s.reg); break; in build_logic_op()
835 case GGL_NOOP: MOV(AL, 0, pixel.reg, d.reg); break; in build_logic_op()
836 case GGL_XOR: EOR(AL, 0, pixel.reg, s.reg, d.reg); break; in build_logic_op()
837 case GGL_OR: ORR(AL, 0, pixel.reg, s.reg, d.reg); break; in build_logic_op()
838 case GGL_NOR: ORR(AL, 0, pixel.reg, s.reg, d.reg); in build_logic_op()
839 MVN(AL, 0, pixel.reg, pixel.reg); break; in build_logic_op()
840 case GGL_EQUIV: EOR(AL, 0, pixel.reg, s.reg, d.reg); in build_logic_op()
841 MVN(AL, 0, pixel.reg, pixel.reg); break; in build_logic_op()
842 case GGL_INVERT: MVN(AL, 0, pixel.reg, d.reg); break; in build_logic_op()
844 BIC(AL, 0, pixel.reg, d.reg, s.reg); in build_logic_op()
845 MVN(AL, 0, pixel.reg, pixel.reg); break; in build_logic_op()
846 case GGL_COPY_INVERTED: MVN(AL, 0, pixel.reg, s.reg); break; in build_logic_op()
848 BIC(AL, 0, pixel.reg, s.reg, d.reg); in build_logic_op()
849 MVN(AL, 0, pixel.reg, pixel.reg); break; in build_logic_op()
850 case GGL_NAND: AND(AL, 0, pixel.reg, s.reg, d.reg); in build_logic_op()
851 MVN(AL, 0, pixel.reg, pixel.reg); break; in build_logic_op()
852 case GGL_SET: MVN(AL, 0, pixel.reg, imm(0)); break; in build_logic_op()
890 MOV( AL, 0, d, s); in build_and_immediate()
900 AND( AL, 0, d, s, imm(mask) ); in build_and_immediate()
904 AND( AL, 0, d, s, imm(mask) ); in build_and_immediate()
923 AND( AL, 0, d, s, imm(newMask) ); in build_and_immediate()
925 BIC( AL, 0, d, s, imm(newMask) ); in build_and_immediate()
930 MOV( AL, 0, d, imm(0)); in build_and_immediate()
982 MOV(AL, 0, pixel.reg, fb.reg); in build_masking()
985 ORR(AL, 0, pixel.reg, s.reg, fb.reg); in build_masking()
996 ADDR_ADD(AL, 0, d.reg, b.reg, reg_imm(o.reg, LSL, 2)); in base_offset()
1000 ADDR_ADD(AL, 0, d.reg, b.reg, reg_imm(o.reg, LSL, 1)); in base_offset()
1001 ADDR_ADD(AL, 0, d.reg, d.reg, o.reg); in base_offset()
1003 ADDR_ADD(AL, 0, d.reg, o.reg, reg_imm(o.reg, LSL, 1)); in base_offset()
1004 ADDR_ADD(AL, 0, d.reg, d.reg, b.reg); in base_offset()
1008 ADDR_ADD(AL, 0, d.reg, b.reg, reg_imm(o.reg, LSL, 1)); in base_offset()
1011 ADDR_ADD(AL, 0, d.reg, b.reg, o.reg); in base_offset()