Lines Matching refs:Rn
392 int s, int Rd, int Rn, uint32_t Op2) in dataProcessing() argument
408 mMips->AND(Rd, Rn, src); in dataProcessing()
410 mMips->ANDI(Rd, Rn, src); in dataProcessing()
417 mMips->ADDU(Rd, Rn, src); in dataProcessing()
419 mMips->ADDIU(Rd, Rn, src); in dataProcessing()
426 mMips->SUBU(Rd, Rn, src); in dataProcessing()
428 mMips->SUBIU(Rd, Rn, src); in dataProcessing()
435 mMips->DADDU(Rd, Rn, src); in dataProcessing()
437 mMips->DADDIU(Rd, Rn, src); in dataProcessing()
444 mMips->DSUBU(Rd, Rn, src); in dataProcessing()
446 mMips->DSUBIU(Rd, Rn, src); in dataProcessing()
452 mMips->XOR(Rd, Rn, src); in dataProcessing()
454 mMips->XORI(Rd, Rn, src); in dataProcessing()
460 mMips->OR(Rd, Rn, src); in dataProcessing()
462 mMips->ORI(Rd, Rn, src); in dataProcessing()
473 mMips->AND(Rd, Rn, R_at); in dataProcessing()
482 mMips->SUBU(Rd, src, Rn); // subu with the parameters reversed in dataProcessing()
556 cond.r1 = Rn; in dataProcessing()
595 int Rd, int Rm, int Rs, int Rn) { in MLA() argument
601 mMips->ADDU(Rd, R_at, Rn); in MLA()
736 void ArmToMips64Assembler::BX(int cc __unused, int Rn __unused) in BX()
750 void ArmToMips64Assembler::LDR(int cc __unused, int Rd, int Rn, uint32_t offset) in LDR() argument
761 if (Rn == ARMAssemblerInterface::SP) { in LDR()
762 Rn = R_sp; // convert LDR via Arm SP to LW via Mips SP in LDR()
764 mMips->LW(Rd, Rn, amode.value); in LDR()
766 mMips->DADDIU(Rn, Rn, amode.value); in LDR()
770 if (Rn == ARMAssemblerInterface::SP) { in LDR()
771 Rn = R_sp; // convert STR thru Arm SP to STR thru Mips SP in LDR()
773 mMips->LW(Rd, Rn, 0); in LDR()
774 mMips->DADDIU(Rn, Rn, amode.value); in LDR()
778 mMips->DADDU(R_at, Rn, amode.reg); in LDR()
784 void ArmToMips64Assembler::LDRB(int cc __unused, int Rd, int Rn, uint32_t offset) in LDRB() argument
795 mMips->LBU(Rd, Rn, amode.value); in LDRB()
797 mMips->DADDIU(Rn, Rn, amode.value); in LDRB()
801 mMips->LBU(Rd, Rn, 0); in LDRB()
802 mMips->DADDIU(Rn, Rn, amode.value); in LDRB()
806 mMips->DADDU(R_at, Rn, amode.reg); in LDRB()
813 void ArmToMips64Assembler::STR(int cc __unused, int Rd, int Rn, uint32_t offset) in STR() argument
824 if (Rn == ARMAssemblerInterface::SP) { in STR()
825 Rn = R_sp; // convert STR thru Arm SP to SW thru Mips SP in STR()
830 mMips->DADDIU(Rn, Rn, amode.value); in STR()
831 mMips->SW(Rd, Rn, 0); in STR()
834 mMips->SW(Rd, Rn, amode.value); in STR()
838 mMips->SW(Rd, Rn, 0); in STR()
839 mMips->DADDIU(Rn, Rn, amode.value); // post index always writes back in STR()
843 mMips->DADDU(R_at, Rn, amode.reg); in STR()
849 void ArmToMips64Assembler::STRB(int cc __unused, int Rd, int Rn, uint32_t offset) in STRB() argument
860 mMips->SB(Rd, Rn, amode.value); in STRB()
862 mMips->DADDIU(Rn, Rn, amode.value); in STRB()
866 mMips->SB(Rd, Rn, 0); in STRB()
867 mMips->DADDIU(Rn, Rn, amode.value); in STRB()
871 mMips->DADDU(R_at, Rn, amode.reg); in STRB()
877 void ArmToMips64Assembler::LDRH(int cc __unused, int Rd, int Rn, uint32_t offset) in LDRH() argument
887 mMips->LHU(Rd, Rn, amode.value); in LDRH()
890 mMips->LHU(Rd, Rn, 0); in LDRH()
891 mMips->DADDIU(Rn, Rn, amode.value); in LDRH()
896 mMips->DADDU(R_at, Rn, amode.reg); in LDRH()
898 mMips->DSUBU(R_at, Rn, abs(amode.reg)); in LDRH()
906 int Rn __unused, uint32_t offset __unused) in LDRSB()
914 int Rn __unused, uint32_t offset __unused) in LDRSH()
921 void ArmToMips64Assembler::STRH(int cc __unused, int Rd, int Rn, uint32_t offset) in STRH() argument
931 mMips->SH(Rd, Rn, amode.value); in STRH()
934 mMips->SH(Rd, Rn, 0); in STRH()
935 mMips->DADDIU(Rn, Rn, amode.value); in STRH()
940 mMips->DADDU(R_at, Rn, amode.reg); in STRH()
942 mMips->DSUBU(R_at, Rn, abs(amode.reg)); in STRH()
958 int Rn __unused, int W __unused, uint32_t reg_list __unused) in LDM()
970 int Rn __unused, int W __unused, uint32_t reg_list __unused) in STM()
989 void ArmToMips64Assembler::SWP(int cc __unused, int Rn __unused, in SWP()
997 void ArmToMips64Assembler::SWPB(int cc __unused, int Rn __unused, in SWPB()
1019 void ArmToMips64Assembler::PLD(int Rn __unused, uint32_t offset) { in PLD()
1035 int Rm __unused, int Rn __unused) in QADD()
1044 int Rm __unused, int Rn __unused) in QDADD()
1053 int Rm __unused, int Rn __unused) in QSUB()
1062 int Rm __unused, int Rn __unused) in QDSUB()
1120 int Rd, int Rm, int Rs, int Rn) in SMLA() argument
1146 mMips->ADDU(Rd, R_at, Rn); in SMLA()
1161 int Rs __unused, int Rn __unused) in SMLAW()
1183 void ArmToMips64Assembler::UBFX(int cc __unused, int Rd __unused, int Rn __unused, in UBFX()
1198 int s, int Rd, int Rn, uint32_t Op2) in ADDR_ADD() argument
1202 dataProcessing(opADD64, cc, s, Rd, Rn, Op2); in ADDR_ADD()
1206 int s, int Rd, int Rn, uint32_t Op2) in ADDR_SUB() argument
1210 dataProcessing(opSUB64, cc, s, Rd, Rn, Op2); in ADDR_SUB()
1214 int Rn, uint32_t offset) { in ADDR_LDR() argument
1224 if (Rn == ARMAssemblerInterface::SP) { in ADDR_LDR()
1225 Rn = R_sp; // convert LDR via Arm SP to LW via Mips SP in ADDR_LDR()
1227 mMips->LD(Rd, Rn, amode.value); in ADDR_LDR()
1229 mMips->DADDIU(Rn, Rn, amode.value); in ADDR_LDR()
1233 if (Rn == ARMAssemblerInterface::SP) { in ADDR_LDR()
1234 Rn = R_sp; // convert STR thru Arm SP to STR thru Mips SP in ADDR_LDR()
1236 mMips->LD(Rd, Rn, 0); in ADDR_LDR()
1237 mMips->DADDIU(Rn, Rn, amode.value); in ADDR_LDR()
1241 mMips->DADDU(R_at, Rn, amode.reg); in ADDR_LDR()
1248 int Rn, uint32_t offset) { in ADDR_STR() argument
1258 if (Rn == ARMAssemblerInterface::SP) { in ADDR_STR()
1259 Rn = R_sp; // convert STR thru Arm SP to SW thru Mips SP in ADDR_STR()
1264 mMips->DADDIU(Rn, Rn, amode.value); in ADDR_STR()
1265 mMips->SD(Rd, Rn, 0); in ADDR_STR()
1268 mMips->SD(Rd, Rn, amode.value); in ADDR_STR()
1272 mMips->SD(Rd, Rn, 0); in ADDR_STR()
1273 mMips->DADDIU(Rn, Rn, amode.value); // post index always writes back in ADDR_STR()
1277 mMips->DADDU(R_at, Rn, amode.reg); in ADDR_STR()