Lines Matching refs:mMips
63 mMips = new MIPS64Assembler(assembly, this); in ArmToMips64Assembler()
74 mMips = new MIPS64Assembler(assembly, this); in ArmToMips64Assembler()
81 delete mMips; in ~ArmToMips64Assembler()
87 return mMips->pc(); in pc()
92 return mMips->base(); in base()
99 mMips->reset(); in reset()
109 mMips->comment(string); in comment()
114 mMips->label(theLabel); in label()
119 mMips->disassemble(name); in disassemble()
141 mMips->DADDIU(R_sp, R_sp, -(5 * 8)); in prolog()
142 mMips->SD(R_s0, R_sp, 0); in prolog()
143 mMips->SD(R_s1, R_sp, 8); in prolog()
144 mMips->SD(R_s2, R_sp, 16); in prolog()
145 mMips->SD(R_s3, R_sp, 24); in prolog()
146 mMips->SD(R_s4, R_sp, 32); in prolog()
147 mMips->MOVE(R_v0, R_a0); // move context * passed in a0 to v0 (arm r0) in prolog()
154 mMips->LD(R_s0, R_sp, 0); in epilog()
155 mMips->LD(R_s1, R_sp, 8); in epilog()
156 mMips->LD(R_s2, R_sp, 16); in epilog()
157 mMips->LD(R_s3, R_sp, 24); in epilog()
158 mMips->LD(R_s4, R_sp, 32); in epilog()
159 mMips->DADDIU(R_sp, R_sp, (5 * 8)); in epilog()
160 mMips->JR(R_ra); in epilog()
166 return mMips->generate(name); in generate()
171 mMips->fix_branches(); in fix_branches()
176 return mMips->pcForLabel(label); in pcForLabel()
337 mMips->MOVE(R_cmp, cond.r1); in protectConditionalOperands()
341 mMips->MOVE(R_cmp2, cond.r2); in protectConditionalOperands()
364 mMips->LUI(tmpReg, (amode.value >> 16)); in dataProcAdrModes()
366 mMips->ORI(tmpReg, tmpReg, (amode.value & 0x0000ffff)); in dataProcAdrModes()
376 case LSL: mMips->SLL(tmpReg, amode.reg, amode.value); break; in dataProcAdrModes()
377 case LSR: mMips->SRL(tmpReg, amode.reg, amode.value); break; in dataProcAdrModes()
378 case ASR: mMips->SRA(tmpReg, amode.reg, amode.value); break; in dataProcAdrModes()
379 case ROR: mMips->ROTR(tmpReg, amode.reg, amode.value); break; in dataProcAdrModes()
408 mMips->AND(Rd, Rn, src); in dataProcessing()
410 mMips->ANDI(Rd, Rn, src); in dataProcessing()
417 mMips->ADDU(Rd, Rn, src); in dataProcessing()
419 mMips->ADDIU(Rd, Rn, src); in dataProcessing()
426 mMips->SUBU(Rd, Rn, src); in dataProcessing()
428 mMips->SUBIU(Rd, Rn, src); in dataProcessing()
435 mMips->DADDU(Rd, Rn, src); in dataProcessing()
437 mMips->DADDIU(Rd, Rn, src); in dataProcessing()
444 mMips->DSUBU(Rd, Rn, src); in dataProcessing()
446 mMips->DSUBIU(Rd, Rn, src); in dataProcessing()
452 mMips->XOR(Rd, Rn, src); in dataProcessing()
454 mMips->XORI(Rd, Rn, src); in dataProcessing()
460 mMips->OR(Rd, Rn, src); in dataProcessing()
462 mMips->ORI(Rd, Rn, src); in dataProcessing()
469 mMips->ORI(R_at, 0, src); in dataProcessing()
472 mMips->NOT(R_at, src); in dataProcessing()
473 mMips->AND(Rd, Rn, R_at); in dataProcessing()
479 mMips->ORI(R_at, 0, src); in dataProcessing()
482 mMips->SUBU(Rd, src, Rn); // subu with the parameters reversed in dataProcessing()
487 mMips->MOVE(Rd, Op2); in dataProcessing()
490 mMips->LUI(Rd, (amode.value >> 16)); in dataProcessing()
492 mMips->ORI(Rd, Rd, (amode.value & 0x0000ffff)); in dataProcessing()
495 mMips->ORI(Rd, 0, amode.value); in dataProcessing()
499 case LSL: mMips->SLL(Rd, amode.reg, amode.value); break; in dataProcessing()
500 case LSR: mMips->SRL(Rd, amode.reg, amode.value); break; in dataProcessing()
501 case ASR: mMips->SRA(Rd, amode.reg, amode.value); break; in dataProcessing()
502 case ROR: mMips->ROTR(Rd, amode.reg, amode.value); break; in dataProcessing()
507 mMips->UNIMPL(); in dataProcessing()
513 mMips->NOR(Rd, Op2, 0); // NOT is NOR with 0 in dataProcessing()
517 mMips->LUI(Rd, (amode.value >> 16)); in dataProcessing()
519 mMips->ORI(Rd, Rd, (amode.value & 0x0000ffff)); in dataProcessing()
522 mMips->ORI(Rd, 0, amode.value); in dataProcessing()
526 case LSL: mMips->SLL(Rd, amode.reg, amode.value); break; in dataProcessing()
527 case LSR: mMips->SRL(Rd, amode.reg, amode.value); break; in dataProcessing()
528 case ASR: mMips->SRA(Rd, amode.reg, amode.value); break; in dataProcessing()
529 case ROR: mMips->ROTR(Rd, amode.reg, amode.value); break; in dataProcessing()
534 mMips->UNIMPL(); in dataProcessing()
536 mMips->NOR(Rd, Rd, 0); // NOT is NOR with 0 in dataProcessing()
560 mMips->ORI(R_cmp2, R_zero, src); in dataProcessing()
573 mMips->UNIMPL(); // currently unused in GGL Assembler code in dataProcessing()
578 mMips->label(cond.label[cond.labelnum]); in dataProcessing()
600 mMips->MUL(R_at, Rm, Rs); in MLA()
601 mMips->ADDU(Rd, R_at, Rn); in MLA()
611 mMips->MUL(Rd, Rm, Rs); in MUL()
621 mMips->MUH(RdHi, Rm, Rs); in UMULL()
622 mMips->MUL(RdLo, Rm, Rs); in UMULL()
638 mMips->NOP2(); in UMUAL()
654 mMips->NOP2(); in SMULL()
669 mMips->NOP2(); in SMUAL()
693 case EQ: mMips->BEQ(cond.r1, cond.r2, label); break; in B()
694 case NE: mMips->BNE(cond.r1, cond.r2, label); break; in B()
695 case HS: mMips->BGEU(cond.r1, cond.r2, label); break; in B()
696 case LO: mMips->BLTU(cond.r1, cond.r2, label); break; in B()
697 case MI: mMips->BLT(cond.r1, cond.r2, label); break; in B()
698 case PL: mMips->BGE(cond.r1, cond.r2, label); break; in B()
700 case HI: mMips->BGTU(cond.r1, cond.r2, label); break; in B()
701 case LS: mMips->BLEU(cond.r1, cond.r2, label); break; in B()
702 case GE: mMips->BGE(cond.r1, cond.r2, label); break; in B()
703 case LT: mMips->BLT(cond.r1, cond.r2, label); break; in B()
704 case GT: mMips->BGT(cond.r1, cond.r2, label); break; in B()
705 case LE: mMips->BLE(cond.r1, cond.r2, label); break; in B()
706 case AL: mMips->B(label); break; in B()
764 mMips->LW(Rd, Rn, amode.value); in LDR()
766 mMips->DADDIU(Rn, Rn, amode.value); in LDR()
773 mMips->LW(Rd, Rn, 0); in LDR()
774 mMips->DADDIU(Rn, Rn, amode.value); in LDR()
778 mMips->DADDU(R_at, Rn, amode.reg); in LDR()
779 mMips->LW(Rd, R_at, 0); in LDR()
795 mMips->LBU(Rd, Rn, amode.value); in LDRB()
797 mMips->DADDIU(Rn, Rn, amode.value); in LDRB()
801 mMips->LBU(Rd, Rn, 0); in LDRB()
802 mMips->DADDIU(Rn, Rn, amode.value); in LDRB()
806 mMips->DADDU(R_at, Rn, amode.reg); in LDRB()
807 mMips->LBU(Rd, R_at, 0); in LDRB()
830 mMips->DADDIU(Rn, Rn, amode.value); in STR()
831 mMips->SW(Rd, Rn, 0); in STR()
834 mMips->SW(Rd, Rn, amode.value); in STR()
838 mMips->SW(Rd, Rn, 0); in STR()
839 mMips->DADDIU(Rn, Rn, amode.value); // post index always writes back in STR()
843 mMips->DADDU(R_at, Rn, amode.reg); in STR()
844 mMips->SW(Rd, R_at, 0); in STR()
860 mMips->SB(Rd, Rn, amode.value); in STRB()
862 mMips->DADDIU(Rn, Rn, amode.value); in STRB()
866 mMips->SB(Rd, Rn, 0); in STRB()
867 mMips->DADDIU(Rn, Rn, amode.value); in STRB()
871 mMips->DADDU(R_at, Rn, amode.reg); in STRB()
872 mMips->SB(Rd, R_at, 0); in STRB()
887 mMips->LHU(Rd, Rn, amode.value); in LDRH()
890 mMips->LHU(Rd, Rn, 0); in LDRH()
891 mMips->DADDIU(Rn, Rn, amode.value); in LDRH()
896 mMips->DADDU(R_at, Rn, amode.reg); in LDRH()
898 mMips->DSUBU(R_at, Rn, abs(amode.reg)); in LDRH()
900 mMips->LHU(Rd, R_at, 0); in LDRH()
909 mMips->NOP2(); in LDRSB()
917 mMips->NOP2(); in LDRSH()
931 mMips->SH(Rd, Rn, amode.value); in STRH()
934 mMips->SH(Rd, Rn, 0); in STRH()
935 mMips->DADDIU(Rn, Rn, amode.value); in STRH()
940 mMips->DADDU(R_at, Rn, amode.reg); in STRH()
942 mMips->DSUBU(R_at, Rn, abs(amode.reg)); in STRH()
944 mMips->SH(Rd, R_at, 0); in STRH()
965 mMips->NOP2(); in LDM()
977 mMips->NOP2(); in STM()
993 mMips->NOP2(); in SWP()
1001 mMips->NOP2(); in SWPB()
1008 mMips->NOP2(); in SWI()
1024 mMips->NOP2(); in PLD()
1031 mMips->CLZ(Rd, Rm); in CLZ()
1039 mMips->NOP2(); in QADD()
1048 mMips->NOP2(); in QDADD()
1057 mMips->NOP2(); in QSUB()
1066 mMips->NOP2(); in QDSUB()
1083 mMips->SRA(R_at, Rm, 16); in SMUL()
1086 mMips->SEH(R_at, Rm); in SMUL()
1091 mMips->SRA(R_at2, Rs, 16); in SMUL()
1094 mMips->SEH(R_at2, Rs); in SMUL()
1096 mMips->MUL(Rd, R_at, R_at2); in SMUL()
1108 mMips->SRL(R_at, Rs, 16); in SMULW()
1109 mMips->SLL(R_at, R_at, 16); in SMULW()
1113 mMips->SLL(R_at, Rs, 16); in SMULW()
1115 mMips->MUH(Rd, Rm, R_at); in SMULW()
1131 mMips->SRA(R_at, Rm, 16); in SMLA()
1134 mMips->SEH(R_at, Rm); in SMLA()
1139 mMips->SRA(R_at2, Rs, 16); in SMLA()
1142 mMips->SEH(R_at2, Rs); in SMLA()
1145 mMips->MUL(R_at, R_at, R_at2); in SMLA()
1146 mMips->ADDU(Rd, R_at, Rn); in SMLA()
1155 mMips->NOP2(); in SMLAL()
1165 mMips->NOP2(); in SMLAW()
1177 mMips->ROTR(R_at2, Rm, rotate * 8); in UXTB16()
1178 mMips->LUI(R_at, 0xFF); in UXTB16()
1179 mMips->ORI(R_at, R_at, 0xFF); in UXTB16()
1180 mMips->AND(Rd, R_at2, R_at); in UXTB16()
1189 mMips->NOP2(); in UBFX()
1227 mMips->LD(Rd, Rn, amode.value); in ADDR_LDR()
1229 mMips->DADDIU(Rn, Rn, amode.value); in ADDR_LDR()
1236 mMips->LD(Rd, Rn, 0); in ADDR_LDR()
1237 mMips->DADDIU(Rn, Rn, amode.value); in ADDR_LDR()
1241 mMips->DADDU(R_at, Rn, amode.reg); in ADDR_LDR()
1242 mMips->LD(Rd, R_at, 0); in ADDR_LDR()
1264 mMips->DADDIU(Rn, Rn, amode.value); in ADDR_STR()
1265 mMips->SD(Rd, Rn, 0); in ADDR_STR()
1268 mMips->SD(Rd, Rn, amode.value); in ADDR_STR()
1272 mMips->SD(Rd, Rn, 0); in ADDR_STR()
1273 mMips->DADDIU(Rn, Rn, amode.value); // post index always writes back in ADDR_STR()
1277 mMips->DADDU(R_at, Rn, amode.reg); in ADDR_STR()
1278 mMips->SD(Rd, R_at, 0); in ADDR_STR()