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1 /*
2  * Copyright © 2014 Advanced Micro Devices, Inc.
3  * All Rights Reserved.
4  *
5  * Permission is hereby granted, free of charge, to any person obtaining
6  * a copy of this software and associated documentation files (the
7  * "Software"), to deal in the Software without restriction, including
8  * without limitation the rights to use, copy, modify, merge, publish,
9  * distribute, sub license, and/or sell copies of the Software, and to
10  * permit persons to whom the Software is furnished to do so, subject to
11  * the following conditions:
12  *
13  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
14  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
15  * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
16  * NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS, AUTHORS
17  * AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
18  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
20  * USE OR OTHER DEALINGS IN THE SOFTWARE.
21  *
22  * The above copyright notice and this permission notice (including the
23  * next paragraph) shall be included in all copies or substantial portions
24  * of the Software.
25  */
26 
27 /**
28 ****************************************************************************************************
29 * @file  addrtypes.h
30 * @brief Contains the helper function and constants
31 ****************************************************************************************************
32 */
33 #ifndef __ADDR_TYPES_H__
34 #define __ADDR_TYPES_H__
35 
36 #if defined(__APPLE__) && !defined(HAVE_TSERVER)
37 // External definitions header maintained by Apple driver team, but not for diag team under Mac.
38 // Helps address compilation issues & reduces code covered by NDA
39 #include "addrExtDef.h"
40 
41 #else
42 
43 // Windows and/or Linux
44 #if !defined(VOID)
45 typedef void           VOID;
46 #endif
47 
48 #if !defined(FLOAT)
49 typedef float          FLOAT;
50 #endif
51 
52 #if !defined(CHAR)
53 typedef char           CHAR;
54 #endif
55 
56 #if !defined(INT)
57 typedef int            INT;
58 #endif
59 
60 #include <stdarg.h> // va_list...etc need this header
61 
62 #endif // defined (__APPLE__) && !defined(HAVE_TSERVER)
63 
64 /**
65 ****************************************************************************************************
66 *   Calling conventions
67 ****************************************************************************************************
68 */
69 #ifndef ADDR_CDECL
70     #if defined(__GNUC__)
71         #define ADDR_CDECL __attribute__((cdecl))
72     #else
73         #define ADDR_CDECL __cdecl
74     #endif
75 #endif
76 
77 #ifndef ADDR_STDCALL
78     #if defined(__GNUC__)
79         #if defined(__AMD64__)
80             #define ADDR_STDCALL
81         #else
82             #define ADDR_STDCALL __attribute__((stdcall))
83         #endif
84     #else
85         #define ADDR_STDCALL __stdcall
86     #endif
87 #endif
88 
89 #ifndef ADDR_FASTCALL
90     #if defined(__GNUC__)
91         #if defined(__i386__)
92             #define ADDR_FASTCALL __attribute__((regparm(0)))
93         #else
94             #define ADDR_FASTCALL
95         #endif
96     #else
97         #define ADDR_FASTCALL __fastcall
98     #endif
99 #endif
100 
101 #ifndef GC_CDECL
102     #define GC_CDECL  ADDR_CDECL
103 #endif
104 
105 #ifndef GC_STDCALL
106     #define GC_STDCALL  ADDR_STDCALL
107 #endif
108 
109 #ifndef GC_FASTCALL
110     #define GC_FASTCALL  ADDR_FASTCALL
111 #endif
112 
113 
114 #if defined(__GNUC__)
115     #define ADDR_INLINE static inline   // inline needs to be static to link
116 #else
117     // win32, win64, other platforms
118     #define ADDR_INLINE   __inline
119 #endif // #if defined(__GNUC__)
120 
121 #define ADDR_API ADDR_FASTCALL //default call convention is fast call
122 
123 /**
124 ****************************************************************************************************
125 * Global defines used by other modules
126 ****************************************************************************************************
127 */
128 #if !defined(TILEINDEX_INVALID)
129 #define TILEINDEX_INVALID                -1
130 #endif
131 
132 #if !defined(TILEINDEX_LINEAR_GENERAL)
133 #define TILEINDEX_LINEAR_GENERAL         -2
134 #endif
135 
136 #if !defined(TILEINDEX_LINEAR_ALIGNED)
137 #define TILEINDEX_LINEAR_ALIGNED          8
138 #endif
139 
140 /**
141 ****************************************************************************************************
142 * Return codes
143 ****************************************************************************************************
144 */
145 typedef enum _ADDR_E_RETURNCODE
146 {
147     // General Return
148     ADDR_OK    = 0,
149     ADDR_ERROR = 1,
150 
151     // Specific Errors
152     ADDR_OUTOFMEMORY,
153     ADDR_INVALIDPARAMS,
154     ADDR_NOTSUPPORTED,
155     ADDR_NOTIMPLEMENTED,
156     ADDR_PARAMSIZEMISMATCH,
157     ADDR_INVALIDGBREGVALUES,
158 
159 } ADDR_E_RETURNCODE;
160 
161 /**
162 ****************************************************************************************************
163 * @brief
164 *   Neutral enums that define tile modes for all H/W
165 * @note
166 *   R600/R800 tiling mode can be cast to hw enums directly but never cast into HW enum from
167 *   ADDR_TM_2D_TILED_XTHICK
168 *
169 ****************************************************************************************************
170 */
171 typedef enum _AddrTileMode
172 {
173     ADDR_TM_LINEAR_GENERAL      = 0,    ///< Least restrictions, pitch: multiple of 8 if not buffer
174     ADDR_TM_LINEAR_ALIGNED      = 1,    ///< Requests pitch or slice to be multiple of 64 pixels
175     ADDR_TM_1D_TILED_THIN1      = 2,    ///< Linear array of 8x8 tiles
176     ADDR_TM_1D_TILED_THICK      = 3,    ///< Linear array of 8x8x4 tiles
177     ADDR_TM_2D_TILED_THIN1      = 4,    ///< A set of macro tiles consist of 8x8 tiles
178     ADDR_TM_2D_TILED_THIN2      = 5,    ///< 600 HWL only, macro tile ratio is 1:4
179     ADDR_TM_2D_TILED_THIN4      = 6,    ///< 600 HWL only, macro tile ratio is 1:16
180     ADDR_TM_2D_TILED_THICK      = 7,    ///< A set of macro tiles consist of 8x8x4 tiles
181     ADDR_TM_2B_TILED_THIN1      = 8,    ///< 600 HWL only, with bank swap
182     ADDR_TM_2B_TILED_THIN2      = 9,    ///< 600 HWL only, with bank swap and ratio is 1:4
183     ADDR_TM_2B_TILED_THIN4      = 10,   ///< 600 HWL only, with bank swap and ratio is 1:16
184     ADDR_TM_2B_TILED_THICK      = 11,   ///< 600 HWL only, with bank swap, consists of 8x8x4 tiles
185     ADDR_TM_3D_TILED_THIN1      = 12,   ///< Macro tiling w/ pipe rotation between slices
186     ADDR_TM_3D_TILED_THICK      = 13,   ///< Macro tiling w/ pipe rotation bwtween slices, thick
187     ADDR_TM_3B_TILED_THIN1      = 14,   ///< 600 HWL only, with bank swap
188     ADDR_TM_3B_TILED_THICK      = 15,   ///< 600 HWL only, with bank swap, thick
189     ADDR_TM_2D_TILED_XTHICK     = 16,   ///< Tile is 8x8x8, valid from NI
190     ADDR_TM_3D_TILED_XTHICK     = 17,   ///< Tile is 8x8x8, valid from NI
191     ADDR_TM_POWER_SAVE          = 18,   ///< Power save mode, only used by KMD on NI
192     ADDR_TM_PRT_TILED_THIN1     = 19,   ///< No bank/pipe rotation or hashing beyond macrotile size
193     ADDR_TM_PRT_2D_TILED_THIN1  = 20,   ///< Same as 2D_TILED_THIN1, PRT only
194     ADDR_TM_PRT_3D_TILED_THIN1  = 21,   ///< Same as 3D_TILED_THIN1, PRT only
195     ADDR_TM_PRT_TILED_THICK     = 22,   ///< No bank/pipe rotation or hashing beyond macrotile size
196     ADDR_TM_PRT_2D_TILED_THICK  = 23,   ///< Same as 2D_TILED_THICK, PRT only
197     ADDR_TM_PRT_3D_TILED_THICK  = 24,   ///< Same as 3D_TILED_THICK, PRT only
198     ADDR_TM_UNKNOWN             = 25,   ///< Unkown tile mode, should be decided by address lib
199     ADDR_TM_COUNT               = 26,   ///< Must be the value of the last tile mode
200 } AddrTileMode;
201 
202 /**
203 ****************************************************************************************************
204 * @brief
205 *   Neutral enums that define swizzle modes for Gfx9 ASIC
206 * @note
207 *
208 *   ADDR_SW_LINEAR linear aligned addressing mode, for 1D/2D/3D resouce
209 *   ADDR_SW_256B_* addressing block aligned size is 256B, for 2D/3D resouce
210 *   ADDR_SW_4KB_*  addressing block aligned size is 4KB, for 2D/3D resouce
211 *   ADDR_SW_64KB_* addressing block aligned size is 64KB, for 2D/3D resouce
212 *   ADDR_SW_VAR_*  addressing block aligned size is ASIC specific, for 2D/3D resouce
213 *
214 *   ADDR_SW_*_Z    For 2D resouce, represents Z-order swizzle mode for depth/stencil/FMask
215                    For 3D resouce, represents a swizzle mode similar to legacy thick tile mode
216 *   ADDR_SW_*_S    represents standard swizzle mode defined by MS
217 *   ADDR_SW_*_D    For 2D resouce, represents a swizzle mode for displayable resource
218 *                  For 3D resouce, represents a swizzle mode which places each slice in order & pixel
219                    within slice is placed as 2D ADDR_SW_*_S. Don't use this combination if possible!
220 *   ADDR_SW_*_R    For 2D resouce only, represents a swizzle mode for rotated displayable resource
221 *
222 ****************************************************************************************************
223 */
224 typedef enum _AddrSwizzleMode
225 {
226     ADDR_SW_LINEAR          = 0,
227     ADDR_SW_256B_S          = 1,
228     ADDR_SW_256B_D          = 2,
229     ADDR_SW_256B_R          = 3,
230     ADDR_SW_4KB_Z           = 4,
231     ADDR_SW_4KB_S           = 5,
232     ADDR_SW_4KB_D           = 6,
233     ADDR_SW_4KB_R           = 7,
234     ADDR_SW_64KB_Z          = 8,
235     ADDR_SW_64KB_S          = 9,
236     ADDR_SW_64KB_D          = 10,
237     ADDR_SW_64KB_R          = 11,
238     ADDR_SW_VAR_Z           = 12,
239     ADDR_SW_VAR_S           = 13,
240     ADDR_SW_VAR_D           = 14,
241     ADDR_SW_VAR_R           = 15,
242     ADDR_SW_64KB_Z_T        = 16,
243     ADDR_SW_64KB_S_T        = 17,
244     ADDR_SW_64KB_D_T        = 18,
245     ADDR_SW_64KB_R_T        = 19,
246     ADDR_SW_4KB_Z_X         = 20,
247     ADDR_SW_4KB_S_X         = 21,
248     ADDR_SW_4KB_D_X         = 22,
249     ADDR_SW_4KB_R_X         = 23,
250     ADDR_SW_64KB_Z_X        = 24,
251     ADDR_SW_64KB_S_X        = 25,
252     ADDR_SW_64KB_D_X        = 26,
253     ADDR_SW_64KB_R_X        = 27,
254     ADDR_SW_VAR_Z_X         = 28,
255     ADDR_SW_VAR_S_X         = 29,
256     ADDR_SW_VAR_D_X         = 30,
257     ADDR_SW_VAR_R_X         = 31,
258     ADDR_SW_LINEAR_GENERAL  = 32,
259     ADDR_SW_MAX_TYPE        = 33,
260 
261     // Used for represent block with identical size
262     ADDR_SW_256B            = ADDR_SW_256B_S,
263     ADDR_SW_4KB             = ADDR_SW_4KB_S_X,
264     ADDR_SW_64KB            = ADDR_SW_64KB_S_X,
265     ADDR_SW_VAR             = ADDR_SW_VAR_S_X,
266 } AddrSwizzleMode;
267 
268 /**
269 ****************************************************************************************************
270 * @brief
271 *   Neutral enums that define image type
272 * @note
273 *   this is new for address library interface version 2
274 *
275 ****************************************************************************************************
276 */
277 typedef enum _AddrResourceType
278 {
279     ADDR_RSRC_TEX_1D = 0,
280     ADDR_RSRC_TEX_2D = 1,
281     ADDR_RSRC_TEX_3D = 2,
282     ADDR_RSRC_MAX_TYPE = 3,
283 } AddrResourceType;
284 
285 /**
286 ****************************************************************************************************
287 * @brief
288 *   Neutral enums that define resource heap location
289 * @note
290 *   this is new for address library interface version 2
291 *
292 ****************************************************************************************************
293 */
294 typedef enum _AddrResrouceLocation
295 {
296     ADDR_RSRC_LOC_UNDEF  = 0,   // Resource heap is undefined/unknown
297     ADDR_RSRC_LOC_LOCAL  = 1,   // CPU visable and CPU invisable local heap
298     ADDR_RSRC_LOC_USWC   = 2,   // CPU write-combined non-cached nonlocal heap
299     ADDR_RSRC_LOC_CACHED = 3,   // CPU cached nonlocal heap
300     ADDR_RSRC_LOC_INVIS  = 4,   // CPU invisable local heap only
301     ADDR_RSRC_LOC_MAX_TYPE = 5,
302 } AddrResrouceLocation;
303 
304 /**
305 ****************************************************************************************************
306 * @brief
307 *   Neutral enums that define resource basic swizzle mode
308 * @note
309 *   this is new for address library interface version 2
310 *
311 ****************************************************************************************************
312 */
313 typedef enum _AddrSwType
314 {
315     ADDR_SW_Z  = 0,   // Resource basic swizzle mode is ZOrder
316     ADDR_SW_S  = 1,   // Resource basic swizzle mode is Standard
317     ADDR_SW_D  = 2,   // Resource basic swizzle mode is Display
318     ADDR_SW_R  = 3,   // Resource basic swizzle mode is Rotated
319 } AddrSwType;
320 
321 /**
322 ****************************************************************************************************
323 * @brief
324 *   Neutral enums that define mipmap major mode
325 * @note
326 *   this is new for address library interface version 2
327 *
328 ****************************************************************************************************
329 */
330 typedef enum _AddrMajorMode
331 {
332     ADDR_MAJOR_X = 0,
333     ADDR_MAJOR_Y = 1,
334     ADDR_MAJOR_Z = 2,
335     ADDR_MAJOR_MAX_TYPE = 3,
336 } AddrMajorMode;
337 
338 /**
339 ****************************************************************************************************
340 *   AddrFormat
341 *
342 *   @brief
343 *       Neutral enum for SurfaceFormat
344 *
345 ****************************************************************************************************
346 */
347 typedef enum _AddrFormat {
348     ADDR_FMT_INVALID                              = 0x00000000,
349     ADDR_FMT_8                                    = 0x00000001,
350     ADDR_FMT_4_4                                  = 0x00000002,
351     ADDR_FMT_3_3_2                                = 0x00000003,
352     ADDR_FMT_RESERVED_4                           = 0x00000004,
353     ADDR_FMT_16                                   = 0x00000005,
354     ADDR_FMT_16_FLOAT                             = 0x00000006,
355     ADDR_FMT_8_8                                  = 0x00000007,
356     ADDR_FMT_5_6_5                                = 0x00000008,
357     ADDR_FMT_6_5_5                                = 0x00000009,
358     ADDR_FMT_1_5_5_5                              = 0x0000000a,
359     ADDR_FMT_4_4_4_4                              = 0x0000000b,
360     ADDR_FMT_5_5_5_1                              = 0x0000000c,
361     ADDR_FMT_32                                   = 0x0000000d,
362     ADDR_FMT_32_FLOAT                             = 0x0000000e,
363     ADDR_FMT_16_16                                = 0x0000000f,
364     ADDR_FMT_16_16_FLOAT                          = 0x00000010,
365     ADDR_FMT_8_24                                 = 0x00000011,
366     ADDR_FMT_8_24_FLOAT                           = 0x00000012,
367     ADDR_FMT_24_8                                 = 0x00000013,
368     ADDR_FMT_24_8_FLOAT                           = 0x00000014,
369     ADDR_FMT_10_11_11                             = 0x00000015,
370     ADDR_FMT_10_11_11_FLOAT                       = 0x00000016,
371     ADDR_FMT_11_11_10                             = 0x00000017,
372     ADDR_FMT_11_11_10_FLOAT                       = 0x00000018,
373     ADDR_FMT_2_10_10_10                           = 0x00000019,
374     ADDR_FMT_8_8_8_8                              = 0x0000001a,
375     ADDR_FMT_10_10_10_2                           = 0x0000001b,
376     ADDR_FMT_X24_8_32_FLOAT                       = 0x0000001c,
377     ADDR_FMT_32_32                                = 0x0000001d,
378     ADDR_FMT_32_32_FLOAT                          = 0x0000001e,
379     ADDR_FMT_16_16_16_16                          = 0x0000001f,
380     ADDR_FMT_16_16_16_16_FLOAT                    = 0x00000020,
381     ADDR_FMT_RESERVED_33                          = 0x00000021,
382     ADDR_FMT_32_32_32_32                          = 0x00000022,
383     ADDR_FMT_32_32_32_32_FLOAT                    = 0x00000023,
384     ADDR_FMT_RESERVED_36                          = 0x00000024,
385     ADDR_FMT_1                                    = 0x00000025,
386     ADDR_FMT_1_REVERSED                           = 0x00000026,
387     ADDR_FMT_GB_GR                                = 0x00000027,
388     ADDR_FMT_BG_RG                                = 0x00000028,
389     ADDR_FMT_32_AS_8                              = 0x00000029,
390     ADDR_FMT_32_AS_8_8                            = 0x0000002a,
391     ADDR_FMT_5_9_9_9_SHAREDEXP                    = 0x0000002b,
392     ADDR_FMT_8_8_8                                = 0x0000002c,
393     ADDR_FMT_16_16_16                             = 0x0000002d,
394     ADDR_FMT_16_16_16_FLOAT                       = 0x0000002e,
395     ADDR_FMT_32_32_32                             = 0x0000002f,
396     ADDR_FMT_32_32_32_FLOAT                       = 0x00000030,
397     ADDR_FMT_BC1                                  = 0x00000031,
398     ADDR_FMT_BC2                                  = 0x00000032,
399     ADDR_FMT_BC3                                  = 0x00000033,
400     ADDR_FMT_BC4                                  = 0x00000034,
401     ADDR_FMT_BC5                                  = 0x00000035,
402     ADDR_FMT_BC6                                  = 0x00000036,
403     ADDR_FMT_BC7                                  = 0x00000037,
404     ADDR_FMT_32_AS_32_32_32_32                    = 0x00000038,
405     ADDR_FMT_APC3                                 = 0x00000039,
406     ADDR_FMT_APC4                                 = 0x0000003a,
407     ADDR_FMT_APC5                                 = 0x0000003b,
408     ADDR_FMT_APC6                                 = 0x0000003c,
409     ADDR_FMT_APC7                                 = 0x0000003d,
410     ADDR_FMT_CTX1                                 = 0x0000003e,
411     ADDR_FMT_RESERVED_63                          = 0x0000003f,
412     ADDR_FMT_ASTC_4x4                             = 0x00000040,
413     ADDR_FMT_ASTC_5x4                             = 0x00000041,
414     ADDR_FMT_ASTC_5x5                             = 0x00000042,
415     ADDR_FMT_ASTC_6x5                             = 0x00000043,
416     ADDR_FMT_ASTC_6x6                             = 0x00000044,
417     ADDR_FMT_ASTC_8x5                             = 0x00000045,
418     ADDR_FMT_ASTC_8x6                             = 0x00000046,
419     ADDR_FMT_ASTC_8x8                             = 0x00000047,
420     ADDR_FMT_ASTC_10x5                            = 0x00000048,
421     ADDR_FMT_ASTC_10x6                            = 0x00000049,
422     ADDR_FMT_ASTC_10x8                            = 0x0000004a,
423     ADDR_FMT_ASTC_10x10                           = 0x0000004b,
424     ADDR_FMT_ASTC_12x10                           = 0x0000004c,
425     ADDR_FMT_ASTC_12x12                           = 0x0000004d,
426     ADDR_FMT_ETC2_64BPP                           = 0x0000004e,
427     ADDR_FMT_ETC2_128BPP                          = 0x0000004f,
428 } AddrFormat;
429 
430 /**
431 ****************************************************************************************************
432 *   AddrDepthFormat
433 *
434 *   @brief
435 *       Neutral enum for addrFlt32ToDepthPixel
436 *
437 ****************************************************************************************************
438 */
439 typedef enum _AddrDepthFormat
440 {
441     ADDR_DEPTH_INVALID                            = 0x00000000,
442     ADDR_DEPTH_16                                 = 0x00000001,
443     ADDR_DEPTH_X8_24                              = 0x00000002,
444     ADDR_DEPTH_8_24                               = 0x00000003,
445     ADDR_DEPTH_X8_24_FLOAT                        = 0x00000004,
446     ADDR_DEPTH_8_24_FLOAT                         = 0x00000005,
447     ADDR_DEPTH_32_FLOAT                           = 0x00000006,
448     ADDR_DEPTH_X24_8_32_FLOAT                     = 0x00000007,
449 
450 } AddrDepthFormat;
451 
452 /**
453 ****************************************************************************************************
454 *   AddrColorFormat
455 *
456 *   @brief
457 *       Neutral enum for ColorFormat
458 *
459 ****************************************************************************************************
460 */
461 typedef enum _AddrColorFormat
462 {
463     ADDR_COLOR_INVALID                            = 0x00000000,
464     ADDR_COLOR_8                                  = 0x00000001,
465     ADDR_COLOR_4_4                                = 0x00000002,
466     ADDR_COLOR_3_3_2                              = 0x00000003,
467     ADDR_COLOR_RESERVED_4                         = 0x00000004,
468     ADDR_COLOR_16                                 = 0x00000005,
469     ADDR_COLOR_16_FLOAT                           = 0x00000006,
470     ADDR_COLOR_8_8                                = 0x00000007,
471     ADDR_COLOR_5_6_5                              = 0x00000008,
472     ADDR_COLOR_6_5_5                              = 0x00000009,
473     ADDR_COLOR_1_5_5_5                            = 0x0000000a,
474     ADDR_COLOR_4_4_4_4                            = 0x0000000b,
475     ADDR_COLOR_5_5_5_1                            = 0x0000000c,
476     ADDR_COLOR_32                                 = 0x0000000d,
477     ADDR_COLOR_32_FLOAT                           = 0x0000000e,
478     ADDR_COLOR_16_16                              = 0x0000000f,
479     ADDR_COLOR_16_16_FLOAT                        = 0x00000010,
480     ADDR_COLOR_8_24                               = 0x00000011,
481     ADDR_COLOR_8_24_FLOAT                         = 0x00000012,
482     ADDR_COLOR_24_8                               = 0x00000013,
483     ADDR_COLOR_24_8_FLOAT                         = 0x00000014,
484     ADDR_COLOR_10_11_11                           = 0x00000015,
485     ADDR_COLOR_10_11_11_FLOAT                     = 0x00000016,
486     ADDR_COLOR_11_11_10                           = 0x00000017,
487     ADDR_COLOR_11_11_10_FLOAT                     = 0x00000018,
488     ADDR_COLOR_2_10_10_10                         = 0x00000019,
489     ADDR_COLOR_8_8_8_8                            = 0x0000001a,
490     ADDR_COLOR_10_10_10_2                         = 0x0000001b,
491     ADDR_COLOR_X24_8_32_FLOAT                     = 0x0000001c,
492     ADDR_COLOR_32_32                              = 0x0000001d,
493     ADDR_COLOR_32_32_FLOAT                        = 0x0000001e,
494     ADDR_COLOR_16_16_16_16                        = 0x0000001f,
495     ADDR_COLOR_16_16_16_16_FLOAT                  = 0x00000020,
496     ADDR_COLOR_RESERVED_33                        = 0x00000021,
497     ADDR_COLOR_32_32_32_32                        = 0x00000022,
498     ADDR_COLOR_32_32_32_32_FLOAT                  = 0x00000023,
499 } AddrColorFormat;
500 
501 /**
502 ****************************************************************************************************
503 *   AddrSurfaceNumber
504 *
505 *   @brief
506 *       Neutral enum for SurfaceNumber
507 *
508 ****************************************************************************************************
509 */
510 typedef enum _AddrSurfaceNumber {
511     ADDR_NUMBER_UNORM                             = 0x00000000,
512     ADDR_NUMBER_SNORM                             = 0x00000001,
513     ADDR_NUMBER_USCALED                           = 0x00000002,
514     ADDR_NUMBER_SSCALED                           = 0x00000003,
515     ADDR_NUMBER_UINT                              = 0x00000004,
516     ADDR_NUMBER_SINT                              = 0x00000005,
517     ADDR_NUMBER_SRGB                              = 0x00000006,
518     ADDR_NUMBER_FLOAT                             = 0x00000007,
519 } AddrSurfaceNumber;
520 
521 /**
522 ****************************************************************************************************
523 *   AddrSurfaceSwap
524 *
525 *   @brief
526 *       Neutral enum for SurfaceSwap
527 *
528 ****************************************************************************************************
529 */
530 typedef enum _AddrSurfaceSwap {
531     ADDR_SWAP_STD                                 = 0x00000000,
532     ADDR_SWAP_ALT                                 = 0x00000001,
533     ADDR_SWAP_STD_REV                             = 0x00000002,
534     ADDR_SWAP_ALT_REV                             = 0x00000003,
535 } AddrSurfaceSwap;
536 
537 /**
538 ****************************************************************************************************
539 *   AddrHtileBlockSize
540 *
541 *   @brief
542 *       Size of HTILE blocks, valid values are 4 or 8 for now
543 ****************************************************************************************************
544 */
545 typedef enum _AddrHtileBlockSize
546 {
547     ADDR_HTILE_BLOCKSIZE_4 = 4,
548     ADDR_HTILE_BLOCKSIZE_8 = 8,
549 } AddrHtileBlockSize;
550 
551 
552 /**
553 ****************************************************************************************************
554 *   AddrPipeCfg
555 *
556 *   @brief
557 *       The pipe configuration field specifies both the number of pipes and
558 *       how pipes are interleaved on the surface.
559 *       The expression of number of pipes, the shader engine tile size, and packer tile size
560 *       is encoded in a PIPE_CONFIG register field.
561 *       In general the number of pipes usually matches the number of memory channels of the
562 *       hardware configuration.
563 *       For hw configurations w/ non-pow2 memory number of memory channels, it usually matches
564 *       the number of ROP units(? TODO: which registers??)
565 *       The enum value = hw enum + 1 which is to reserve 0 for requesting default.
566 ****************************************************************************************************
567 */
568 typedef enum _AddrPipeCfg
569 {
570     ADDR_PIPECFG_INVALID         = 0,
571     ADDR_PIPECFG_P2              = 1, /// 2 pipes,
572     ADDR_PIPECFG_P4_8x16         = 5, /// 4 pipes,
573     ADDR_PIPECFG_P4_16x16        = 6,
574     ADDR_PIPECFG_P4_16x32        = 7,
575     ADDR_PIPECFG_P4_32x32        = 8,
576     ADDR_PIPECFG_P8_16x16_8x16   = 9, /// 8 pipes
577     ADDR_PIPECFG_P8_16x32_8x16   = 10,
578     ADDR_PIPECFG_P8_32x32_8x16   = 11,
579     ADDR_PIPECFG_P8_16x32_16x16  = 12,
580     ADDR_PIPECFG_P8_32x32_16x16  = 13,
581     ADDR_PIPECFG_P8_32x32_16x32  = 14,
582     ADDR_PIPECFG_P8_32x64_32x32  = 15,
583     ADDR_PIPECFG_P16_32x32_8x16  = 17, /// 16 pipes
584     ADDR_PIPECFG_P16_32x32_16x16 = 18,
585     ADDR_PIPECFG_MAX             = 19,
586 } AddrPipeCfg;
587 
588 /**
589 ****************************************************************************************************
590 * AddrTileType
591 *
592 *   @brief
593 *       Neutral enums that specifies micro tile type (MICRO_TILE_MODE)
594 ****************************************************************************************************
595 */
596 typedef enum _AddrTileType
597 {
598     ADDR_DISPLAYABLE        = 0,    ///< Displayable tiling
599     ADDR_NON_DISPLAYABLE    = 1,    ///< Non-displayable tiling, a.k.a thin micro tiling
600     ADDR_DEPTH_SAMPLE_ORDER = 2,    ///< Same as non-displayable plus depth-sample-order
601     ADDR_ROTATED            = 3,    ///< Rotated displayable tiling
602     ADDR_THICK              = 4,    ///< Thick micro-tiling, only valid for THICK and XTHICK
603 } AddrTileType;
604 
605 ////////////////////////////////////////////////////////////////////////////////////////////////////
606 //
607 //  Type definitions: short system-independent names for address library types
608 //
609 ////////////////////////////////////////////////////////////////////////////////////////////////////
610 
611 #if !defined(__APPLE__) || defined(HAVE_TSERVER)
612 
613 #ifndef BOOL_32        // no bool type in C
614 /// @brief Boolean type, since none is defined in C
615 /// @ingroup type
616 #define BOOL_32 int
617 #endif
618 
619 #ifndef INT_32
620 #define INT_32  int
621 #endif
622 
623 #ifndef UINT_32
624 #define UINT_32 unsigned int
625 #endif
626 
627 #ifndef INT_16
628 #define INT_16  short
629 #endif
630 
631 #ifndef UINT_16
632 #define UINT_16 unsigned short
633 #endif
634 
635 #ifndef INT_8
636 #define INT_8   char
637 #endif
638 
639 #ifndef UINT_8
640 #define UINT_8  unsigned char
641 #endif
642 
643 #ifndef NULL
644 #define NULL 0
645 #endif
646 
647 #ifndef TRUE
648 #define TRUE 1
649 #endif
650 
651 #ifndef FALSE
652 #define FALSE 0
653 #endif
654 
655 //
656 //  64-bit integer types depend on the compiler
657 //
658 #if defined( __GNUC__ ) || defined( __WATCOMC__ )
659 #define INT_64   long long
660 #define UINT_64  unsigned long long
661 
662 #elif defined( _WIN32 )
663 #define INT_64   __int64
664 #define UINT_64  unsigned __int64
665 
666 #else
667 #error Unsupported compiler and/or operating system for 64-bit integers
668 
669 /// @brief 64-bit signed integer type (compiler dependent)
670 /// @ingroup type
671 ///
672 /// The addrlib defines a 64-bit signed integer type for either
673 /// Gnu/Watcom compilers (which use the first syntax) or for
674 /// the Windows VCC compiler (which uses the second syntax).
675 #define INT_64  long long OR __int64
676 
677 /// @brief 64-bit unsigned integer type (compiler dependent)
678 /// @ingroup type
679 ///
680 /// The addrlib defines a 64-bit unsigned integer type for either
681 /// Gnu/Watcom compilers (which use the first syntax) or for
682 /// the Windows VCC compiler (which uses the second syntax).
683 ///
684 #define UINT_64  unsigned long long OR unsigned __int64
685 #endif
686 
687 #endif // #if !defined(__APPLE__) || defined(HAVE_TSERVER)
688 
689 //  ADDR64X is used to print addresses in hex form on both Windows and Linux
690 //
691 #if defined( __GNUC__ ) || defined( __WATCOMC__ )
692 #define ADDR64X "llx"
693 #define ADDR64D "lld"
694 
695 #elif defined( _WIN32 )
696 #define ADDR64X "I64x"
697 #define ADDR64D "I64d"
698 
699 #else
700 #error Unsupported compiler and/or operating system for 64-bit integers
701 
702 /// @brief Addrlib device address 64-bit printf tag  (compiler dependent)
703 /// @ingroup type
704 ///
705 /// This allows printf to display an ADDR_64 for either the Windows VCC compiler
706 /// (which used this value) or the Gnu/Watcom compilers (which use "llx".
707 /// An example of use is printf("addr 0x%"ADDR64X"\n", address);
708 ///
709 #define ADDR64X "llx" OR "I64x"
710 #define ADDR64D "lld" OR "I64d"
711 #endif
712 
713 
714 /// @brief Union for storing a 32-bit float or 32-bit integer
715 /// @ingroup type
716 ///
717 /// This union provides a simple way to convert between a 32-bit float
718 /// and a 32-bit integer. It also prevents the compiler from producing
719 /// code that alters NaN values when assiging or coying floats.
720 /// Therefore, all address library routines that pass or return 32-bit
721 /// floating point data do so by passing or returning a FLT_32.
722 ///
723 typedef union {
724     INT_32   i;
725     UINT_32  u;
726     float    f;
727 } ADDR_FLT_32;
728 
729 
730 ////////////////////////////////////////////////////////////////////////////////////////////////////
731 //
732 //  Macros for controlling linking and building on multiple systems
733 //
734 ////////////////////////////////////////////////////////////////////////////////////////////////////
735 #if defined(_MSC_VER)
736 #if defined(va_copy)
737 #undef va_copy  //redefine va_copy to support VC2013
738 #endif
739 #endif
740 
741 #if !defined(va_copy)
742 #define va_copy(dst, src) \
743     ((void) memcpy(&(dst), &(src), sizeof(va_list)))
744 #endif
745 
746 #endif // __ADDR_TYPES_H__
747 
748