/external/swiftshader/third_party/llvm-7.0/llvm/lib/Support/ |
D | xxhash.cpp | 57 static uint64_t round(uint64_t Acc, uint64_t Input) { in round() 64 static uint64_t mergeRound(uint64_t Acc, uint64_t Val) { in mergeRound()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/ |
D | ARMParallelDSP.cpp | 387 Instruction *Acc = Reduction.Phi; in InsertParallelMACs() local 433 Instruction *Acc = dyn_cast<Instruction>(Phi.getIncomingValueForBlock(Latch)); in MatchReductions() local 450 const Instruction *Acc, in AddMACCandidate() 465 const Instruction *Acc = R.AccIntAdd; in MatchParallelMACSequences() local 632 static void CreateLoadIns(IRBuilder<NoFolder> &IRB, Instruction *Acc, in CreateLoadIns() 643 Instruction *Acc, in CreateSMLADCall()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/ |
D | ExpandReductions.cpp | 89 Value *Acc = nullptr; in expandReductions() local
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Analysis/ |
D | MemorySSAUpdater.cpp | 591 if (MemorySSA::AccessList *Acc = MSSA->getWritableBlockAccesses(BB)) in removeBlocks() local 598 MemorySSA::AccessList *Acc = MSSA->getWritableBlockAccesses(BB); in removeBlocks() local
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/external/swiftshader/third_party/llvm-7.0/llvm/tools/llvm-rc/ |
D | ResourceScriptStmt.cpp | 50 for (const auto &Acc : Accelerators) { in log() local
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D | ResourceFileWriter.cpp | 688 for (auto &Acc : Res->Accelerators) { in writeAcceleratorsBody() local
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/external/spirv-llvm/lib/SPIRV/ |
D | SPIRVUtil.cpp | 1233 SPIRVAccessQualifierKind Acc) { in getSPIRVImageTypePostfixes() 1293 mapOCLTypeNameToSPIRV(StringRef Name, StringRef Acc) { in mapOCLTypeNameToSPIRV() 1433 auto Acc = TyName.substr(TyName.size() - 4, 2); in getAccessQualifier() local 1445 std::string Acc = kAccessQualName::ReadOnly; in getSPIRVImageTypeFromOCL() local
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D | SPIRVWriter.cpp | 486 std::string Acc = kAccessQualName::ReadOnly; in transType() local
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/GlobalISel/ |
D | LegalizerInfo.cpp | 551 [](unsigned Acc, const MCOperandInfo &OpInfo) { in verify()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Hexagon/ |
D | HexagonStoreWidening.cpp | 402 unsigned Acc = 0; // Value accumulator. in createWideStores() local
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D | HexagonConstExtenders.cpp | 1375 [](unsigned Acc, const RangeTree::Node *N) { in assignInits()
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D | HexagonConstPropagation.cpp | 2973 MachineOperand &Acc = MI.getOperand(1); in rewriteHexConstUses() local
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/external/llvm/lib/Target/Hexagon/ |
D | HexagonStoreWidening.cpp | 406 unsigned Acc = 0; // Value accumulator. in createWideStores() local
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/IR/ |
D | IRBuilder.cpp | 321 CallInst *IRBuilderBase::CreateFAddReduce(Value *Acc, Value *Src) { in CreateFAddReduce() 331 CallInst *IRBuilderBase::CreateFMulReduce(Value *Acc, Value *Src) { in CreateFMulReduce()
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/external/spirv-llvm/lib/SPIRV/libSPIRV/ |
D | SPIRVType.h | 459 std::vector<SPIRVAccessQualifierKind> Acc; variable
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D | SPIRVModule.cpp | 759 const SPIRVTypeImageDescriptor &Desc, SPIRVAccessQualifierKind Acc) { in addImageType()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Transforms/Utils/ |
D | LoopUtils.cpp | 1534 llvm::getOrderedReduction(IRBuilder<> &Builder, Value *Acc, Value *Src, in getOrderedReduction()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Transforms/Scalar/ |
D | GVNHoist.cpp | 387 const MemorySSA::AccessList *Acc = MSSA->getBlockAccesses(BB); in hasMemoryUse() local
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/external/swiftshader/third_party/llvm-7.0/llvm/unittests/Analysis/ |
D | ScalarEvolutionTest.cpp | 339 SmallVector<Instruction*, 8> Muls(8), Acc(8), NextAcc(8); in TEST_F() local
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/external/clang/utils/TableGen/ |
D | NeonEmitter.cpp | 113 TypeSpec Acc; in fromTypeSpecs() local
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/external/llvm/lib/Target/ARM/ |
D | ARMISelDAGToDAG.cpp | 2599 SDValue Acc; in trySMLAWSMULW() local
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Transforms/Instrumentation/ |
D | MemorySanitizer.cpp | 2616 Value *Acc = IRB.CreateExtractElement( in handleMaskedLoad() local
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