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Searched defs:Adcs (Results 1 – 5 of 5) sorted by relevance

/external/vixl/test/aarch32/
Dtest-assembler-aarch32.cc296 __ Adcs(r3, r2, r1); in TEST() local
311 __ Adcs(r3, r2, Operand(r1, ASR, 31)); in TEST() local
326 __ Adcs(r3, r2, Operand(r1, LSR, 31)); in TEST() local
341 __ Adcs(r3, r2, Operand(r1, LSL, 4)); in TEST() local
356 __ Adcs(r3, r2, Operand(r1, ROR, 8)); in TEST() local
371 __ Adcs(r3, r2, Operand(r1, RRX)); in TEST() local
386 __ Adcs(r3, r2, Operand(r1, RRX)); in TEST() local
/external/v8/src/arm64/
Dmacro-assembler-arm64-inl.h190 void MacroAssembler::Adcs(const Register& rd, in Adcs() function
/external/vixl/src/aarch64/
Dmacro-assembler-aarch64.cc1781 void MacroAssembler::Adcs(const Register& rd, in Adcs() function in vixl::aarch64::MacroAssembler
/external/vixl/src/aarch32/
Dmacro-assembler-aarch32.h1037 void Adcs(Condition cond, Register rd, Register rn, const Operand& operand) { in Adcs() function
1047 void Adcs(Register rd, Register rn, const Operand& operand) { in Adcs() function
/external/vixl/test/aarch64/
Dtest-assembler-aarch64.cc9408 __ Adcs(x10, x0, Operand(x1, SXTX, 1)); in TEST() local
9420 __ Adcs(x10, x0, Operand(x1, UXTB, 2)); in TEST() local
9431 __ Adcs(x10, x0, Operand(1)); in TEST() local