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1;/** @file
2;
3;    IDT vector entry.
4;
5;  Copyright (c) 2007 - 2008, Intel Corporation. All rights reserved.<BR>
6;  This program and the accompanying materials
7;  are licensed and made available under the terms and conditions of the BSD License
8;  which accompanies this distribution.  The full text of the license may be found at
9;  http://opensource.org/licenses/bsd-license.php
10;
11;  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
12;  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
13;
14;**/
15
16    .686p
17    .model  flat,C
18    .code
19
20;
21;------------------------------------------------------------------------------
22;  Generic IDT Vector Handlers for the Host.
23;
24;------------------------------------------------------------------------------
25
26ALIGN   8
27PUBLIC  AsmGetVectorTemplatInfo
28PUBLIC  AsmVectorFixup
29
30PUBLIC  AsmVectorFixup
31
32@VectorTemplateBase:
33        push  eax
34        db    6ah       ; push #VectorNumber
35@VectorNum:
36        db    0
37        mov   eax, CommonInterruptEntry
38        jmp   eax
39@VectorTemplateEnd:
40
41
42AsmGetVectorTemplatInfo PROC
43        mov   ecx, [esp + 4]
44        mov   [ecx], @VectorTemplateBase
45        mov   eax, (@VectorTemplateEnd - @VectorTemplateBase)
46        ret
47AsmGetVectorTemplatInfo ENDP
48
49
50AsmVectorFixup PROC
51        mov   eax, dword ptr [esp + 8]
52        mov   ecx, [esp + 4]
53        mov   [ecx + (@VectorNum - @VectorTemplateBase)], al
54        ret
55AsmVectorFixup ENDP
56
57
58;---------------------------------------;
59; CommonInterruptEntry                  ;
60;---------------------------------------;
61; The follow algorithm is used for the common interrupt routine.
62
63;
64; +---------------------+ <-- 16-byte aligned ensured by processor
65; +    Old SS           +
66; +---------------------+
67; +    Old RSP          +
68; +---------------------+
69; +    RFlags           +
70; +---------------------+
71; +    CS               +
72; +---------------------+
73; +    RIP              +
74; +---------------------+
75; +    Error Code       +
76; +---------------------+
77; +    Vector Number    +
78; +---------------------+
79
80CommonInterruptEntry PROC
81  cli
82
83  jmp $
84CommonInterruptEntry ENDP
85
86END
87
88
89