| /external/llvm/lib/Target/AArch64/ |
| D | AArch64RegisterInfo.cpp | 314 unsigned BaseReg, in isFrameOffsetLegal()
325 unsigned BaseReg, in materializeFrameBaseRegister()
346 void AArch64RegisterInfo::resolveFrameIndex(MachineInstr &MI, unsigned BaseReg, in resolveFrameIndex()
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| D | AArch64StorePairSuppress.cpp | 146 unsigned BaseReg; in runOnMachineFunction() local
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| D | AArch64LoadStoreOptimizer.cpp | 1104 unsigned BaseReg = getLdStBaseOp(LoadMI).getReg(); in findMatchingStore() local
1217 unsigned BaseReg = getLdStBaseOp(FirstMI).getReg(); in findMatchingInsn() local
1422 unsigned BaseReg, int Offset) { in isMatchingUpdateInsn()
1480 unsigned BaseReg = getLdStBaseOp(MemMI).getReg(); in findMatchingUpdateInsnForward() local
1534 unsigned BaseReg = getLdStBaseOp(MemMI).getReg(); in findMatchingUpdateInsnBackward() local
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/ |
| D | AArch64RegisterInfo.cpp | 342 unsigned BaseReg, in isFrameOffsetLegal()
353 unsigned BaseReg, in materializeFrameBaseRegister()
374 void AArch64RegisterInfo::resolveFrameIndex(MachineInstr &MI, unsigned BaseReg, in resolveFrameIndex()
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| D | AArch64StorePairSuppress.cpp | 151 unsigned BaseReg; in runOnMachineFunction() local
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| D | AArch64LoadStoreOptimizer.cpp | 1048 unsigned BaseReg = getLdStBaseOp(LoadMI).getReg(); in findMatchingStore() local
1163 unsigned BaseReg = getLdStBaseOp(FirstMI).getReg(); in findMatchingInsn() local
1381 unsigned BaseReg, int Offset) { in isMatchingUpdateInsn()
1439 unsigned BaseReg = getLdStBaseOp(MemMI).getReg(); in findMatchingUpdateInsnForward() local
1493 unsigned BaseReg = getLdStBaseOp(MemMI).getReg(); in findMatchingUpdateInsnBackward() local
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| D | AArch64FalkorHWPFFix.cpp | 217 unsigned BaseReg = 0; member
646 unsigned BaseReg = MI.getOperand(BaseRegIdx).getReg(); in getLoadInfo() local
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| /external/swiftshader/third_party/LLVM/include/llvm/Transforms/Utils/ |
| D | AddrModeMatcher.h | 37 Value *BaseReg; member
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| /external/llvm/lib/CodeGen/ |
| D | LocalStackSlotAllocation.cpp | 255 lookupCandidateBaseReg(unsigned BaseReg, in lookupCandidateBaseReg()
326 unsigned BaseReg = 0; in insertFrameReferenceRegisters() local
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| /external/swiftshader/third_party/LLVM/lib/Target/X86/InstPrinter/ |
| D | X86ATTInstPrinter.cpp | 110 const MCOperand &BaseReg = MI->getOperand(Op); in printMemReference() local
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| D | X86IntelInstPrinter.cpp | 97 const MCOperand &BaseReg = MI->getOperand(Op); in printMemReference() local
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/InstPrinter/ |
| D | X86IntelInstPrinter.cpp | 74 const MCOperand &BaseReg = MI->getOperand(Op+X86::AddrBaseReg); in printMemReference() local
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| D | X86ATTInstPrinter.cpp | 113 const MCOperand &BaseReg = MI->getOperand(Op + X86::AddrBaseReg); in printMemReference() local
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/ |
| D | LocalStackSlotAllocation.cpp | 261 lookupCandidateBaseReg(unsigned BaseReg, in lookupCandidateBaseReg()
335 unsigned BaseReg = 0; in insertFrameReferenceRegisters() local
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/ |
| D | ThumbRegisterInfo.cpp | 126 const DebugLoc &dl, unsigned DestReg, unsigned BaseReg, int NumBytes, in emitThumbRegPlusImmInReg()
189 unsigned BaseReg, int NumBytes, in emitThumbRegPlusImmediate()
430 void ThumbRegisterInfo::resolveFrameIndex(MachineInstr &MI, unsigned BaseReg, in resolveFrameIndex()
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| D | ARMBaseRegisterInfo.cpp | 608 unsigned BaseReg, int FrameIdx, in materializeFrameBaseRegister()
632 void ARMBaseRegisterInfo::resolveFrameIndex(MachineInstr &MI, unsigned BaseReg, in resolveFrameIndex()
660 bool ARMBaseRegisterInfo::isFrameOffsetLegal(const MachineInstr *MI, unsigned BaseReg, in isFrameOffsetLegal()
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| /external/llvm/lib/Target/ARM/ |
| D | ThumbRegisterInfo.cpp | 125 const DebugLoc &dl, unsigned DestReg, unsigned BaseReg, int NumBytes, in emitThumbRegPlusImmInReg()
181 unsigned BaseReg, int NumBytes, in emitThumbRegPlusImmediate()
421 void ThumbRegisterInfo::resolveFrameIndex(MachineInstr &MI, unsigned BaseReg, in resolveFrameIndex()
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| D | ARMBaseRegisterInfo.cpp | 586 unsigned BaseReg, int FrameIdx, in materializeFrameBaseRegister()
610 void ARMBaseRegisterInfo::resolveFrameIndex(MachineInstr &MI, unsigned BaseReg, in resolveFrameIndex()
638 bool ARMBaseRegisterInfo::isFrameOffsetLegal(const MachineInstr *MI, unsigned BaseReg, in isFrameOffsetLegal()
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| /external/llvm/lib/Target/AMDGPU/ |
| D | SIRegisterInfo.cpp | 123 unsigned BaseReg(AMDGPU::SGPR_32RegClass.getRegister(BaseIdx)); in reservedPrivateSegmentBufferReg() local
272 unsigned BaseReg, in materializeFrameBaseRegister()
303 void SIRegisterInfo::resolveFrameIndex(MachineInstr &MI, unsigned BaseReg, in resolveFrameIndex()
362 unsigned BaseReg, in isFrameOffsetLegal()
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| /external/llvm/lib/Target/X86/ |
| D | X86AsmPrinter.cpp | 231 const MachineOperand &BaseReg = MI->getOperand(Op+X86::AddrBaseReg); in printLeaMemReference() local
296 const MachineOperand &BaseReg = MI->getOperand(Op+X86::AddrBaseReg); in printIntelMemReference() local
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/ |
| D | X86AsmPrinter.cpp | 259 const MachineOperand &BaseReg = MI->getOperand(Op+X86::AddrBaseReg); in printLeaMemReference() local
324 const MachineOperand &BaseReg = MI->getOperand(Op+X86::AddrBaseReg); in printIntelMemReference() local
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| /external/llvm/lib/Target/X86/MCTargetDesc/ |
| D | X86MCCodeEmitter.cpp | 60 const MCOperand &BaseReg = MI.getOperand(Op+X86::AddrBaseReg); in Is16BitMemOperand() local
206 const MCOperand &BaseReg = MI.getOperand(Op+X86::AddrBaseReg); in Is32BitMemOperand() local
225 const MCOperand &BaseReg = MI.getOperand(Op+X86::AddrBaseReg); in Is64BitMemOperand() local
358 unsigned BaseReg = Base.getReg(); in emitMemModRMByte() local
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| /external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
| D | Thumb1RegisterInfo.cpp | 92 unsigned DestReg, unsigned BaseReg, in emitThumbRegPlusImmInReg()
169 unsigned DestReg, unsigned BaseReg, in emitThumbRegPlusImmediate()
531 unsigned BaseReg, int64_t Offset) const { in resolveFrameIndex()
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| D | Thumb2SizeReduction.cpp | 369 unsigned BaseReg = MI->getOperand(0).getReg(); in ReduceLoadStore() local
391 unsigned BaseReg = MI->getOperand(1).getReg(); in ReduceLoadStore() local
405 unsigned BaseReg = MI->getOperand(1).getReg(); in ReduceLoadStore() local
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/MCTargetDesc/ |
| D | X86MCCodeEmitter.cpp | 68 const MCOperand &BaseReg = MI.getOperand(Op+X86::AddrBaseReg); in Is16BitMemOperand() local
210 const MCOperand &BaseReg = MI.getOperand(Op+X86::AddrBaseReg); in Is32BitMemOperand() local
231 const MCOperand &BaseReg = MI.getOperand(Op+X86::AddrBaseReg); in Is64BitMemOperand() local
387 unsigned BaseReg = Base.getReg(); in emitMemModRMByte() local
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