| /external/v8/src/builtins/arm64/ |
| D | builtins-arm64.cc | 128 __ Bic(slot_count, slot_count_without_rounding, 1); in Generate_JSBuiltinsConstructStubHelper() local
305 __ Bic(x10, x12, 1); in Generate_JSConstructStubGeneric() local
438 __ Bic(x11, x11, 1); in Generate_ResumeGeneratorTrampoline() local
587 __ Bic(slots_to_claim, slots_to_claim, 1); in Generate_JSEntryTrampolineHelper() local
974 __ Bic(x11, x11, 1); in Generate_InterpreterEntryTrampoline() local
1070 __ Bic(slots_to_claim, slots_to_claim, 1); in Generate_InterpreterPushArgs() local
2570 __ Bic(scratch1, scratch1, 1); in Generate_ArgumentsAdaptorTrampoline() local
|
| /external/vixl/test/aarch32/ |
| D | test-assembler-aarch32.cc | 961 __ Bic(r3, r0, r1); in TEST() local
962 __ Bic(r4, r0, Operand(r1, LSL, 4)); in TEST() local
963 __ Bic(r5, r0, Operand(r1, LSR, 1)); in TEST() local
964 __ Bic(r6, r0, Operand(r1, ASR, 20)); in TEST() local
965 __ Bic(r7, r0, Operand(r1, ROR, 28)); in TEST() local
966 __ Bic(r8, r0, 0x1f); in TEST() local
970 __ Bic(r9, r1, Operand(r1, RRX)); in TEST() local
974 __ Bic(r10, r1, Operand(r1, RRX)); in TEST() local
3265 __ Bic(r0, r0, 0); in TEST() local
3309 __ Bic(r2, r0, 0xffffffff); in TEST() local
|
| /external/vixl/test/aarch64/ |
| D | test-assembler-aarch64.cc | 1053 __ Bic(x2, x0, Operand(x1)); in TEST() local
1054 __ Bic(w3, w0, Operand(w1, LSL, 4)); in TEST() local
1055 __ Bic(x4, x0, Operand(x1, LSL, 4)); in TEST() local
1056 __ Bic(x5, x0, Operand(x1, LSR, 1)); in TEST() local
1057 __ Bic(w6, w0, Operand(w1, ASR, 20)); in TEST() local
1058 __ Bic(x7, x0, Operand(x1, ASR, 20)); in TEST() local
1059 __ Bic(w8, w0, Operand(w1, ROR, 28)); in TEST() local
1060 __ Bic(x9, x0, Operand(x1, ROR, 24)); in TEST() local
1061 __ Bic(x10, x0, Operand(0x1f)); in TEST() local
1062 __ Bic(x11, x0, Operand(0x100)); in TEST() local
[all …]
|
| /external/v8/src/compiler/arm64/ |
| D | code-generator-arm64.cc | 1000 __ Bic(i.OutputRegister(), i.InputOrZeroRegister64(0), in AssembleArchInstruction() local
1004 __ Bic(i.OutputRegister32(), i.InputOrZeroRegister32(0), in AssembleArchInstruction() local
|
| /external/v8/src/arm64/ |
| D | macro-assembler-arm64-inl.h | 46 void TurboAssembler::Bic(const Register& rd, const Register& rn, in Bic() function
|
| /external/swiftshader/third_party/subzero/src/ |
| D | IceInstARM32.h | 385 Bic, enumerator
|
| /external/vixl/src/aarch64/ |
| D | macro-assembler-aarch64.cc | 752 void MacroAssembler::Bic(const Register& rd, in Bic() function in vixl::aarch64::MacroAssembler
|
| /external/vixl/src/aarch32/ |
| D | macro-assembler-aarch32.h | 1347 void Bic(Condition cond, Register rd, Register rn, const Operand& operand) { in Bic() function
1371 void Bic(Register rd, Register rn, const Operand& operand) { in Bic() function
1374 void Bic(FlagsUpdate flags, in Bic() function
1398 void Bic(FlagsUpdate flags, in Bic() function
|