• Home
  • Line#
  • Scopes#
  • Navigate#
  • Raw
  • Download
1if CPU_V7A
2
3config CPU_V7_HAS_NONSEC
4        bool
5
6config CPU_V7_HAS_VIRT
7        bool
8
9config ARCH_SUPPORT_PSCI
10        bool
11
12config ARMV7_NONSEC
13	bool "Enable support for booting in non-secure mode" if EXPERT
14	depends on CPU_V7_HAS_NONSEC
15	default y
16	---help---
17	Say Y here to enable support for booting in non-secure / SVC mode.
18
19config ARMV7_BOOT_SEC_DEFAULT
20	bool "Boot in secure mode by default" if EXPERT
21	depends on ARMV7_NONSEC
22	default y if TEGRA
23	---help---
24	Say Y here to boot in secure mode by default even if non-secure mode
25	is supported. This option is useful to boot kernels which do not
26	suppport booting in non-secure mode. Only set this if you need it.
27	This can be overridden at run-time by setting the bootm_boot_mode env.
28	variable to "sec" or "nonsec".
29
30config ARMV7_VIRT
31	bool "Enable support for hardware virtualization" if EXPERT
32	depends on CPU_V7_HAS_VIRT && ARMV7_NONSEC
33	default y
34	---help---
35	Say Y here to boot in hypervisor (HYP) mode when booting non-secure.
36
37config ARMV7_PSCI
38	bool "Enable PSCI support" if EXPERT
39	depends on ARMV7_NONSEC && ARCH_SUPPORT_PSCI
40	default y
41	help
42	  Say Y here to enable PSCI support.
43
44config ARMV7_PSCI_NR_CPUS
45	int "Maximum supported CPUs for PSCI"
46	depends on ARMV7_NONSEC
47	default 4
48	help
49	  The maximum number of CPUs supported in the PSCI firmware.
50	  It is no problem to set a larger value than the number of
51	  CPUs in the actual hardware implementation.
52
53config ARMV7_LPAE
54	bool "Use LPAE page table format" if EXPERT
55	depends on CPU_V7A
56	default n
57	---help---
58	Say Y here to use the long descriptor page table format. This is
59	required if U-Boot runs in HYP mode.
60
61endif
62