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1menu "mpc85xx CPU"
2	depends on MPC85xx
3
4config SYS_CPU
5	default "mpc85xx"
6
7config CMD_ERRATA
8	bool "Enable the 'errata' command"
9	depends on MPC85xx
10	default y
11	help
12	  This enables the 'errata' command which displays a list of errata
13	  work-arounds which are enabled for the current board.
14
15choice
16	prompt "Target select"
17	optional
18
19config TARGET_SBC8548
20	bool "Support sbc8548"
21	select ARCH_MPC8548
22
23config TARGET_SOCRATES
24	bool "Support socrates"
25	select ARCH_MPC8544
26
27config TARGET_B4420QDS
28	bool "Support B4420QDS"
29	select ARCH_B4420
30	select SUPPORT_SPL
31	select PHYS_64BIT
32	imply PANIC_HANG
33
34config TARGET_B4860QDS
35	bool "Support B4860QDS"
36	select ARCH_B4860
37	select BOARD_LATE_INIT if CHAIN_OF_TRUST
38	select SUPPORT_SPL
39	select PHYS_64BIT
40	imply PANIC_HANG
41
42config TARGET_BSC9131RDB
43	bool "Support BSC9131RDB"
44	select ARCH_BSC9131
45	select SUPPORT_SPL
46	select BOARD_EARLY_INIT_F
47
48config TARGET_BSC9132QDS
49	bool "Support BSC9132QDS"
50	select ARCH_BSC9132
51	select BOARD_LATE_INIT if CHAIN_OF_TRUST
52	select SUPPORT_SPL
53	select BOARD_EARLY_INIT_F
54
55config TARGET_C29XPCIE
56	bool "Support C29XPCIE"
57	select ARCH_C29X
58	select BOARD_LATE_INIT if CHAIN_OF_TRUST
59	select SUPPORT_SPL
60	select SUPPORT_TPL
61	select PHYS_64BIT
62	imply PANIC_HANG
63
64config TARGET_P3041DS
65	bool "Support P3041DS"
66	select PHYS_64BIT
67	select ARCH_P3041
68	select BOARD_LATE_INIT if CHAIN_OF_TRUST
69	imply CMD_SATA
70	imply PANIC_HANG
71
72config TARGET_P4080DS
73	bool "Support P4080DS"
74	select PHYS_64BIT
75	select ARCH_P4080
76	select BOARD_LATE_INIT if CHAIN_OF_TRUST
77	imply CMD_SATA
78	imply PANIC_HANG
79
80config TARGET_P5020DS
81	bool "Support P5020DS"
82	select PHYS_64BIT
83	select ARCH_P5020
84	select BOARD_LATE_INIT if CHAIN_OF_TRUST
85	imply CMD_SATA
86	imply PANIC_HANG
87
88config TARGET_P5040DS
89	bool "Support P5040DS"
90	select PHYS_64BIT
91	select ARCH_P5040
92	select BOARD_LATE_INIT if CHAIN_OF_TRUST
93	imply CMD_SATA
94	imply PANIC_HANG
95
96config TARGET_MPC8536DS
97	bool "Support MPC8536DS"
98	select ARCH_MPC8536
99# Use DDR3 controller with DDR2 DIMMs on this board
100	select SYS_FSL_DDRC_GEN3
101	imply CMD_SATA
102	imply FSL_SATA
103
104config TARGET_MPC8541CDS
105	bool "Support MPC8541CDS"
106	select ARCH_MPC8541
107
108config TARGET_MPC8544DS
109	bool "Support MPC8544DS"
110	select ARCH_MPC8544
111	imply PANIC_HANG
112
113config TARGET_MPC8548CDS
114	bool "Support MPC8548CDS"
115	select ARCH_MPC8548
116
117config TARGET_MPC8555CDS
118	bool "Support MPC8555CDS"
119	select ARCH_MPC8555
120
121config TARGET_MPC8568MDS
122	bool "Support MPC8568MDS"
123	select ARCH_MPC8568
124
125config TARGET_MPC8569MDS
126	bool "Support MPC8569MDS"
127	select ARCH_MPC8569
128
129config TARGET_MPC8572DS
130	bool "Support MPC8572DS"
131	select ARCH_MPC8572
132# Use DDR3 controller with DDR2 DIMMs on this board
133	select SYS_FSL_DDRC_GEN3
134	imply SCSI
135	imply PANIC_HANG
136
137config TARGET_P1010RDB_PA
138	bool "Support P1010RDB_PA"
139	select ARCH_P1010
140	select BOARD_LATE_INIT if CHAIN_OF_TRUST
141	select SUPPORT_SPL
142	select SUPPORT_TPL
143	imply CMD_EEPROM
144	imply CMD_SATA
145	imply PANIC_HANG
146
147config TARGET_P1010RDB_PB
148	bool "Support P1010RDB_PB"
149	select ARCH_P1010
150	select BOARD_LATE_INIT if CHAIN_OF_TRUST
151	select SUPPORT_SPL
152	select SUPPORT_TPL
153	imply CMD_EEPROM
154	imply CMD_SATA
155	imply PANIC_HANG
156
157config TARGET_P1022DS
158	bool "Support P1022DS"
159	select ARCH_P1022
160	select SUPPORT_SPL
161	select SUPPORT_TPL
162	imply CMD_SATA
163	imply FSL_SATA
164
165config TARGET_P1023RDB
166	bool "Support P1023RDB"
167	select ARCH_P1023
168	imply CMD_EEPROM
169	imply PANIC_HANG
170
171config TARGET_P1020MBG
172	bool "Support P1020MBG-PC"
173	select SUPPORT_SPL
174	select SUPPORT_TPL
175	select ARCH_P1020
176	imply CMD_EEPROM
177	imply CMD_SATA
178	imply PANIC_HANG
179
180config TARGET_P1020RDB_PC
181	bool "Support P1020RDB-PC"
182	select SUPPORT_SPL
183	select SUPPORT_TPL
184	select ARCH_P1020
185	imply CMD_EEPROM
186	imply CMD_SATA
187	imply PANIC_HANG
188
189config TARGET_P1020RDB_PD
190	bool "Support P1020RDB-PD"
191	select SUPPORT_SPL
192	select SUPPORT_TPL
193	select ARCH_P1020
194	imply CMD_EEPROM
195	imply CMD_SATA
196	imply PANIC_HANG
197
198config TARGET_P1020UTM
199	bool "Support P1020UTM"
200	select SUPPORT_SPL
201	select SUPPORT_TPL
202	select ARCH_P1020
203	imply CMD_EEPROM
204	imply CMD_SATA
205	imply PANIC_HANG
206
207config TARGET_P1021RDB
208	bool "Support P1021RDB"
209	select SUPPORT_SPL
210	select SUPPORT_TPL
211	select ARCH_P1021
212	imply CMD_EEPROM
213	imply CMD_SATA
214	imply PANIC_HANG
215
216config TARGET_P1024RDB
217	bool "Support P1024RDB"
218	select SUPPORT_SPL
219	select SUPPORT_TPL
220	select ARCH_P1024
221	imply CMD_EEPROM
222	imply CMD_SATA
223	imply PANIC_HANG
224
225config TARGET_P1025RDB
226	bool "Support P1025RDB"
227	select SUPPORT_SPL
228	select SUPPORT_TPL
229	select ARCH_P1025
230	imply CMD_EEPROM
231	imply CMD_SATA
232	imply SATA_SIL
233
234config TARGET_P2020RDB
235	bool "Support P2020RDB-PC"
236	select SUPPORT_SPL
237	select SUPPORT_TPL
238	select ARCH_P2020
239	imply CMD_EEPROM
240	imply CMD_SATA
241	imply SATA_SIL
242
243config TARGET_P1_TWR
244	bool "Support p1_twr"
245	select ARCH_P1025
246
247config TARGET_P2041RDB
248	bool "Support P2041RDB"
249	select ARCH_P2041
250	select BOARD_LATE_INIT if CHAIN_OF_TRUST
251	select PHYS_64BIT
252	imply CMD_SATA
253	imply FSL_SATA
254
255config TARGET_QEMU_PPCE500
256	bool "Support qemu-ppce500"
257	select ARCH_QEMU_E500
258	select PHYS_64BIT
259
260config TARGET_T1024QDS
261	bool "Support T1024QDS"
262	select ARCH_T1024
263	select BOARD_LATE_INIT if CHAIN_OF_TRUST
264	select SUPPORT_SPL
265	select PHYS_64BIT
266	imply CMD_EEPROM
267	imply CMD_SATA
268	imply FSL_SATA
269
270config TARGET_T1023RDB
271	bool "Support T1023RDB"
272	select ARCH_T1023
273	select BOARD_LATE_INIT if CHAIN_OF_TRUST
274	select SUPPORT_SPL
275	select PHYS_64BIT
276	imply CMD_EEPROM
277	imply PANIC_HANG
278
279config TARGET_T1024RDB
280	bool "Support T1024RDB"
281	select ARCH_T1024
282	select BOARD_LATE_INIT if CHAIN_OF_TRUST
283	select SUPPORT_SPL
284	select PHYS_64BIT
285	imply CMD_EEPROM
286	imply PANIC_HANG
287
288config TARGET_T1040QDS
289	bool "Support T1040QDS"
290	select ARCH_T1040
291	select BOARD_LATE_INIT if CHAIN_OF_TRUST
292	select PHYS_64BIT
293	imply CMD_EEPROM
294	imply CMD_SATA
295	imply PANIC_HANG
296
297config TARGET_T1040RDB
298	bool "Support T1040RDB"
299	select ARCH_T1040
300	select BOARD_LATE_INIT if CHAIN_OF_TRUST
301	select SUPPORT_SPL
302	select PHYS_64BIT
303	imply CMD_SATA
304	imply PANIC_HANG
305
306config TARGET_T1040D4RDB
307	bool "Support T1040D4RDB"
308	select ARCH_T1040
309	select BOARD_LATE_INIT if CHAIN_OF_TRUST
310	select SUPPORT_SPL
311	select PHYS_64BIT
312	imply CMD_SATA
313	imply PANIC_HANG
314
315config TARGET_T1042RDB
316	bool "Support T1042RDB"
317	select ARCH_T1042
318	select BOARD_LATE_INIT if CHAIN_OF_TRUST
319	select SUPPORT_SPL
320	select PHYS_64BIT
321	imply CMD_SATA
322
323config TARGET_T1042D4RDB
324	bool "Support T1042D4RDB"
325	select ARCH_T1042
326	select BOARD_LATE_INIT if CHAIN_OF_TRUST
327	select SUPPORT_SPL
328	select PHYS_64BIT
329	imply CMD_SATA
330	imply PANIC_HANG
331
332config TARGET_T1042RDB_PI
333	bool "Support T1042RDB_PI"
334	select ARCH_T1042
335	select BOARD_LATE_INIT if CHAIN_OF_TRUST
336	select SUPPORT_SPL
337	select PHYS_64BIT
338	imply CMD_SATA
339	imply PANIC_HANG
340
341config TARGET_T2080QDS
342	bool "Support T2080QDS"
343	select ARCH_T2080
344	select BOARD_LATE_INIT if CHAIN_OF_TRUST
345	select SUPPORT_SPL
346	select PHYS_64BIT
347	imply CMD_SATA
348
349config TARGET_T2080RDB
350	bool "Support T2080RDB"
351	select ARCH_T2080
352	select BOARD_LATE_INIT if CHAIN_OF_TRUST
353	select SUPPORT_SPL
354	select PHYS_64BIT
355	imply CMD_SATA
356	imply PANIC_HANG
357
358config TARGET_T2081QDS
359	bool "Support T2081QDS"
360	select ARCH_T2081
361	select SUPPORT_SPL
362	select PHYS_64BIT
363
364config TARGET_T4160QDS
365	bool "Support T4160QDS"
366	select ARCH_T4160
367	select BOARD_LATE_INIT if CHAIN_OF_TRUST
368	select SUPPORT_SPL
369	select PHYS_64BIT
370	imply CMD_SATA
371	imply PANIC_HANG
372
373config TARGET_T4160RDB
374	bool "Support T4160RDB"
375	select ARCH_T4160
376	select SUPPORT_SPL
377	select PHYS_64BIT
378	imply PANIC_HANG
379
380config TARGET_T4240QDS
381	bool "Support T4240QDS"
382	select ARCH_T4240
383	select BOARD_LATE_INIT if CHAIN_OF_TRUST
384	select SUPPORT_SPL
385	select PHYS_64BIT
386	imply CMD_SATA
387	imply PANIC_HANG
388
389config TARGET_T4240RDB
390	bool "Support T4240RDB"
391	select ARCH_T4240
392	select SUPPORT_SPL
393	select PHYS_64BIT
394	imply CMD_SATA
395	imply PANIC_HANG
396
397config TARGET_CONTROLCENTERD
398	bool "Support controlcenterd"
399	select ARCH_P1022
400
401config TARGET_KMP204X
402	bool "Support kmp204x"
403	select ARCH_P2041
404	select PHYS_64BIT
405	imply CMD_CRAMFS
406	imply FS_CRAMFS
407
408config TARGET_XPEDITE520X
409	bool "Support xpedite520x"
410	select ARCH_MPC8548
411
412config TARGET_XPEDITE537X
413	bool "Support xpedite537x"
414	select ARCH_MPC8572
415# Use DDR3 controller with DDR2 DIMMs on this board
416	select SYS_FSL_DDRC_GEN3
417
418config TARGET_XPEDITE550X
419	bool "Support xpedite550x"
420	select ARCH_P2020
421
422config TARGET_UCP1020
423	bool "Support uCP1020"
424	select ARCH_P1020
425	imply CMD_SATA
426	imply PANIC_HANG
427
428config TARGET_CYRUS_P5020
429	bool "Support Varisys Cyrus P5020"
430	select ARCH_P5020
431	select PHYS_64BIT
432	imply PANIC_HANG
433
434config TARGET_CYRUS_P5040
435	 bool "Support Varisys Cyrus P5040"
436	select ARCH_P5040
437	select PHYS_64BIT
438	imply PANIC_HANG
439
440endchoice
441
442config ARCH_B4420
443	bool
444	select E500MC
445	select E6500
446	select FSL_LAW
447	select SYS_FSL_DDR_VER_47
448	select SYS_FSL_ERRATUM_A004477
449	select SYS_FSL_ERRATUM_A005871
450	select SYS_FSL_ERRATUM_A006379
451	select SYS_FSL_ERRATUM_A006384
452	select SYS_FSL_ERRATUM_A006475
453	select SYS_FSL_ERRATUM_A006593
454	select SYS_FSL_ERRATUM_A007075
455	select SYS_FSL_ERRATUM_A007186
456	select SYS_FSL_ERRATUM_A007212
457	select SYS_FSL_ERRATUM_A009942
458	select SYS_FSL_HAS_DDR3
459	select SYS_FSL_HAS_SEC
460	select SYS_FSL_QORIQ_CHASSIS2
461	select SYS_FSL_SEC_BE
462	select SYS_FSL_SEC_COMPAT_4
463	select SYS_PPC64
464	select FSL_IFC
465	imply CMD_EEPROM
466	imply CMD_NAND
467	imply CMD_REGINFO
468
469config ARCH_B4860
470	bool
471	select E500MC
472	select E6500
473	select FSL_LAW
474	select SYS_FSL_DDR_VER_47
475	select SYS_FSL_ERRATUM_A004477
476	select SYS_FSL_ERRATUM_A005871
477	select SYS_FSL_ERRATUM_A006379
478	select SYS_FSL_ERRATUM_A006384
479	select SYS_FSL_ERRATUM_A006475
480	select SYS_FSL_ERRATUM_A006593
481	select SYS_FSL_ERRATUM_A007075
482	select SYS_FSL_ERRATUM_A007186
483	select SYS_FSL_ERRATUM_A007212
484	select SYS_FSL_ERRATUM_A007907
485	select SYS_FSL_ERRATUM_A009942
486	select SYS_FSL_HAS_DDR3
487	select SYS_FSL_HAS_SEC
488	select SYS_FSL_QORIQ_CHASSIS2
489	select SYS_FSL_SEC_BE
490	select SYS_FSL_SEC_COMPAT_4
491	select SYS_PPC64
492	select FSL_IFC
493	imply CMD_EEPROM
494	imply CMD_NAND
495	imply CMD_REGINFO
496
497config ARCH_BSC9131
498	bool
499	select FSL_LAW
500	select SYS_FSL_DDR_VER_44
501	select SYS_FSL_ERRATUM_A004477
502	select SYS_FSL_ERRATUM_A005125
503	select SYS_FSL_ERRATUM_ESDHC111
504	select SYS_FSL_HAS_DDR3
505	select SYS_FSL_HAS_SEC
506	select SYS_FSL_SEC_BE
507	select SYS_FSL_SEC_COMPAT_4
508	select FSL_IFC
509	imply CMD_EEPROM
510	imply CMD_NAND
511	imply CMD_REGINFO
512
513config ARCH_BSC9132
514	bool
515	select FSL_LAW
516	select SYS_FSL_DDR_VER_46
517	select SYS_FSL_ERRATUM_A004477
518	select SYS_FSL_ERRATUM_A005125
519	select SYS_FSL_ERRATUM_A005434
520	select SYS_FSL_ERRATUM_ESDHC111
521	select SYS_FSL_ERRATUM_I2C_A004447
522	select SYS_FSL_ERRATUM_IFC_A002769
523	select SYS_FSL_HAS_DDR3
524	select SYS_FSL_HAS_SEC
525	select SYS_FSL_SEC_BE
526	select SYS_FSL_SEC_COMPAT_4
527	select SYS_PPC_E500_USE_DEBUG_TLB
528	select FSL_IFC
529	imply CMD_EEPROM
530	imply CMD_MTDPARTS
531	imply CMD_NAND
532	imply CMD_PCI
533	imply CMD_REGINFO
534
535config ARCH_C29X
536	bool
537	select FSL_LAW
538	select SYS_FSL_DDR_VER_46
539	select SYS_FSL_ERRATUM_A005125
540	select SYS_FSL_ERRATUM_ESDHC111
541	select SYS_FSL_HAS_DDR3
542	select SYS_FSL_HAS_SEC
543	select SYS_FSL_SEC_BE
544	select SYS_FSL_SEC_COMPAT_6
545	select SYS_PPC_E500_USE_DEBUG_TLB
546	select FSL_IFC
547	imply CMD_NAND
548	imply CMD_PCI
549	imply CMD_REGINFO
550
551config ARCH_MPC8536
552	bool
553	select FSL_LAW
554	select SYS_FSL_ERRATUM_A004508
555	select SYS_FSL_ERRATUM_A005125
556	select SYS_FSL_HAS_DDR2
557	select SYS_FSL_HAS_DDR3
558	select SYS_FSL_HAS_SEC
559	select SYS_FSL_SEC_BE
560	select SYS_FSL_SEC_COMPAT_2
561	select SYS_PPC_E500_USE_DEBUG_TLB
562	select FSL_ELBC
563	imply CMD_NAND
564	imply CMD_SATA
565	imply CMD_REGINFO
566
567config ARCH_MPC8540
568	bool
569	select FSL_LAW
570	select SYS_FSL_HAS_DDR1
571
572config ARCH_MPC8541
573	bool
574	select FSL_LAW
575	select SYS_FSL_HAS_DDR1
576	select SYS_FSL_HAS_SEC
577	select SYS_FSL_SEC_BE
578	select SYS_FSL_SEC_COMPAT_2
579
580config ARCH_MPC8544
581	bool
582	select FSL_LAW
583	select SYS_FSL_ERRATUM_A005125
584	select SYS_FSL_HAS_DDR2
585	select SYS_FSL_HAS_SEC
586	select SYS_FSL_SEC_BE
587	select SYS_FSL_SEC_COMPAT_2
588	select SYS_PPC_E500_USE_DEBUG_TLB
589	select FSL_ELBC
590
591config ARCH_MPC8548
592	bool
593	select FSL_LAW
594	select SYS_FSL_ERRATUM_A005125
595	select SYS_FSL_ERRATUM_NMG_DDR120
596	select SYS_FSL_ERRATUM_NMG_LBC103
597	select SYS_FSL_ERRATUM_NMG_ETSEC129
598	select SYS_FSL_ERRATUM_I2C_A004447
599	select SYS_FSL_HAS_DDR2
600	select SYS_FSL_HAS_DDR1
601	select SYS_FSL_HAS_SEC
602	select SYS_FSL_SEC_BE
603	select SYS_FSL_SEC_COMPAT_2
604	select SYS_PPC_E500_USE_DEBUG_TLB
605	imply CMD_REGINFO
606
607config ARCH_MPC8555
608	bool
609	select FSL_LAW
610	select SYS_FSL_HAS_DDR1
611	select SYS_FSL_HAS_SEC
612	select SYS_FSL_SEC_BE
613	select SYS_FSL_SEC_COMPAT_2
614
615config ARCH_MPC8560
616	bool
617	select FSL_LAW
618	select SYS_FSL_HAS_DDR1
619
620config ARCH_MPC8568
621	bool
622	select FSL_LAW
623	select SYS_FSL_HAS_DDR2
624	select SYS_FSL_HAS_SEC
625	select SYS_FSL_SEC_BE
626	select SYS_FSL_SEC_COMPAT_2
627
628config ARCH_MPC8569
629	bool
630	select FSL_LAW
631	select SYS_FSL_ERRATUM_A004508
632	select SYS_FSL_ERRATUM_A005125
633	select SYS_FSL_HAS_DDR3
634	select SYS_FSL_HAS_SEC
635	select SYS_FSL_SEC_BE
636	select SYS_FSL_SEC_COMPAT_2
637	select FSL_ELBC
638	imply CMD_NAND
639
640config ARCH_MPC8572
641	bool
642	select FSL_LAW
643	select SYS_FSL_ERRATUM_A004508
644	select SYS_FSL_ERRATUM_A005125
645	select SYS_FSL_ERRATUM_DDR_115
646	select SYS_FSL_ERRATUM_DDR111_DDR134
647	select SYS_FSL_HAS_DDR2
648	select SYS_FSL_HAS_DDR3
649	select SYS_FSL_HAS_SEC
650	select SYS_FSL_SEC_BE
651	select SYS_FSL_SEC_COMPAT_2
652	select SYS_PPC_E500_USE_DEBUG_TLB
653	select FSL_ELBC
654	imply CMD_NAND
655
656config ARCH_P1010
657	bool
658	select FSL_LAW
659	select SYS_FSL_ERRATUM_A004477
660	select SYS_FSL_ERRATUM_A004508
661	select SYS_FSL_ERRATUM_A005125
662	select SYS_FSL_ERRATUM_A006261
663	select SYS_FSL_ERRATUM_A007075
664	select SYS_FSL_ERRATUM_ESDHC111
665	select SYS_FSL_ERRATUM_I2C_A004447
666	select SYS_FSL_ERRATUM_IFC_A002769
667	select SYS_FSL_ERRATUM_P1010_A003549
668	select SYS_FSL_ERRATUM_SEC_A003571
669	select SYS_FSL_ERRATUM_IFC_A003399
670	select SYS_FSL_HAS_DDR3
671	select SYS_FSL_HAS_SEC
672	select SYS_FSL_SEC_BE
673	select SYS_FSL_SEC_COMPAT_4
674	select SYS_PPC_E500_USE_DEBUG_TLB
675	select FSL_IFC
676	imply CMD_EEPROM
677	imply CMD_MTDPARTS
678	imply CMD_NAND
679	imply CMD_SATA
680	imply CMD_PCI
681	imply CMD_REGINFO
682	imply FSL_SATA
683
684config ARCH_P1011
685	bool
686	select FSL_LAW
687	select SYS_FSL_ERRATUM_A004508
688	select SYS_FSL_ERRATUM_A005125
689	select SYS_FSL_ERRATUM_ELBC_A001
690	select SYS_FSL_ERRATUM_ESDHC111
691	select SYS_FSL_HAS_DDR3
692	select SYS_FSL_HAS_SEC
693	select SYS_FSL_SEC_BE
694	select SYS_FSL_SEC_COMPAT_2
695	select SYS_PPC_E500_USE_DEBUG_TLB
696	select FSL_ELBC
697
698config ARCH_P1020
699	bool
700	select FSL_LAW
701	select SYS_FSL_ERRATUM_A004508
702	select SYS_FSL_ERRATUM_A005125
703	select SYS_FSL_ERRATUM_ELBC_A001
704	select SYS_FSL_ERRATUM_ESDHC111
705	select SYS_FSL_HAS_DDR3
706	select SYS_FSL_HAS_SEC
707	select SYS_FSL_SEC_BE
708	select SYS_FSL_SEC_COMPAT_2
709	select SYS_PPC_E500_USE_DEBUG_TLB
710	select FSL_ELBC
711	imply CMD_NAND
712	imply CMD_SATA
713	imply CMD_PCI
714	imply CMD_REGINFO
715	imply SATA_SIL
716
717config ARCH_P1021
718	bool
719	select FSL_LAW
720	select SYS_FSL_ERRATUM_A004508
721	select SYS_FSL_ERRATUM_A005125
722	select SYS_FSL_ERRATUM_ELBC_A001
723	select SYS_FSL_ERRATUM_ESDHC111
724	select SYS_FSL_HAS_DDR3
725	select SYS_FSL_HAS_SEC
726	select SYS_FSL_SEC_BE
727	select SYS_FSL_SEC_COMPAT_2
728	select SYS_PPC_E500_USE_DEBUG_TLB
729	select FSL_ELBC
730	imply CMD_REGINFO
731	imply CMD_NAND
732	imply CMD_SATA
733	imply CMD_REGINFO
734	imply SATA_SIL
735
736config ARCH_P1022
737	bool
738	select FSL_LAW
739	select SYS_FSL_ERRATUM_A004477
740	select SYS_FSL_ERRATUM_A004508
741	select SYS_FSL_ERRATUM_A005125
742	select SYS_FSL_ERRATUM_ELBC_A001
743	select SYS_FSL_ERRATUM_ESDHC111
744	select SYS_FSL_ERRATUM_SATA_A001
745	select SYS_FSL_HAS_DDR3
746	select SYS_FSL_HAS_SEC
747	select SYS_FSL_SEC_BE
748	select SYS_FSL_SEC_COMPAT_2
749	select SYS_PPC_E500_USE_DEBUG_TLB
750	select FSL_ELBC
751
752config ARCH_P1023
753	bool
754	select FSL_LAW
755	select SYS_FSL_ERRATUM_A004508
756	select SYS_FSL_ERRATUM_A005125
757	select SYS_FSL_ERRATUM_I2C_A004447
758	select SYS_FSL_HAS_DDR3
759	select SYS_FSL_HAS_SEC
760	select SYS_FSL_SEC_BE
761	select SYS_FSL_SEC_COMPAT_4
762	select FSL_ELBC
763
764config ARCH_P1024
765	bool
766	select FSL_LAW
767	select SYS_FSL_ERRATUM_A004508
768	select SYS_FSL_ERRATUM_A005125
769	select SYS_FSL_ERRATUM_ELBC_A001
770	select SYS_FSL_ERRATUM_ESDHC111
771	select SYS_FSL_HAS_DDR3
772	select SYS_FSL_HAS_SEC
773	select SYS_FSL_SEC_BE
774	select SYS_FSL_SEC_COMPAT_2
775	select SYS_PPC_E500_USE_DEBUG_TLB
776	select FSL_ELBC
777	imply CMD_EEPROM
778	imply CMD_NAND
779	imply CMD_SATA
780	imply CMD_PCI
781	imply CMD_REGINFO
782	imply SATA_SIL
783
784config ARCH_P1025
785	bool
786	select FSL_LAW
787	select SYS_FSL_ERRATUM_A004508
788	select SYS_FSL_ERRATUM_A005125
789	select SYS_FSL_ERRATUM_ELBC_A001
790	select SYS_FSL_ERRATUM_ESDHC111
791	select SYS_FSL_HAS_DDR3
792	select SYS_FSL_HAS_SEC
793	select SYS_FSL_SEC_BE
794	select SYS_FSL_SEC_COMPAT_2
795	select SYS_PPC_E500_USE_DEBUG_TLB
796	select FSL_ELBC
797	imply CMD_SATA
798	imply CMD_REGINFO
799
800config ARCH_P2020
801	bool
802	select FSL_LAW
803	select SYS_FSL_ERRATUM_A004477
804	select SYS_FSL_ERRATUM_A004508
805	select SYS_FSL_ERRATUM_A005125
806	select SYS_FSL_ERRATUM_ESDHC111
807	select SYS_FSL_ERRATUM_ESDHC_A001
808	select SYS_FSL_HAS_DDR3
809	select SYS_FSL_HAS_SEC
810	select SYS_FSL_SEC_BE
811	select SYS_FSL_SEC_COMPAT_2
812	select SYS_PPC_E500_USE_DEBUG_TLB
813	select FSL_ELBC
814	imply CMD_EEPROM
815	imply CMD_NAND
816	imply CMD_REGINFO
817
818config ARCH_P2041
819	bool
820	select E500MC
821	select FSL_LAW
822	select SYS_FSL_ERRATUM_A004510
823	select SYS_FSL_ERRATUM_A004849
824	select SYS_FSL_ERRATUM_A006261
825	select SYS_FSL_ERRATUM_CPU_A003999
826	select SYS_FSL_ERRATUM_DDR_A003
827	select SYS_FSL_ERRATUM_DDR_A003474
828	select SYS_FSL_ERRATUM_ESDHC111
829	select SYS_FSL_ERRATUM_I2C_A004447
830	select SYS_FSL_ERRATUM_NMG_CPU_A011
831	select SYS_FSL_ERRATUM_SRIO_A004034
832	select SYS_FSL_ERRATUM_USB14
833	select SYS_FSL_HAS_DDR3
834	select SYS_FSL_HAS_SEC
835	select SYS_FSL_QORIQ_CHASSIS1
836	select SYS_FSL_SEC_BE
837	select SYS_FSL_SEC_COMPAT_4
838	select FSL_ELBC
839	imply CMD_NAND
840
841config ARCH_P3041
842	bool
843	select E500MC
844	select FSL_LAW
845	select SYS_FSL_DDR_VER_44
846	select SYS_FSL_ERRATUM_A004510
847	select SYS_FSL_ERRATUM_A004849
848	select SYS_FSL_ERRATUM_A005812
849	select SYS_FSL_ERRATUM_A006261
850	select SYS_FSL_ERRATUM_CPU_A003999
851	select SYS_FSL_ERRATUM_DDR_A003
852	select SYS_FSL_ERRATUM_DDR_A003474
853	select SYS_FSL_ERRATUM_ESDHC111
854	select SYS_FSL_ERRATUM_I2C_A004447
855	select SYS_FSL_ERRATUM_NMG_CPU_A011
856	select SYS_FSL_ERRATUM_SRIO_A004034
857	select SYS_FSL_ERRATUM_USB14
858	select SYS_FSL_HAS_DDR3
859	select SYS_FSL_HAS_SEC
860	select SYS_FSL_QORIQ_CHASSIS1
861	select SYS_FSL_SEC_BE
862	select SYS_FSL_SEC_COMPAT_4
863	select FSL_ELBC
864	imply CMD_NAND
865	imply CMD_SATA
866	imply CMD_REGINFO
867	imply FSL_SATA
868
869config ARCH_P4080
870	bool
871	select E500MC
872	select FSL_LAW
873	select SYS_FSL_DDR_VER_44
874	select SYS_FSL_ERRATUM_A004510
875	select SYS_FSL_ERRATUM_A004580
876	select SYS_FSL_ERRATUM_A004849
877	select SYS_FSL_ERRATUM_A005812
878	select SYS_FSL_ERRATUM_A007075
879	select SYS_FSL_ERRATUM_CPC_A002
880	select SYS_FSL_ERRATUM_CPC_A003
881	select SYS_FSL_ERRATUM_CPU_A003999
882	select SYS_FSL_ERRATUM_DDR_A003
883	select SYS_FSL_ERRATUM_DDR_A003474
884	select SYS_FSL_ERRATUM_ELBC_A001
885	select SYS_FSL_ERRATUM_ESDHC111
886	select SYS_FSL_ERRATUM_ESDHC13
887	select SYS_FSL_ERRATUM_ESDHC135
888	select SYS_FSL_ERRATUM_I2C_A004447
889	select SYS_FSL_ERRATUM_NMG_CPU_A011
890	select SYS_FSL_ERRATUM_SRIO_A004034
891	select SYS_P4080_ERRATUM_CPU22
892	select SYS_P4080_ERRATUM_PCIE_A003
893	select SYS_P4080_ERRATUM_SERDES8
894	select SYS_P4080_ERRATUM_SERDES9
895	select SYS_P4080_ERRATUM_SERDES_A001
896	select SYS_P4080_ERRATUM_SERDES_A005
897	select SYS_FSL_HAS_DDR3
898	select SYS_FSL_HAS_SEC
899	select SYS_FSL_QORIQ_CHASSIS1
900	select SYS_FSL_SEC_BE
901	select SYS_FSL_SEC_COMPAT_4
902	select FSL_ELBC
903	imply CMD_SATA
904	imply CMD_REGINFO
905	imply SATA_SIL
906
907config ARCH_P5020
908	bool
909	select E500MC
910	select FSL_LAW
911	select SYS_FSL_DDR_VER_44
912	select SYS_FSL_ERRATUM_A004510
913	select SYS_FSL_ERRATUM_A006261
914	select SYS_FSL_ERRATUM_DDR_A003
915	select SYS_FSL_ERRATUM_DDR_A003474
916	select SYS_FSL_ERRATUM_ESDHC111
917	select SYS_FSL_ERRATUM_I2C_A004447
918	select SYS_FSL_ERRATUM_SRIO_A004034
919	select SYS_FSL_ERRATUM_USB14
920	select SYS_FSL_HAS_DDR3
921	select SYS_FSL_HAS_SEC
922	select SYS_FSL_QORIQ_CHASSIS1
923	select SYS_FSL_SEC_BE
924	select SYS_FSL_SEC_COMPAT_4
925	select SYS_PPC64
926	select FSL_ELBC
927	imply CMD_SATA
928	imply CMD_REGINFO
929	imply FSL_SATA
930
931config ARCH_P5040
932	bool
933	select E500MC
934	select FSL_LAW
935	select SYS_FSL_DDR_VER_44
936	select SYS_FSL_ERRATUM_A004510
937	select SYS_FSL_ERRATUM_A004699
938	select SYS_FSL_ERRATUM_A005812
939	select SYS_FSL_ERRATUM_A006261
940	select SYS_FSL_ERRATUM_DDR_A003
941	select SYS_FSL_ERRATUM_DDR_A003474
942	select SYS_FSL_ERRATUM_ESDHC111
943	select SYS_FSL_ERRATUM_USB14
944	select SYS_FSL_HAS_DDR3
945	select SYS_FSL_HAS_SEC
946	select SYS_FSL_QORIQ_CHASSIS1
947	select SYS_FSL_SEC_BE
948	select SYS_FSL_SEC_COMPAT_4
949	select SYS_PPC64
950	select FSL_ELBC
951	imply CMD_SATA
952	imply CMD_REGINFO
953	imply FSL_SATA
954
955config ARCH_QEMU_E500
956	bool
957
958config ARCH_T1023
959	bool
960	select E500MC
961	select FSL_LAW
962	select SYS_FSL_DDR_VER_50
963	select SYS_FSL_ERRATUM_A008378
964	select SYS_FSL_ERRATUM_A009663
965	select SYS_FSL_ERRATUM_A009942
966	select SYS_FSL_ERRATUM_ESDHC111
967	select SYS_FSL_HAS_DDR3
968	select SYS_FSL_HAS_DDR4
969	select SYS_FSL_HAS_SEC
970	select SYS_FSL_QORIQ_CHASSIS2
971	select SYS_FSL_SEC_BE
972	select SYS_FSL_SEC_COMPAT_5
973	select FSL_IFC
974	imply CMD_EEPROM
975	imply CMD_NAND
976	imply CMD_REGINFO
977
978config ARCH_T1024
979	bool
980	select E500MC
981	select FSL_LAW
982	select SYS_FSL_DDR_VER_50
983	select SYS_FSL_ERRATUM_A008378
984	select SYS_FSL_ERRATUM_A009663
985	select SYS_FSL_ERRATUM_A009942
986	select SYS_FSL_ERRATUM_ESDHC111
987	select SYS_FSL_HAS_DDR3
988	select SYS_FSL_HAS_DDR4
989	select SYS_FSL_HAS_SEC
990	select SYS_FSL_QORIQ_CHASSIS2
991	select SYS_FSL_SEC_BE
992	select SYS_FSL_SEC_COMPAT_5
993	select FSL_IFC
994	imply CMD_EEPROM
995	imply CMD_NAND
996	imply CMD_MTDPARTS
997	imply CMD_REGINFO
998
999config ARCH_T1040
1000	bool
1001	select E500MC
1002	select FSL_LAW
1003	select SYS_FSL_DDR_VER_50
1004	select SYS_FSL_ERRATUM_A008044
1005	select SYS_FSL_ERRATUM_A008378
1006	select SYS_FSL_ERRATUM_A009663
1007	select SYS_FSL_ERRATUM_A009942
1008	select SYS_FSL_ERRATUM_ESDHC111
1009	select SYS_FSL_HAS_DDR3
1010	select SYS_FSL_HAS_DDR4
1011	select SYS_FSL_HAS_SEC
1012	select SYS_FSL_QORIQ_CHASSIS2
1013	select SYS_FSL_SEC_BE
1014	select SYS_FSL_SEC_COMPAT_5
1015	select FSL_IFC
1016	imply CMD_MTDPARTS
1017	imply CMD_NAND
1018	imply CMD_SATA
1019	imply CMD_REGINFO
1020	imply FSL_SATA
1021
1022config ARCH_T1042
1023	bool
1024	select E500MC
1025	select FSL_LAW
1026	select SYS_FSL_DDR_VER_50
1027	select SYS_FSL_ERRATUM_A008044
1028	select SYS_FSL_ERRATUM_A008378
1029	select SYS_FSL_ERRATUM_A009663
1030	select SYS_FSL_ERRATUM_A009942
1031	select SYS_FSL_ERRATUM_ESDHC111
1032	select SYS_FSL_HAS_DDR3
1033	select SYS_FSL_HAS_DDR4
1034	select SYS_FSL_HAS_SEC
1035	select SYS_FSL_QORIQ_CHASSIS2
1036	select SYS_FSL_SEC_BE
1037	select SYS_FSL_SEC_COMPAT_5
1038	select FSL_IFC
1039	imply CMD_MTDPARTS
1040	imply CMD_NAND
1041	imply CMD_SATA
1042	imply CMD_REGINFO
1043	imply FSL_SATA
1044
1045config ARCH_T2080
1046	bool
1047	select E500MC
1048	select E6500
1049	select FSL_LAW
1050	select SYS_FSL_DDR_VER_47
1051	select SYS_FSL_ERRATUM_A006379
1052	select SYS_FSL_ERRATUM_A006593
1053	select SYS_FSL_ERRATUM_A007186
1054	select SYS_FSL_ERRATUM_A007212
1055	select SYS_FSL_ERRATUM_A007815
1056	select SYS_FSL_ERRATUM_A007907
1057	select SYS_FSL_ERRATUM_A009942
1058	select SYS_FSL_ERRATUM_ESDHC111
1059	select SYS_FSL_HAS_DDR3
1060	select SYS_FSL_HAS_SEC
1061	select SYS_FSL_QORIQ_CHASSIS2
1062	select SYS_FSL_SEC_BE
1063	select SYS_FSL_SEC_COMPAT_4
1064	select SYS_PPC64
1065	select FSL_IFC
1066	imply CMD_SATA
1067	imply CMD_NAND
1068	imply CMD_REGINFO
1069	imply FSL_SATA
1070
1071config ARCH_T2081
1072	bool
1073	select E500MC
1074	select E6500
1075	select FSL_LAW
1076	select SYS_FSL_DDR_VER_47
1077	select SYS_FSL_ERRATUM_A006379
1078	select SYS_FSL_ERRATUM_A006593
1079	select SYS_FSL_ERRATUM_A007186
1080	select SYS_FSL_ERRATUM_A007212
1081	select SYS_FSL_ERRATUM_A009942
1082	select SYS_FSL_ERRATUM_ESDHC111
1083	select SYS_FSL_HAS_DDR3
1084	select SYS_FSL_HAS_SEC
1085	select SYS_FSL_QORIQ_CHASSIS2
1086	select SYS_FSL_SEC_BE
1087	select SYS_FSL_SEC_COMPAT_4
1088	select SYS_PPC64
1089	select FSL_IFC
1090	imply CMD_NAND
1091	imply CMD_REGINFO
1092
1093config ARCH_T4160
1094	bool
1095	select E500MC
1096	select E6500
1097	select FSL_LAW
1098	select SYS_FSL_DDR_VER_47
1099	select SYS_FSL_ERRATUM_A004468
1100	select SYS_FSL_ERRATUM_A005871
1101	select SYS_FSL_ERRATUM_A006379
1102	select SYS_FSL_ERRATUM_A006593
1103	select SYS_FSL_ERRATUM_A007186
1104	select SYS_FSL_ERRATUM_A007798
1105	select SYS_FSL_ERRATUM_A009942
1106	select SYS_FSL_HAS_DDR3
1107	select SYS_FSL_HAS_SEC
1108	select SYS_FSL_QORIQ_CHASSIS2
1109	select SYS_FSL_SEC_BE
1110	select SYS_FSL_SEC_COMPAT_4
1111	select SYS_PPC64
1112	select FSL_IFC
1113	imply CMD_SATA
1114	imply CMD_NAND
1115	imply CMD_REGINFO
1116	imply FSL_SATA
1117
1118config ARCH_T4240
1119	bool
1120	select E500MC
1121	select E6500
1122	select FSL_LAW
1123	select SYS_FSL_DDR_VER_47
1124	select SYS_FSL_ERRATUM_A004468
1125	select SYS_FSL_ERRATUM_A005871
1126	select SYS_FSL_ERRATUM_A006261
1127	select SYS_FSL_ERRATUM_A006379
1128	select SYS_FSL_ERRATUM_A006593
1129	select SYS_FSL_ERRATUM_A007186
1130	select SYS_FSL_ERRATUM_A007798
1131	select SYS_FSL_ERRATUM_A007815
1132	select SYS_FSL_ERRATUM_A007907
1133	select SYS_FSL_ERRATUM_A009942
1134	select SYS_FSL_HAS_DDR3
1135	select SYS_FSL_HAS_SEC
1136	select SYS_FSL_QORIQ_CHASSIS2
1137	select SYS_FSL_SEC_BE
1138	select SYS_FSL_SEC_COMPAT_4
1139	select SYS_PPC64
1140	select FSL_IFC
1141	imply CMD_SATA
1142	imply CMD_NAND
1143	imply CMD_REGINFO
1144	imply FSL_SATA
1145
1146config BOOKE
1147	bool
1148	default y
1149
1150config E500
1151	bool
1152	default y
1153	help
1154		Enable PowerPC E500 cores, including e500v1, e500v2, e500mc
1155
1156config E500MC
1157	bool
1158	imply CMD_PCI
1159	help
1160		Enble PowerPC E500MC core
1161
1162config E6500
1163	bool
1164	help
1165		Enable PowerPC E6500 core
1166
1167config FSL_LAW
1168	bool
1169	help
1170		Use Freescale common code for Local Access Window
1171
1172config SECURE_BOOT
1173	bool	"Secure Boot"
1174	help
1175		Enable Freescale Secure Boot feature. Normally selected
1176		by defconfig. If unsure, do not change.
1177
1178config MAX_CPUS
1179	int "Maximum number of CPUs permitted for MPC85xx"
1180	default 12 if ARCH_T4240
1181	default 8 if ARCH_P4080 || \
1182		     ARCH_T4160
1183	default 4 if ARCH_B4860 || \
1184		     ARCH_P2041 || \
1185		     ARCH_P3041 || \
1186		     ARCH_P5040 || \
1187		     ARCH_T1040 || \
1188		     ARCH_T1042 || \
1189		     ARCH_T2080 || \
1190		     ARCH_T2081
1191	default 2 if ARCH_B4420 || \
1192		     ARCH_BSC9132 || \
1193		     ARCH_MPC8572 || \
1194		     ARCH_P1020 || \
1195		     ARCH_P1021 || \
1196		     ARCH_P1022 || \
1197		     ARCH_P1023 || \
1198		     ARCH_P1024 || \
1199		     ARCH_P1025 || \
1200		     ARCH_P2020 || \
1201		     ARCH_P5020 || \
1202		     ARCH_T1023 || \
1203		     ARCH_T1024
1204	default 1
1205	help
1206	  Set this number to the maximum number of possible CPUs in the SoC.
1207	  SoCs may have multiple clusters with each cluster may have multiple
1208	  ports. If some ports are reserved but higher ports are used for
1209	  cores, count the reserved ports. This will allocate enough memory
1210	  in spin table to properly handle all cores.
1211
1212config SYS_CCSRBAR_DEFAULT
1213	hex "Default CCSRBAR address"
1214	default	0xff700000 if	ARCH_BSC9131	|| \
1215				ARCH_BSC9132	|| \
1216				ARCH_C29X	|| \
1217				ARCH_MPC8536	|| \
1218				ARCH_MPC8540	|| \
1219				ARCH_MPC8541	|| \
1220				ARCH_MPC8544	|| \
1221				ARCH_MPC8548	|| \
1222				ARCH_MPC8555	|| \
1223				ARCH_MPC8560	|| \
1224				ARCH_MPC8568	|| \
1225				ARCH_MPC8569	|| \
1226				ARCH_MPC8572	|| \
1227				ARCH_P1010	|| \
1228				ARCH_P1011	|| \
1229				ARCH_P1020	|| \
1230				ARCH_P1021	|| \
1231				ARCH_P1022	|| \
1232				ARCH_P1024	|| \
1233				ARCH_P1025	|| \
1234				ARCH_P2020
1235	default 0xff600000 if	ARCH_P1023
1236	default 0xfe000000 if	ARCH_B4420	|| \
1237				ARCH_B4860	|| \
1238				ARCH_P2041	|| \
1239				ARCH_P3041	|| \
1240				ARCH_P4080	|| \
1241				ARCH_P5020	|| \
1242				ARCH_P5040	|| \
1243				ARCH_T1023	|| \
1244				ARCH_T1024	|| \
1245				ARCH_T1040	|| \
1246				ARCH_T1042	|| \
1247				ARCH_T2080	|| \
1248				ARCH_T2081	|| \
1249				ARCH_T4160	|| \
1250				ARCH_T4240
1251	default 0xe0000000 if ARCH_QEMU_E500
1252	help
1253		Default value of CCSRBAR comes from power-on-reset. It
1254		is fixed on each SoC. Some SoCs can have different value
1255		if changed by pre-boot regime. The value here must match
1256		the current value in SoC. If not sure, do not change.
1257
1258config SYS_FSL_ERRATUM_A004468
1259	bool
1260
1261config SYS_FSL_ERRATUM_A004477
1262	bool
1263
1264config SYS_FSL_ERRATUM_A004508
1265	bool
1266
1267config SYS_FSL_ERRATUM_A004580
1268	bool
1269
1270config SYS_FSL_ERRATUM_A004699
1271	bool
1272
1273config SYS_FSL_ERRATUM_A004849
1274	bool
1275
1276config SYS_FSL_ERRATUM_A004510
1277	bool
1278
1279config SYS_FSL_ERRATUM_A004510_SVR_REV
1280	hex
1281	depends on SYS_FSL_ERRATUM_A004510
1282	default 0x20 if ARCH_P4080
1283	default 0x10
1284
1285config SYS_FSL_ERRATUM_A004510_SVR_REV2
1286	hex
1287	depends on (SYS_FSL_ERRATUM_A004510 && (ARCH_P2041 || ARCH_P3041))
1288	default 0x11
1289
1290config SYS_FSL_ERRATUM_A005125
1291	bool
1292
1293config SYS_FSL_ERRATUM_A005434
1294	bool
1295
1296config SYS_FSL_ERRATUM_A005812
1297	bool
1298
1299config SYS_FSL_ERRATUM_A005871
1300	bool
1301
1302config SYS_FSL_ERRATUM_A006261
1303	bool
1304
1305config SYS_FSL_ERRATUM_A006379
1306	bool
1307
1308config SYS_FSL_ERRATUM_A006384
1309	bool
1310
1311config SYS_FSL_ERRATUM_A006475
1312	bool
1313
1314config SYS_FSL_ERRATUM_A006593
1315	bool
1316
1317config SYS_FSL_ERRATUM_A007075
1318	bool
1319
1320config SYS_FSL_ERRATUM_A007186
1321	bool
1322
1323config SYS_FSL_ERRATUM_A007212
1324	bool
1325
1326config SYS_FSL_ERRATUM_A007815
1327	bool
1328
1329config SYS_FSL_ERRATUM_A007798
1330	bool
1331
1332config SYS_FSL_ERRATUM_A007907
1333	bool
1334
1335config SYS_FSL_ERRATUM_A008044
1336	bool
1337
1338config SYS_FSL_ERRATUM_CPC_A002
1339	bool
1340
1341config SYS_FSL_ERRATUM_CPC_A003
1342	bool
1343
1344config SYS_FSL_ERRATUM_CPU_A003999
1345	bool
1346
1347config SYS_FSL_ERRATUM_ELBC_A001
1348	bool
1349
1350config SYS_FSL_ERRATUM_I2C_A004447
1351	bool
1352
1353config SYS_FSL_A004447_SVR_REV
1354	hex
1355	depends on SYS_FSL_ERRATUM_I2C_A004447
1356	default 0x00 if ARCH_MPC8548
1357	default 0x10 if ARCH_P1010
1358	default 0x11 if ARCH_P1023 || ARCH_P2041 || ARCH_BSC9132
1359	default 0x20 if ARCH_P3041 || ARCH_P4080 || ARCH_P5020
1360
1361config SYS_FSL_ERRATUM_IFC_A002769
1362	bool
1363
1364config SYS_FSL_ERRATUM_IFC_A003399
1365	bool
1366
1367config SYS_FSL_ERRATUM_NMG_CPU_A011
1368	bool
1369
1370config SYS_FSL_ERRATUM_NMG_ETSEC129
1371	bool
1372
1373config SYS_FSL_ERRATUM_NMG_LBC103
1374	bool
1375
1376config SYS_FSL_ERRATUM_P1010_A003549
1377	bool
1378
1379config SYS_FSL_ERRATUM_SATA_A001
1380	bool
1381
1382config SYS_FSL_ERRATUM_SEC_A003571
1383	bool
1384
1385config SYS_FSL_ERRATUM_SRIO_A004034
1386	bool
1387
1388config SYS_FSL_ERRATUM_USB14
1389	bool
1390
1391config SYS_P4080_ERRATUM_CPU22
1392	bool
1393
1394config SYS_P4080_ERRATUM_PCIE_A003
1395	bool
1396
1397config SYS_P4080_ERRATUM_SERDES8
1398	bool
1399
1400config SYS_P4080_ERRATUM_SERDES9
1401	bool
1402
1403config SYS_P4080_ERRATUM_SERDES_A001
1404	bool
1405
1406config SYS_P4080_ERRATUM_SERDES_A005
1407	bool
1408
1409config SYS_FSL_QORIQ_CHASSIS1
1410	bool
1411
1412config SYS_FSL_QORIQ_CHASSIS2
1413	bool
1414
1415config SYS_FSL_NUM_LAWS
1416	int "Number of local access windows"
1417	depends on FSL_LAW
1418	default 32 if	ARCH_B4420	|| \
1419			ARCH_B4860	|| \
1420			ARCH_P2041	|| \
1421			ARCH_P3041	|| \
1422			ARCH_P4080	|| \
1423			ARCH_P5020	|| \
1424			ARCH_P5040	|| \
1425			ARCH_T2080	|| \
1426			ARCH_T2081	|| \
1427			ARCH_T4160	|| \
1428			ARCH_T4240
1429	default 16 if	ARCH_T1023	|| \
1430			ARCH_T1024	|| \
1431			ARCH_T1040	|| \
1432			ARCH_T1042
1433	default 12 if	ARCH_BSC9131	|| \
1434			ARCH_BSC9132	|| \
1435			ARCH_C29X	|| \
1436			ARCH_MPC8536	|| \
1437			ARCH_MPC8572	|| \
1438			ARCH_P1010	|| \
1439			ARCH_P1011	|| \
1440			ARCH_P1020	|| \
1441			ARCH_P1021	|| \
1442			ARCH_P1022	|| \
1443			ARCH_P1023	|| \
1444			ARCH_P1024	|| \
1445			ARCH_P1025	|| \
1446			ARCH_P2020
1447	default 10 if	ARCH_MPC8544	|| \
1448			ARCH_MPC8548	|| \
1449			ARCH_MPC8568	|| \
1450			ARCH_MPC8569
1451	default 8 if	ARCH_MPC8540	|| \
1452			ARCH_MPC8541	|| \
1453			ARCH_MPC8555	|| \
1454			ARCH_MPC8560
1455	help
1456		Number of local access windows. This is fixed per SoC.
1457		If not sure, do not change.
1458
1459config SYS_FSL_THREADS_PER_CORE
1460	int
1461	default 2 if E6500
1462	default 1
1463
1464config SYS_NUM_TLBCAMS
1465	int "Number of TLB CAM entries"
1466	default 64 if E500MC
1467	default 16
1468	help
1469		Number of TLB CAM entries for Book-E chips. 64 for E500MC,
1470		16 for other E500 SoCs.
1471
1472config SYS_PPC64
1473	bool
1474
1475config SYS_PPC_E500_USE_DEBUG_TLB
1476	bool
1477
1478config FSL_IFC
1479	bool
1480
1481config FSL_ELBC
1482	bool
1483
1484config SYS_PPC_E500_DEBUG_TLB
1485	int "Temporary TLB entry for external debugger"
1486	depends on SYS_PPC_E500_USE_DEBUG_TLB
1487	default 0 if	ARCH_MPC8544 || ARCH_MPC8548
1488	default 1 if	ARCH_MPC8536
1489	default 2 if	ARCH_MPC8572	|| \
1490			ARCH_P1011	|| \
1491			ARCH_P1020	|| \
1492			ARCH_P1021	|| \
1493			ARCH_P1022	|| \
1494			ARCH_P1024	|| \
1495			ARCH_P1025	|| \
1496			ARCH_P2020
1497	default 3 if	ARCH_P1010	|| \
1498			ARCH_BSC9132	|| \
1499			ARCH_C29X
1500	help
1501		Select a temporary TLB entry to be used during boot to work
1502                around limitations in e500v1 and e500v2 external debugger
1503                support. This reduces the portions of the boot code where
1504                breakpoints and single stepping do not work. The value of this
1505                symbol should be set to the TLB1 entry to be used for this
1506                purpose. If unsure, do not change.
1507
1508config SYS_FSL_IFC_CLK_DIV
1509	int "Divider of platform clock"
1510	depends on FSL_IFC
1511	default 2 if	ARCH_B4420	|| \
1512			ARCH_B4860	|| \
1513			ARCH_T1024	|| \
1514			ARCH_T1023	|| \
1515			ARCH_T1040	|| \
1516			ARCH_T1042	|| \
1517			ARCH_T4160	|| \
1518			ARCH_T4240
1519	default 1
1520	help
1521		Defines divider of platform clock(clock input to
1522		IFC controller).
1523
1524config SYS_FSL_LBC_CLK_DIV
1525	int "Divider of platform clock"
1526	depends on FSL_ELBC || ARCH_MPC8540 || \
1527		ARCH_MPC8548 || ARCH_MPC8541 || \
1528		ARCH_MPC8555 || ARCH_MPC8560 || \
1529		ARCH_MPC8568
1530
1531	default 2 if	ARCH_P2041	|| \
1532			ARCH_P3041	|| \
1533			ARCH_P4080	|| \
1534			ARCH_P5020	|| \
1535			ARCH_P5040
1536	default 1
1537
1538	help
1539		Defines divider of platform clock(clock input to
1540		eLBC controller).
1541
1542source "board/freescale/b4860qds/Kconfig"
1543source "board/freescale/bsc9131rdb/Kconfig"
1544source "board/freescale/bsc9132qds/Kconfig"
1545source "board/freescale/c29xpcie/Kconfig"
1546source "board/freescale/corenet_ds/Kconfig"
1547source "board/freescale/mpc8536ds/Kconfig"
1548source "board/freescale/mpc8541cds/Kconfig"
1549source "board/freescale/mpc8544ds/Kconfig"
1550source "board/freescale/mpc8548cds/Kconfig"
1551source "board/freescale/mpc8555cds/Kconfig"
1552source "board/freescale/mpc8568mds/Kconfig"
1553source "board/freescale/mpc8569mds/Kconfig"
1554source "board/freescale/mpc8572ds/Kconfig"
1555source "board/freescale/p1010rdb/Kconfig"
1556source "board/freescale/p1022ds/Kconfig"
1557source "board/freescale/p1023rdb/Kconfig"
1558source "board/freescale/p1_p2_rdb_pc/Kconfig"
1559source "board/freescale/p1_twr/Kconfig"
1560source "board/freescale/p2041rdb/Kconfig"
1561source "board/freescale/qemu-ppce500/Kconfig"
1562source "board/freescale/t102xqds/Kconfig"
1563source "board/freescale/t102xrdb/Kconfig"
1564source "board/freescale/t1040qds/Kconfig"
1565source "board/freescale/t104xrdb/Kconfig"
1566source "board/freescale/t208xqds/Kconfig"
1567source "board/freescale/t208xrdb/Kconfig"
1568source "board/freescale/t4qds/Kconfig"
1569source "board/freescale/t4rdb/Kconfig"
1570source "board/gdsys/p1022/Kconfig"
1571source "board/keymile/kmp204x/Kconfig"
1572source "board/sbc8548/Kconfig"
1573source "board/socrates/Kconfig"
1574source "board/varisys/cyrus/Kconfig"
1575source "board/xes/xpedite520x/Kconfig"
1576source "board/xes/xpedite537x/Kconfig"
1577source "board/xes/xpedite550x/Kconfig"
1578source "board/Arcturus/ucp1020/Kconfig"
1579
1580endmenu
1581