• Home
  • Line#
  • Scopes#
  • Navigate#
  • Raw
  • Download
1 /* SPDX-License-Identifier: GPL-2.0+ */
2 /*
3  * Copyright (c) 2011 The Chromium OS Authors.
4  */
5 
6 #ifndef __CONFIG_H
7 #define __CONFIG_H
8 
9 #ifdef FTRACE
10 #define CONFIG_TRACE
11 #define CONFIG_TRACE_BUFFER_SIZE	(16 << 20)
12 #define CONFIG_TRACE_EARLY_SIZE		(8 << 20)
13 #define CONFIG_TRACE_EARLY
14 #define CONFIG_TRACE_EARLY_ADDR		0x00100000
15 
16 #endif
17 
18 #ifndef CONFIG_SPL_BUILD
19 #define CONFIG_IO_TRACE
20 #endif
21 
22 #ifndef CONFIG_TIMER
23 #define CONFIG_SYS_TIMER_RATE		1000000
24 #endif
25 
26 #define CONFIG_LMB
27 
28 #define CONFIG_HOST_MAX_DEVICES 4
29 
30 /*
31  * Size of malloc() pool, before and after relocation
32  */
33 #define CONFIG_MALLOC_F_ADDR		0x0010000
34 #define CONFIG_SYS_MALLOC_LEN		(32 << 20)	/* 32MB  */
35 
36 #define CONFIG_SYS_CBSIZE		1024	/* Console I/O Buffer Size */
37 
38 /* turn on command-line edit/c/auto */
39 
40 #define CONFIG_ENV_SIZE		8192
41 
42 /* SPI - enable all SPI flash types for testing purposes */
43 
44 #define CONFIG_I2C_EDID
45 
46 /* Memory things - we don't really want a memory test */
47 #define CONFIG_SYS_LOAD_ADDR		0x00000000
48 #define CONFIG_SYS_MEMTEST_START	0x00100000
49 #define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_MEMTEST_START + 0x1000)
50 #define CONFIG_SYS_FDT_LOAD_ADDR	        0x100
51 
52 #define CONFIG_PHYSMEM
53 
54 /* Size of our emulated memory */
55 #define CONFIG_SYS_SDRAM_BASE		0
56 #define CONFIG_SYS_SDRAM_SIZE		(128 << 20)
57 #define CONFIG_SYS_MONITOR_BASE	0
58 #define CONFIG_NR_DRAM_BANKS		1
59 
60 #define CONFIG_SYS_BAUDRATE_TABLE	{4800, 9600, 19200, 38400, 57600,\
61 					115200}
62 
63 #define BOOT_TARGET_DEVICES(func) \
64 	func(HOST, host, 1) \
65 	func(HOST, host, 0)
66 
67 #include <config_distro_bootcmd.h>
68 
69 #define CONFIG_KEEP_SERVERADDR
70 #define CONFIG_UDP_CHECKSUM
71 #define CONFIG_TIMESTAMP
72 #define CONFIG_BOOTP_DNS2
73 #define CONFIG_BOOTP_SEND_HOSTNAME
74 #define CONFIG_BOOTP_SERVERIP
75 #define CONFIG_IP_DEFRAG
76 
77 #ifndef SANDBOX_NO_SDL
78 #define CONFIG_SANDBOX_SDL
79 #endif
80 
81 /* LCD and keyboard require SDL support */
82 #ifdef CONFIG_SANDBOX_SDL
83 #define LCD_BPP			LCD_COLOR16
84 #define CONFIG_LCD_BMP_RLE8
85 #define CONFIG_VIDEO_BMP_RLE8
86 #define CONFIG_SPLASH_SCREEN_ALIGN
87 
88 #define CONFIG_KEYBOARD
89 
90 #define SANDBOX_SERIAL_SETTINGS		"stdin=serial,cros-ec-keyb,usbkbd\0" \
91 					"stdout=serial,vidconsole\0" \
92 					"stderr=serial,vidconsole\0"
93 #else
94 #define SANDBOX_SERIAL_SETTINGS		"stdin=serial\0" \
95 					"stdout=serial,vidconsole\0" \
96 					"stderr=serial,vidconsole\0"
97 #endif
98 
99 #define SANDBOX_ETH_SETTINGS		"ethaddr=00:00:11:22:33:44\0" \
100 					"eth1addr=00:00:11:22:33:45\0" \
101 					"eth3addr=00:00:11:22:33:46\0" \
102 					"eth5addr=00:00:11:22:33:47\0" \
103 					"ipaddr=1.2.3.4\0"
104 
105 #define MEM_LAYOUT_ENV_SETTINGS \
106 	"bootm_size=0x10000000\0" \
107 	"kernel_addr_r=0x1000000\0" \
108 	"fdt_addr_r=0xc00000\0" \
109 	"ramdisk_addr_r=0x2000000\0" \
110 	"scriptaddr=0x1000\0" \
111 	"pxefile_addr_r=0x2000\0"
112 
113 #define CONFIG_EXTRA_ENV_SETTINGS \
114 	SANDBOX_SERIAL_SETTINGS \
115 	SANDBOX_ETH_SETTINGS \
116 	BOOTENV \
117 	MEM_LAYOUT_ENV_SETTINGS
118 
119 #define CONFIG_GZIP_COMPRESSED
120 #define CONFIG_BZIP2
121 
122 #ifndef CONFIG_SPL_BUILD
123 #define CONFIG_SYS_IDE_MAXBUS		1
124 #define CONFIG_SYS_ATA_IDE0_OFFSET	0
125 #define CONFIG_SYS_IDE_MAXDEVICE	2
126 #define CONFIG_SYS_ATA_BASE_ADDR	0x100
127 #define CONFIG_SYS_ATA_DATA_OFFSET	0
128 #define CONFIG_SYS_ATA_REG_OFFSET	1
129 #define CONFIG_SYS_ATA_ALT_OFFSET	2
130 #define CONFIG_SYS_ATA_STRIDE		4
131 #endif
132 
133 #define CONFIG_SCSI_AHCI_PLAT
134 #define CONFIG_SYS_SCSI_MAX_DEVICE	2
135 #define CONFIG_SYS_SCSI_MAX_SCSI_ID	8
136 #define CONFIG_SYS_SCSI_MAX_LUN		4
137 
138 #define CONFIG_SYS_SATA_MAX_DEVICE	2
139 
140 #define CONFIG_MISC_INIT_F
141 
142 #endif
143