1 //===-- FunctionLoweringInfo.h - Lower functions from LLVM IR to CodeGen --===// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 // 10 // This implements routines for translating functions from LLVM IR into 11 // Machine IR. 12 // 13 //===----------------------------------------------------------------------===// 14 15 #ifndef LLVM_CODEGEN_FUNCTIONLOWERINGINFO_H 16 #define LLVM_CODEGEN_FUNCTIONLOWERINGINFO_H 17 18 #include "llvm/InlineAsm.h" 19 #include "llvm/Instructions.h" 20 #include "llvm/ADT/APInt.h" 21 #include "llvm/ADT/DenseMap.h" 22 #include "llvm/ADT/DenseSet.h" 23 #include "llvm/ADT/IndexedMap.h" 24 #include "llvm/ADT/SmallVector.h" 25 #ifndef NDEBUG 26 #include "llvm/ADT/SmallSet.h" 27 #endif 28 #include "llvm/Analysis/BranchProbabilityInfo.h" 29 #include "llvm/CodeGen/ValueTypes.h" 30 #include "llvm/CodeGen/ISDOpcodes.h" 31 #include "llvm/CodeGen/MachineBasicBlock.h" 32 #include "llvm/Support/CallSite.h" 33 #include "llvm/Target/TargetRegisterInfo.h" 34 #include <vector> 35 36 namespace llvm { 37 38 class AllocaInst; 39 class BasicBlock; 40 class CallInst; 41 class Function; 42 class GlobalVariable; 43 class Instruction; 44 class MachineInstr; 45 class MachineBasicBlock; 46 class MachineFunction; 47 class MachineModuleInfo; 48 class MachineRegisterInfo; 49 class TargetLowering; 50 class Value; 51 52 //===--------------------------------------------------------------------===// 53 /// FunctionLoweringInfo - This contains information that is global to a 54 /// function that is used when lowering a region of the function. 55 /// 56 class FunctionLoweringInfo { 57 public: 58 const TargetLowering &TLI; 59 const Function *Fn; 60 MachineFunction *MF; 61 MachineRegisterInfo *RegInfo; 62 BranchProbabilityInfo *BPI; 63 /// CanLowerReturn - true iff the function's return value can be lowered to 64 /// registers. 65 bool CanLowerReturn; 66 67 /// DemoteRegister - if CanLowerReturn is false, DemoteRegister is a vreg 68 /// allocated to hold a pointer to the hidden sret parameter. 69 unsigned DemoteRegister; 70 71 /// MBBMap - A mapping from LLVM basic blocks to their machine code entry. 72 DenseMap<const BasicBlock*, MachineBasicBlock *> MBBMap; 73 74 /// ValueMap - Since we emit code for the function a basic block at a time, 75 /// we must remember which virtual registers hold the values for 76 /// cross-basic-block values. 77 DenseMap<const Value*, unsigned> ValueMap; 78 79 /// StaticAllocaMap - Keep track of frame indices for fixed sized allocas in 80 /// the entry block. This allows the allocas to be efficiently referenced 81 /// anywhere in the function. 82 DenseMap<const AllocaInst*, int> StaticAllocaMap; 83 84 /// ByValArgFrameIndexMap - Keep track of frame indices for byval arguments. 85 DenseMap<const Argument*, int> ByValArgFrameIndexMap; 86 87 /// ArgDbgValues - A list of DBG_VALUE instructions created during isel for 88 /// function arguments that are inserted after scheduling is completed. 89 SmallVector<MachineInstr*, 8> ArgDbgValues; 90 91 /// RegFixups - Registers which need to be replaced after isel is done. 92 DenseMap<unsigned, unsigned> RegFixups; 93 94 /// MBB - The current block. 95 MachineBasicBlock *MBB; 96 97 /// MBB - The current insert position inside the current block. 98 MachineBasicBlock::iterator InsertPt; 99 100 #ifndef NDEBUG 101 SmallSet<const Instruction *, 8> CatchInfoLost; 102 SmallSet<const Instruction *, 8> CatchInfoFound; 103 #endif 104 105 struct LiveOutInfo { 106 unsigned NumSignBits : 31; 107 bool IsValid : 1; 108 APInt KnownOne, KnownZero; LiveOutInfoLiveOutInfo109 LiveOutInfo() : NumSignBits(0), IsValid(true), KnownOne(1, 0), 110 KnownZero(1, 0) {} 111 }; 112 113 /// VisitedBBs - The set of basic blocks visited thus far by instruction 114 /// selection. 115 DenseSet<const BasicBlock*> VisitedBBs; 116 117 /// PHINodesToUpdate - A list of phi instructions whose operand list will 118 /// be updated after processing the current basic block. 119 /// TODO: This isn't per-function state, it's per-basic-block state. But 120 /// there's no other convenient place for it to live right now. 121 std::vector<std::pair<MachineInstr*, unsigned> > PHINodesToUpdate; 122 123 explicit FunctionLoweringInfo(const TargetLowering &TLI); 124 125 /// set - Initialize this FunctionLoweringInfo with the given Function 126 /// and its associated MachineFunction. 127 /// 128 void set(const Function &Fn, MachineFunction &MF); 129 130 /// clear - Clear out all the function-specific state. This returns this 131 /// FunctionLoweringInfo to an empty state, ready to be used for a 132 /// different function. 133 void clear(); 134 135 /// isExportedInst - Return true if the specified value is an instruction 136 /// exported from its block. isExportedInst(const Value * V)137 bool isExportedInst(const Value *V) { 138 return ValueMap.count(V); 139 } 140 141 unsigned CreateReg(EVT VT); 142 143 unsigned CreateRegs(Type *Ty); 144 InitializeRegForValue(const Value * V)145 unsigned InitializeRegForValue(const Value *V) { 146 unsigned &R = ValueMap[V]; 147 assert(R == 0 && "Already initialized this value register!"); 148 return R = CreateRegs(V->getType()); 149 } 150 151 /// GetLiveOutRegInfo - Gets LiveOutInfo for a register, returning NULL if the 152 /// register is a PHI destination and the PHI's LiveOutInfo is not valid. GetLiveOutRegInfo(unsigned Reg)153 const LiveOutInfo *GetLiveOutRegInfo(unsigned Reg) { 154 if (!LiveOutRegInfo.inBounds(Reg)) 155 return NULL; 156 157 const LiveOutInfo *LOI = &LiveOutRegInfo[Reg]; 158 if (!LOI->IsValid) 159 return NULL; 160 161 return LOI; 162 } 163 164 /// GetLiveOutRegInfo - Gets LiveOutInfo for a register, returning NULL if the 165 /// register is a PHI destination and the PHI's LiveOutInfo is not valid. If 166 /// the register's LiveOutInfo is for a smaller bit width, it is extended to 167 /// the larger bit width by zero extension. The bit width must be no smaller 168 /// than the LiveOutInfo's existing bit width. 169 const LiveOutInfo *GetLiveOutRegInfo(unsigned Reg, unsigned BitWidth); 170 171 /// AddLiveOutRegInfo - Adds LiveOutInfo for a register. AddLiveOutRegInfo(unsigned Reg,unsigned NumSignBits,const APInt & KnownZero,const APInt & KnownOne)172 void AddLiveOutRegInfo(unsigned Reg, unsigned NumSignBits, 173 const APInt &KnownZero, const APInt &KnownOne) { 174 // Only install this information if it tells us something. 175 if (NumSignBits == 1 && KnownZero == 0 && KnownOne == 0) 176 return; 177 178 LiveOutRegInfo.grow(Reg); 179 LiveOutInfo &LOI = LiveOutRegInfo[Reg]; 180 LOI.NumSignBits = NumSignBits; 181 LOI.KnownOne = KnownOne; 182 LOI.KnownZero = KnownZero; 183 } 184 185 /// ComputePHILiveOutRegInfo - Compute LiveOutInfo for a PHI's destination 186 /// register based on the LiveOutInfo of its operands. 187 void ComputePHILiveOutRegInfo(const PHINode*); 188 189 /// InvalidatePHILiveOutRegInfo - Invalidates a PHI's LiveOutInfo, to be 190 /// called when a block is visited before all of its predecessors. InvalidatePHILiveOutRegInfo(const PHINode * PN)191 void InvalidatePHILiveOutRegInfo(const PHINode *PN) { 192 // PHIs with no uses have no ValueMap entry. 193 DenseMap<const Value*, unsigned>::const_iterator It = ValueMap.find(PN); 194 if (It == ValueMap.end()) 195 return; 196 197 unsigned Reg = It->second; 198 LiveOutRegInfo.grow(Reg); 199 LiveOutRegInfo[Reg].IsValid = false; 200 } 201 202 /// setArgumentFrameIndex - Record frame index for the byval 203 /// argument. 204 void setArgumentFrameIndex(const Argument *A, int FI); 205 206 /// getArgumentFrameIndex - Get frame index for the byval argument. 207 int getArgumentFrameIndex(const Argument *A); 208 209 private: 210 /// LiveOutRegInfo - Information about live out vregs. 211 IndexedMap<LiveOutInfo, VirtReg2IndexFunctor> LiveOutRegInfo; 212 }; 213 214 /// AddCatchInfo - Extract the personality and type infos from an eh.selector 215 /// call, and add them to the specified machine basic block. 216 void AddCatchInfo(const CallInst &I, 217 MachineModuleInfo *MMI, MachineBasicBlock *MBB); 218 219 /// CopyCatchInfo - Copy catch information from SuccBB (or one of its 220 /// successors) to LPad. 221 void CopyCatchInfo(const BasicBlock *SuccBB, const BasicBlock *LPad, 222 MachineModuleInfo *MMI, FunctionLoweringInfo &FLI); 223 224 /// AddLandingPadInfo - Extract the exception handling information from the 225 /// landingpad instruction and add them to the specified machine module info. 226 void AddLandingPadInfo(const LandingPadInst &I, MachineModuleInfo &MMI, 227 MachineBasicBlock *MBB); 228 229 } // end namespace llvm 230 231 #endif 232