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1 //===-- llvm/CodeGen/MachineOperand.h - MachineOperand class ----*- C++ -*-===//
2 //
3 //                     The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This file contains the declaration of the MachineOperand class.
11 //
12 //===----------------------------------------------------------------------===//
13 
14 #ifndef LLVM_CODEGEN_MACHINEOPERAND_H
15 #define LLVM_CODEGEN_MACHINEOPERAND_H
16 
17 #include "llvm/Support/DataTypes.h"
18 #include <cassert>
19 
20 namespace llvm {
21 
22 class BlockAddress;
23 class ConstantFP;
24 class ConstantInt;
25 class GlobalValue;
26 class MachineBasicBlock;
27 class MachineInstr;
28 class MachineRegisterInfo;
29 class MDNode;
30 class TargetMachine;
31 class TargetRegisterInfo;
32 class raw_ostream;
33 class MCSymbol;
34 
35 /// MachineOperand class - Representation of each machine instruction operand.
36 ///
37 class MachineOperand {
38 public:
39   enum MachineOperandType {
40     MO_Register,               ///< Register operand.
41     MO_Immediate,              ///< Immediate operand
42     MO_CImmediate,             ///< Immediate >64bit operand
43     MO_FPImmediate,            ///< Floating-point immediate operand
44     MO_MachineBasicBlock,      ///< MachineBasicBlock reference
45     MO_FrameIndex,             ///< Abstract Stack Frame Index
46     MO_ConstantPoolIndex,      ///< Address of indexed Constant in Constant Pool
47     MO_JumpTableIndex,         ///< Address of indexed Jump Table for switch
48     MO_ExternalSymbol,         ///< Name of external global symbol
49     MO_GlobalAddress,          ///< Address of a global value
50     MO_BlockAddress,           ///< Address of a basic block
51     MO_Metadata,               ///< Metadata reference (for debug info)
52     MO_MCSymbol                ///< MCSymbol reference (for debug/eh info)
53   };
54 
55 private:
56   /// OpKind - Specify what kind of operand this is.  This discriminates the
57   /// union.
58   unsigned char OpKind; // MachineOperandType
59 
60   /// SubReg - Subregister number, only valid for MO_Register.  A value of 0
61   /// indicates the MO_Register has no subReg.
62   unsigned char SubReg;
63 
64   /// TargetFlags - This is a set of target-specific operand flags.
65   unsigned char TargetFlags;
66 
67   /// IsDef/IsImp/IsKill/IsDead flags - These are only valid for MO_Register
68   /// operands.
69 
70   /// IsDef - True if this is a def, false if this is a use of the register.
71   ///
72   bool IsDef : 1;
73 
74   /// IsImp - True if this is an implicit def or use, false if it is explicit.
75   ///
76   bool IsImp : 1;
77 
78   /// IsKill - True if this instruction is the last use of the register on this
79   /// path through the function.  This is only valid on uses of registers.
80   bool IsKill : 1;
81 
82   /// IsDead - True if this register is never used by a subsequent instruction.
83   /// This is only valid on definitions of registers.
84   bool IsDead : 1;
85 
86   /// IsUndef - True if this register operand reads an "undef" value, i.e. the
87   /// read value doesn't matter.  This flag can be set on both use and def
88   /// operands.  On a sub-register def operand, it refers to the part of the
89   /// register that isn't written.  On a full-register def operand, it is a
90   /// noop.  See readsReg().
91   ///
92   /// This is only valid on registers.
93   ///
94   /// Note that an instruction may have multiple <undef> operands referring to
95   /// the same register.  In that case, the instruction may depend on those
96   /// operands reading the same dont-care value.  For example:
97   ///
98   ///   %vreg1<def> = XOR %vreg2<undef>, %vreg2<undef>
99   ///
100   /// Any register can be used for %vreg2, and its value doesn't matter, but
101   /// the two operands must be the same register.
102   ///
103   bool IsUndef : 1;
104 
105   /// IsEarlyClobber - True if this MO_Register 'def' operand is written to
106   /// by the MachineInstr before all input registers are read.  This is used to
107   /// model the GCC inline asm '&' constraint modifier.
108   bool IsEarlyClobber : 1;
109 
110   /// IsDebug - True if this MO_Register 'use' operand is in a debug pseudo,
111   /// not a real instruction.  Such uses should be ignored during codegen.
112   bool IsDebug : 1;
113 
114   /// SmallContents - This really should be part of the Contents union, but
115   /// lives out here so we can get a better packed struct.
116   /// MO_Register: Register number.
117   /// OffsetedInfo: Low bits of offset.
118   union {
119     unsigned RegNo;           // For MO_Register.
120     unsigned OffsetLo;        // Matches Contents.OffsetedInfo.OffsetHi.
121   } SmallContents;
122 
123   /// ParentMI - This is the instruction that this operand is embedded into.
124   /// This is valid for all operand types, when the operand is in an instr.
125   MachineInstr *ParentMI;
126 
127   /// Contents union - This contains the payload for the various operand types.
128   union {
129     MachineBasicBlock *MBB;   // For MO_MachineBasicBlock.
130     const ConstantFP *CFP;    // For MO_FPImmediate.
131     const ConstantInt *CI;    // For MO_CImmediate. Integers > 64bit.
132     int64_t ImmVal;           // For MO_Immediate.
133     const MDNode *MD;         // For MO_Metadata.
134     MCSymbol *Sym;            // For MO_MCSymbol
135 
136     struct {                  // For MO_Register.
137       // Register number is in SmallContents.RegNo.
138       MachineOperand **Prev;  // Access list for register.
139       MachineOperand *Next;
140     } Reg;
141 
142     /// OffsetedInfo - This struct contains the offset and an object identifier.
143     /// this represent the object as with an optional offset from it.
144     struct {
145       union {
146         int Index;                // For MO_*Index - The index itself.
147         const char *SymbolName;   // For MO_ExternalSymbol.
148         const GlobalValue *GV;    // For MO_GlobalAddress.
149         const BlockAddress *BA;   // For MO_BlockAddress.
150       } Val;
151       // Low bits of offset are in SmallContents.OffsetLo.
152       int OffsetHi;               // An offset from the object, high 32 bits.
153     } OffsetedInfo;
154   } Contents;
155 
MachineOperand(MachineOperandType K)156   explicit MachineOperand(MachineOperandType K) : OpKind(K), ParentMI(0) {
157     TargetFlags = 0;
158   }
159 public:
160   /// getType - Returns the MachineOperandType for this operand.
161   ///
getType()162   MachineOperandType getType() const { return (MachineOperandType)OpKind; }
163 
getTargetFlags()164   unsigned char getTargetFlags() const { return TargetFlags; }
setTargetFlags(unsigned char F)165   void setTargetFlags(unsigned char F) { TargetFlags = F; }
addTargetFlag(unsigned char F)166   void addTargetFlag(unsigned char F) { TargetFlags |= F; }
167 
168 
169   /// getParent - Return the instruction that this operand belongs to.
170   ///
getParent()171   MachineInstr *getParent() { return ParentMI; }
getParent()172   const MachineInstr *getParent() const { return ParentMI; }
173 
174   /// clearParent - Reset the parent pointer.
175   ///
176   /// The MachineOperand copy constructor also copies ParentMI, expecting the
177   /// original to be deleted. If a MachineOperand is ever stored outside a
178   /// MachineInstr, the parent pointer must be cleared.
179   ///
180   /// Never call clearParent() on an operand in a MachineInstr.
181   ///
clearParent()182   void clearParent() { ParentMI = 0; }
183 
184   void print(raw_ostream &os, const TargetMachine *TM = 0) const;
185 
186   //===--------------------------------------------------------------------===//
187   // Accessors that tell you what kind of MachineOperand you're looking at.
188   //===--------------------------------------------------------------------===//
189 
190   /// isReg - Tests if this is a MO_Register operand.
isReg()191   bool isReg() const { return OpKind == MO_Register; }
192   /// isImm - Tests if this is a MO_Immediate operand.
isImm()193   bool isImm() const { return OpKind == MO_Immediate; }
194   /// isCImm - Test if t his is a MO_CImmediate operand.
isCImm()195   bool isCImm() const { return OpKind == MO_CImmediate; }
196   /// isFPImm - Tests if this is a MO_FPImmediate operand.
isFPImm()197   bool isFPImm() const { return OpKind == MO_FPImmediate; }
198   /// isMBB - Tests if this is a MO_MachineBasicBlock operand.
isMBB()199   bool isMBB() const { return OpKind == MO_MachineBasicBlock; }
200   /// isFI - Tests if this is a MO_FrameIndex operand.
isFI()201   bool isFI() const { return OpKind == MO_FrameIndex; }
202   /// isCPI - Tests if this is a MO_ConstantPoolIndex operand.
isCPI()203   bool isCPI() const { return OpKind == MO_ConstantPoolIndex; }
204   /// isJTI - Tests if this is a MO_JumpTableIndex operand.
isJTI()205   bool isJTI() const { return OpKind == MO_JumpTableIndex; }
206   /// isGlobal - Tests if this is a MO_GlobalAddress operand.
isGlobal()207   bool isGlobal() const { return OpKind == MO_GlobalAddress; }
208   /// isSymbol - Tests if this is a MO_ExternalSymbol operand.
isSymbol()209   bool isSymbol() const { return OpKind == MO_ExternalSymbol; }
210   /// isBlockAddress - Tests if this is a MO_BlockAddress operand.
isBlockAddress()211   bool isBlockAddress() const { return OpKind == MO_BlockAddress; }
212   /// isMetadata - Tests if this is a MO_Metadata operand.
isMetadata()213   bool isMetadata() const { return OpKind == MO_Metadata; }
isMCSymbol()214   bool isMCSymbol() const { return OpKind == MO_MCSymbol; }
215 
216   //===--------------------------------------------------------------------===//
217   // Accessors for Register Operands
218   //===--------------------------------------------------------------------===//
219 
220   /// getReg - Returns the register number.
getReg()221   unsigned getReg() const {
222     assert(isReg() && "This is not a register operand!");
223     return SmallContents.RegNo;
224   }
225 
getSubReg()226   unsigned getSubReg() const {
227     assert(isReg() && "Wrong MachineOperand accessor");
228     return (unsigned)SubReg;
229   }
230 
isUse()231   bool isUse() const {
232     assert(isReg() && "Wrong MachineOperand accessor");
233     return !IsDef;
234   }
235 
isDef()236   bool isDef() const {
237     assert(isReg() && "Wrong MachineOperand accessor");
238     return IsDef;
239   }
240 
isImplicit()241   bool isImplicit() const {
242     assert(isReg() && "Wrong MachineOperand accessor");
243     return IsImp;
244   }
245 
isDead()246   bool isDead() const {
247     assert(isReg() && "Wrong MachineOperand accessor");
248     return IsDead;
249   }
250 
isKill()251   bool isKill() const {
252     assert(isReg() && "Wrong MachineOperand accessor");
253     return IsKill;
254   }
255 
isUndef()256   bool isUndef() const {
257     assert(isReg() && "Wrong MachineOperand accessor");
258     return IsUndef;
259   }
260 
isEarlyClobber()261   bool isEarlyClobber() const {
262     assert(isReg() && "Wrong MachineOperand accessor");
263     return IsEarlyClobber;
264   }
265 
isDebug()266   bool isDebug() const {
267     assert(isReg() && "Wrong MachineOperand accessor");
268     return IsDebug;
269   }
270 
271   /// readsReg - Returns true if this operand reads the previous value of its
272   /// register.  A use operand with the <undef> flag set doesn't read its
273   /// register.  A sub-register def implicitly reads the other parts of the
274   /// register being redefined unless the <undef> flag is set.
readsReg()275   bool readsReg() const {
276     assert(isReg() && "Wrong MachineOperand accessor");
277     return !isUndef() && (isUse() || getSubReg());
278   }
279 
280   /// getNextOperandForReg - Return the next MachineOperand in the function that
281   /// uses or defines this register.
getNextOperandForReg()282   MachineOperand *getNextOperandForReg() const {
283     assert(isReg() && "This is not a register operand!");
284     return Contents.Reg.Next;
285   }
286 
287   //===--------------------------------------------------------------------===//
288   // Mutators for Register Operands
289   //===--------------------------------------------------------------------===//
290 
291   /// Change the register this operand corresponds to.
292   ///
293   void setReg(unsigned Reg);
294 
setSubReg(unsigned subReg)295   void setSubReg(unsigned subReg) {
296     assert(isReg() && "Wrong MachineOperand accessor");
297     SubReg = (unsigned char)subReg;
298   }
299 
300   /// substVirtReg - Substitute the current register with the virtual
301   /// subregister Reg:SubReg. Take any existing SubReg index into account,
302   /// using TargetRegisterInfo to compose the subreg indices if necessary.
303   /// Reg must be a virtual register, SubIdx can be 0.
304   ///
305   void substVirtReg(unsigned Reg, unsigned SubIdx, const TargetRegisterInfo&);
306 
307   /// substPhysReg - Substitute the current register with the physical register
308   /// Reg, taking any existing SubReg into account. For instance,
309   /// substPhysReg(%EAX) will change %reg1024:sub_8bit to %AL.
310   ///
311   void substPhysReg(unsigned Reg, const TargetRegisterInfo&);
312 
313   void setIsUse(bool Val = true) {
314     assert(isReg() && "Wrong MachineOperand accessor");
315     assert((Val || !isDebug()) && "Marking a debug operation as def");
316     IsDef = !Val;
317   }
318 
319   void setIsDef(bool Val = true) {
320     assert(isReg() && "Wrong MachineOperand accessor");
321     assert((!Val || !isDebug()) && "Marking a debug operation as def");
322     IsDef = Val;
323   }
324 
325   void setImplicit(bool Val = true) {
326     assert(isReg() && "Wrong MachineOperand accessor");
327     IsImp = Val;
328   }
329 
330   void setIsKill(bool Val = true) {
331     assert(isReg() && !IsDef && "Wrong MachineOperand accessor");
332     assert((!Val || !isDebug()) && "Marking a debug operation as kill");
333     IsKill = Val;
334   }
335 
336   void setIsDead(bool Val = true) {
337     assert(isReg() && IsDef && "Wrong MachineOperand accessor");
338     IsDead = Val;
339   }
340 
341   void setIsUndef(bool Val = true) {
342     assert(isReg() && "Wrong MachineOperand accessor");
343     IsUndef = Val;
344   }
345 
346   void setIsEarlyClobber(bool Val = true) {
347     assert(isReg() && IsDef && "Wrong MachineOperand accessor");
348     IsEarlyClobber = Val;
349   }
350 
351   void setIsDebug(bool Val = true) {
352     assert(isReg() && IsDef && "Wrong MachineOperand accessor");
353     IsDebug = Val;
354   }
355 
356   //===--------------------------------------------------------------------===//
357   // Accessors for various operand types.
358   //===--------------------------------------------------------------------===//
359 
getImm()360   int64_t getImm() const {
361     assert(isImm() && "Wrong MachineOperand accessor");
362     return Contents.ImmVal;
363   }
364 
getCImm()365   const ConstantInt *getCImm() const {
366     assert(isCImm() && "Wrong MachineOperand accessor");
367     return Contents.CI;
368   }
369 
getFPImm()370   const ConstantFP *getFPImm() const {
371     assert(isFPImm() && "Wrong MachineOperand accessor");
372     return Contents.CFP;
373   }
374 
getMBB()375   MachineBasicBlock *getMBB() const {
376     assert(isMBB() && "Wrong MachineOperand accessor");
377     return Contents.MBB;
378   }
379 
getIndex()380   int getIndex() const {
381     assert((isFI() || isCPI() || isJTI()) &&
382            "Wrong MachineOperand accessor");
383     return Contents.OffsetedInfo.Val.Index;
384   }
385 
getGlobal()386   const GlobalValue *getGlobal() const {
387     assert(isGlobal() && "Wrong MachineOperand accessor");
388     return Contents.OffsetedInfo.Val.GV;
389   }
390 
getBlockAddress()391   const BlockAddress *getBlockAddress() const {
392     assert(isBlockAddress() && "Wrong MachineOperand accessor");
393     return Contents.OffsetedInfo.Val.BA;
394   }
395 
getMCSymbol()396   MCSymbol *getMCSymbol() const {
397     assert(isMCSymbol() && "Wrong MachineOperand accessor");
398     return Contents.Sym;
399   }
400 
401   /// getOffset - Return the offset from the symbol in this operand. This always
402   /// returns 0 for ExternalSymbol operands.
getOffset()403   int64_t getOffset() const {
404     assert((isGlobal() || isSymbol() || isCPI() || isBlockAddress()) &&
405            "Wrong MachineOperand accessor");
406     return (int64_t(Contents.OffsetedInfo.OffsetHi) << 32) |
407            SmallContents.OffsetLo;
408   }
409 
getSymbolName()410   const char *getSymbolName() const {
411     assert(isSymbol() && "Wrong MachineOperand accessor");
412     return Contents.OffsetedInfo.Val.SymbolName;
413   }
414 
getMetadata()415   const MDNode *getMetadata() const {
416     assert(isMetadata() && "Wrong MachineOperand accessor");
417     return Contents.MD;
418   }
419 
420   //===--------------------------------------------------------------------===//
421   // Mutators for various operand types.
422   //===--------------------------------------------------------------------===//
423 
setImm(int64_t immVal)424   void setImm(int64_t immVal) {
425     assert(isImm() && "Wrong MachineOperand mutator");
426     Contents.ImmVal = immVal;
427   }
428 
setOffset(int64_t Offset)429   void setOffset(int64_t Offset) {
430     assert((isGlobal() || isSymbol() || isCPI() || isBlockAddress()) &&
431         "Wrong MachineOperand accessor");
432     SmallContents.OffsetLo = unsigned(Offset);
433     Contents.OffsetedInfo.OffsetHi = int(Offset >> 32);
434   }
435 
setIndex(int Idx)436   void setIndex(int Idx) {
437     assert((isFI() || isCPI() || isJTI()) &&
438            "Wrong MachineOperand accessor");
439     Contents.OffsetedInfo.Val.Index = Idx;
440   }
441 
setMBB(MachineBasicBlock * MBB)442   void setMBB(MachineBasicBlock *MBB) {
443     assert(isMBB() && "Wrong MachineOperand accessor");
444     Contents.MBB = MBB;
445   }
446 
447   //===--------------------------------------------------------------------===//
448   // Other methods.
449   //===--------------------------------------------------------------------===//
450 
451   /// isIdenticalTo - Return true if this operand is identical to the specified
452   /// operand. Note: This method ignores isKill and isDead properties.
453   bool isIdenticalTo(const MachineOperand &Other) const;
454 
455   /// ChangeToImmediate - Replace this operand with a new immediate operand of
456   /// the specified value.  If an operand is known to be an immediate already,
457   /// the setImm method should be used.
458   void ChangeToImmediate(int64_t ImmVal);
459 
460   /// ChangeToRegister - Replace this operand with a new register operand of
461   /// the specified value.  If an operand is known to be an register already,
462   /// the setReg method should be used.
463   void ChangeToRegister(unsigned Reg, bool isDef, bool isImp = false,
464                         bool isKill = false, bool isDead = false,
465                         bool isUndef = false, bool isDebug = false);
466 
467   //===--------------------------------------------------------------------===//
468   // Construction methods.
469   //===--------------------------------------------------------------------===//
470 
CreateImm(int64_t Val)471   static MachineOperand CreateImm(int64_t Val) {
472     MachineOperand Op(MachineOperand::MO_Immediate);
473     Op.setImm(Val);
474     return Op;
475   }
476 
CreateCImm(const ConstantInt * CI)477   static MachineOperand CreateCImm(const ConstantInt *CI) {
478     MachineOperand Op(MachineOperand::MO_CImmediate);
479     Op.Contents.CI = CI;
480     return Op;
481   }
482 
CreateFPImm(const ConstantFP * CFP)483   static MachineOperand CreateFPImm(const ConstantFP *CFP) {
484     MachineOperand Op(MachineOperand::MO_FPImmediate);
485     Op.Contents.CFP = CFP;
486     return Op;
487   }
488 
489   static MachineOperand CreateReg(unsigned Reg, bool isDef, bool isImp = false,
490                                   bool isKill = false, bool isDead = false,
491                                   bool isUndef = false,
492                                   bool isEarlyClobber = false,
493                                   unsigned SubReg = 0,
494                                   bool isDebug = false) {
495     MachineOperand Op(MachineOperand::MO_Register);
496     Op.IsDef = isDef;
497     Op.IsImp = isImp;
498     Op.IsKill = isKill;
499     Op.IsDead = isDead;
500     Op.IsUndef = isUndef;
501     Op.IsEarlyClobber = isEarlyClobber;
502     Op.IsDebug = isDebug;
503     Op.SmallContents.RegNo = Reg;
504     Op.Contents.Reg.Prev = 0;
505     Op.Contents.Reg.Next = 0;
506     Op.SubReg = SubReg;
507     return Op;
508   }
509   static MachineOperand CreateMBB(MachineBasicBlock *MBB,
510                                   unsigned char TargetFlags = 0) {
511     MachineOperand Op(MachineOperand::MO_MachineBasicBlock);
512     Op.setMBB(MBB);
513     Op.setTargetFlags(TargetFlags);
514     return Op;
515   }
CreateFI(int Idx)516   static MachineOperand CreateFI(int Idx) {
517     MachineOperand Op(MachineOperand::MO_FrameIndex);
518     Op.setIndex(Idx);
519     return Op;
520   }
521   static MachineOperand CreateCPI(unsigned Idx, int Offset,
522                                   unsigned char TargetFlags = 0) {
523     MachineOperand Op(MachineOperand::MO_ConstantPoolIndex);
524     Op.setIndex(Idx);
525     Op.setOffset(Offset);
526     Op.setTargetFlags(TargetFlags);
527     return Op;
528   }
529   static MachineOperand CreateJTI(unsigned Idx,
530                                   unsigned char TargetFlags = 0) {
531     MachineOperand Op(MachineOperand::MO_JumpTableIndex);
532     Op.setIndex(Idx);
533     Op.setTargetFlags(TargetFlags);
534     return Op;
535   }
536   static MachineOperand CreateGA(const GlobalValue *GV, int64_t Offset,
537                                  unsigned char TargetFlags = 0) {
538     MachineOperand Op(MachineOperand::MO_GlobalAddress);
539     Op.Contents.OffsetedInfo.Val.GV = GV;
540     Op.setOffset(Offset);
541     Op.setTargetFlags(TargetFlags);
542     return Op;
543   }
544   static MachineOperand CreateES(const char *SymName,
545                                  unsigned char TargetFlags = 0) {
546     MachineOperand Op(MachineOperand::MO_ExternalSymbol);
547     Op.Contents.OffsetedInfo.Val.SymbolName = SymName;
548     Op.setOffset(0); // Offset is always 0.
549     Op.setTargetFlags(TargetFlags);
550     return Op;
551   }
552   static MachineOperand CreateBA(const BlockAddress *BA,
553                                  unsigned char TargetFlags = 0) {
554     MachineOperand Op(MachineOperand::MO_BlockAddress);
555     Op.Contents.OffsetedInfo.Val.BA = BA;
556     Op.setOffset(0); // Offset is always 0.
557     Op.setTargetFlags(TargetFlags);
558     return Op;
559   }
CreateMetadata(const MDNode * Meta)560   static MachineOperand CreateMetadata(const MDNode *Meta) {
561     MachineOperand Op(MachineOperand::MO_Metadata);
562     Op.Contents.MD = Meta;
563     return Op;
564   }
565 
CreateMCSymbol(MCSymbol * Sym)566   static MachineOperand CreateMCSymbol(MCSymbol *Sym) {
567     MachineOperand Op(MachineOperand::MO_MCSymbol);
568     Op.Contents.Sym = Sym;
569     return Op;
570   }
571 
572   friend class MachineInstr;
573   friend class MachineRegisterInfo;
574 private:
575   //===--------------------------------------------------------------------===//
576   // Methods for handling register use/def lists.
577   //===--------------------------------------------------------------------===//
578 
579   /// isOnRegUseList - Return true if this operand is on a register use/def list
580   /// or false if not.  This can only be called for register operands that are
581   /// part of a machine instruction.
isOnRegUseList()582   bool isOnRegUseList() const {
583     assert(isReg() && "Can only add reg operand to use lists");
584     return Contents.Reg.Prev != 0;
585   }
586 
587   /// AddRegOperandToRegInfo - Add this register operand to the specified
588   /// MachineRegisterInfo.  If it is null, then the next/prev fields should be
589   /// explicitly nulled out.
590   void AddRegOperandToRegInfo(MachineRegisterInfo *RegInfo);
591 
592   /// RemoveRegOperandFromRegInfo - Remove this register operand from the
593   /// MachineRegisterInfo it is linked with.
594   void RemoveRegOperandFromRegInfo();
595 };
596 
597 inline raw_ostream &operator<<(raw_ostream &OS, const MachineOperand& MO) {
598   MO.print(OS, 0);
599   return OS;
600 }
601 
602 } // End llvm namespace
603 
604 #endif
605