Searched defs:CurRC (Results 1 – 5 of 5) sorted by relevance
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/ |
| D | MachineInstr.cpp | 690 unsigned Reg, const TargetRegisterClass *CurRC, const TargetInstrInfo *TII, in getRegClassConstraintEffectForVReg()
707 unsigned OpIdx, unsigned Reg, const TargetRegisterClass *CurRC, in getRegClassConstraintEffectForVRegImpl()
719 unsigned OpIdx, const TargetRegisterClass *CurRC, in getRegClassConstraintEffect()
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| D | RegAllocGreedy.cpp | 2048 const TargetRegisterClass *CurRC = MRI->getRegClass(VirtReg.reg); in tryInstructionSplit() local
2487 const TargetRegisterClass *CurRC = MRI->getRegClass(VirtReg.reg); in mayRecolorAllInterferences() local
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| /external/llvm/lib/CodeGen/ |
| D | MachineInstr.cpp | 1215 unsigned Reg, const TargetRegisterClass *CurRC, const TargetInstrInfo *TII, in getRegClassConstraintEffectForVReg()
1232 unsigned OpIdx, unsigned Reg, const TargetRegisterClass *CurRC, in getRegClassConstraintEffectForVRegImpl()
1244 unsigned OpIdx, const TargetRegisterClass *CurRC, in getRegClassConstraintEffect()
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| D | RegAllocGreedy.cpp | 1583 const TargetRegisterClass *CurRC = MRI->getRegClass(VirtReg.reg); in tryInstructionSplit() local
2012 const TargetRegisterClass *CurRC = MRI->getRegClass(VirtReg.reg); in mayRecolorAllInterferences() local
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| /external/llvm/lib/CodeGen/GlobalISel/ |
| D | RegisterBankInfo.cpp | 93 const TargetRegisterClass &CurRC = *TRI.getRegClass(RCId); in addRegBankCoverage() local
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