1 /* 2 * Copyright (c) 2017-2018, The Linux Foundation. All rights reserved. 3 * 4 * Redistribution and use in source and binary forms, with or without 5 * modification, are permitted provided that the following conditions are 6 * met: 7 * * Redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer. 9 * * Redistributions in binary form must reproduce the above 10 * copyright notice, this list of conditions and the following 11 * disclaimer in the documentation and/or other materials provided 12 * with the distribution. 13 * * Neither the name of The Linux Foundation nor the names of its 14 * contributors may be used to endorse or promote products derived 15 * from this software without specific prior written permission. 16 * 17 * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED 18 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 19 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT 20 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS 21 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 22 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 23 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR 24 * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 25 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE 26 * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN 27 * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 28 */ 29 30 #ifndef __DRM_INTERFACE_H__ 31 #define __DRM_INTERFACE_H__ 32 33 #include <map> 34 #include <string> 35 #include <utility> 36 #include <vector> 37 38 #include "xf86drm.h" 39 #include "xf86drmMode.h" 40 #include <drm/msm_drm.h> 41 42 namespace sde_drm { 43 44 typedef std::map<std::pair<uint32_t, uint64_t>, float> CompRatioMap; 45 46 /* 47 * Drm Atomic Operation Codes 48 */ 49 enum struct DRMOps { 50 /* 51 * Op: Sets plane source crop 52 * Arg: uint32_t - Plane ID 53 * DRMRect - Source Rectangle 54 */ 55 PLANE_SET_SRC_RECT, 56 /* 57 * Op: Sets plane destination rect 58 * Arg: uint32_t - Plane ID 59 * DRMRect - Dst Rectangle 60 */ 61 PLANE_SET_DST_RECT, 62 /* 63 * Op: Sets plane zorder 64 * Arg: uint32_t - Plane ID 65 * uint32_t - zorder 66 */ 67 PLANE_SET_ZORDER, 68 /* 69 * Op: Sets plane rotation flags 70 * Arg: uint32_t - Plane ID 71 * uint32_t - bit mask of rotation flags (See drm_mode.h for enums) 72 */ 73 PLANE_SET_ROTATION, 74 /* 75 * Op: Sets plane alpha 76 * Arg: uint32_t - Plane ID 77 * uint32_t - alpha value 78 */ 79 PLANE_SET_ALPHA, 80 /* 81 * Op: Sets the blend type 82 * Arg: uint32_t - Plane ID 83 * uint32_t - blend type (see DRMBlendType) 84 */ 85 PLANE_SET_BLEND_TYPE, 86 /* 87 * Op: Sets horizontal decimation 88 * Arg: uint32_t - Plane ID 89 * uint32_t - decimation factor 90 */ 91 PLANE_SET_H_DECIMATION, 92 /* 93 * Op: Sets vertical decimation 94 * Arg: uint32_t - Plane ID 95 * uint32_t - decimation factor 96 */ 97 PLANE_SET_V_DECIMATION, 98 /* 99 * Op: Sets source config flags 100 * Arg: uint32_t - Plane ID 101 * uint32_t - flags to enable or disable a specific op. E.g. deinterlacing 102 */ 103 PLANE_SET_SRC_CONFIG, 104 /* 105 * Op: Sets frame buffer ID for plane. Set together with CRTC. 106 * Arg: uint32_t - Plane ID 107 * uint32_t - Framebuffer ID 108 */ 109 PLANE_SET_FB_ID, 110 /* 111 * Op: Sets the crtc for this plane. Set together with FB_ID. 112 * Arg: uint32_t - Plane ID 113 * uint32_t - CRTC ID 114 */ 115 PLANE_SET_CRTC, 116 /* 117 * Op: Sets acquire fence for this plane's buffer. Set together with FB_ID, CRTC. 118 * Arg: uint32_t - Plane ID 119 * uint32_t - Input fence 120 */ 121 PLANE_SET_INPUT_FENCE, 122 /* 123 * Op: Sets scaler config on this plane. 124 * Arg: uint32_t - Plane ID 125 * uint64_t - Address of the scaler config object (version based) 126 */ 127 PLANE_SET_SCALER_CONFIG, 128 /* 129 * Op: Sets plane rotation destination rect 130 * Arg: uint32_t - Plane ID 131 * DRMRect - rotator dst Rectangle 132 */ 133 PLANE_SET_ROTATION_DST_RECT, 134 /* 135 * Op: Sets FB Secure mode for this plane. 136 * Arg: uint32_t - Plane ID 137 * uint32_t - Value of the FB Secure mode. 138 */ 139 PLANE_SET_FB_SECURE_MODE, 140 /* 141 * Op: Sets csc config on this plane. 142 * Arg: uint32_t - Plane ID 143 * uint32_t* - pointer to csc type 144 */ 145 PLANE_SET_CSC_CONFIG, 146 /* 147 * Op: Sets multirect mode on this plane. 148 * Arg: uint32_t - Plane ID 149 * uint32_t - multirect mode 150 */ 151 PLANE_SET_MULTIRECT_MODE, 152 /* 153 * Op: Activate or deactivate a CRTC 154 * Arg: uint32_t - CRTC ID 155 * uint32_t - 1 to enable, 0 to disable 156 */ 157 CRTC_SET_ACTIVE, 158 /* 159 * Op: Sets display mode 160 * Arg: uint32_t - CRTC ID 161 * drmModeModeInfo* - Pointer to display mode 162 */ 163 CRTC_SET_MODE, 164 /* 165 * Op: Sets an offset indicating when a release fence should be signalled. 166 * Arg: uint32_t - offset 167 * 0: non-speculative, default 168 * 1: speculative 169 */ 170 CRTC_SET_OUTPUT_FENCE_OFFSET, 171 /* 172 * Op: Sets overall SDE core clock 173 * Arg: uint32_t - CRTC ID 174 * uint32_t - core_clk 175 */ 176 CRTC_SET_CORE_CLK, 177 /* 178 * Op: Sets MNOC bus average bandwidth 179 * Arg: uint32_t - CRTC ID 180 * uint32_t - core_ab 181 */ 182 CRTC_SET_CORE_AB, 183 /* 184 * Op: Sets MNOC bus instantaneous bandwidth 185 * Arg: uint32_t - CRTC ID 186 * uint32_t - core_ib 187 */ 188 CRTC_SET_CORE_IB, 189 /* 190 * Op: Sets LLCC Bus average bandwidth 191 * Arg: uint32_t - CRTC ID 192 * uint32_t - llcc_ab 193 */ 194 CRTC_SET_LLCC_AB, 195 /* 196 * Op: Sets LLCC Bus instantaneous bandwidth 197 * Arg: uint32_t - CRTC ID 198 * uint32_t - llcc_ib 199 */ 200 CRTC_SET_LLCC_IB, 201 /* 202 * Op: Sets DRAM bus average bandwidth 203 * Arg: uint32_t - CRTC ID 204 * uint32_t - dram_ab 205 */ 206 CRTC_SET_DRAM_AB, 207 /* 208 * Op: Sets DRAM bus instantaneous bandwidth 209 * Arg: uint32_t - CRTC ID 210 * uint32_t - dram_ib 211 */ 212 CRTC_SET_DRAM_IB, 213 /* 214 * Op: Sets Rotator BW for inline rotation 215 * Arg: uint32_t - CRTC ID 216 * uint32_t - rot_bw 217 */ 218 CRTC_SET_ROT_PREFILL_BW, 219 /* 220 * Op: Sets rotator clock for inline rotation 221 * Arg: uint32_t - CRTC ID 222 * uint32_t - rot_clk 223 */ 224 CRTC_SET_ROT_CLK, 225 /* 226 * Op: Sets destination scalar data 227 * Arg: uint32_t - CRTC ID 228 * uint64_t - Pointer to destination scalar data 229 */ 230 CRTC_SET_DEST_SCALER_CONFIG, 231 /* 232 * Op: Returns release fence for this frame. Should be called after Commit() on 233 * DRMAtomicReqInterface. 234 * Arg: uint32_t - CRTC ID 235 * int * - Pointer to an integer that will hold the returned fence 236 */ 237 CRTC_GET_RELEASE_FENCE, 238 /* 239 * Op: Sets PP feature 240 * Arg: uint32_t - CRTC ID 241 * DRMPPFeatureInfo * - PP feature data pointer 242 */ 243 CRTC_SET_POST_PROC, 244 /* 245 * Op: Sets CRTC ROIs. 246 * Arg: uint32_t - CRTC ID 247 * uint32_t - number of ROIs 248 * DRMRect * - Array of CRTC ROIs 249 */ 250 CRTC_SET_ROI, 251 /* 252 * Op: Sets Security level for CRTC. 253 * Arg: uint32_t - CRTC ID 254 * uint32_t - Security level 255 */ 256 CRTC_SET_SECURITY_LEVEL, 257 /* 258 * Op: sets solid fill stages 259 * Arg: uint32_t - CRTC ID 260 * Vector of DRMSolidfillStage 261 */ 262 CRTC_SET_SOLIDFILL_STAGES, 263 /* 264 * Op: Sets idle timeout. 265 * Arg: uint32_t - CRTC ID 266 * uint32_t - idle timeout in ms 267 */ 268 CRTC_SET_IDLE_TIMEOUT, 269 /* 270 * Op: enables Secure UI enhancement feature. 271 * Arg: uint32_t - CRTC ID 272 * uint32_t - enable/disable secure UI enhancement feature. 273 */ 274 CRTC_SET_SECURE_UI_ENHANCEMENT, 275 /* 276 * Op: Sets Capture mode for Concurrent Writeback feature. 277 * Arg: uint32_t - CRTC ID 278 * uint32_t - Capture mode 279 */ 280 CRTC_SET_CAPTURE_MODE, 281 /* 282 * Op: Sets Idle PC state for CRTC. 283 * Arg: uint32_t - CRTC ID 284 * uint32_t - idle pc state 285 */ 286 CRTC_SET_IDLE_PC_STATE, 287 /* 288 * Op: Returns retire fence for this commit. Should be called after Commit() on 289 * DRMAtomicReqInterface. 290 * Arg: uint32_t - Connector ID 291 * int * - Pointer to an integer that will hold the returned fence 292 */ 293 CONNECTOR_GET_RETIRE_FENCE, 294 /* 295 * Op: Sets writeback connector destination rect 296 * Arg: uint32_t - Connector ID 297 * DRMRect - Dst Rectangle 298 */ 299 CONNECTOR_SET_OUTPUT_RECT, 300 /* 301 * Op: Sets frame buffer ID for writeback connector. 302 * Arg: uint32_t - Connector ID 303 * uint32_t - Framebuffer ID 304 */ 305 CONNECTOR_SET_OUTPUT_FB_ID, 306 /* 307 * Op: Sets power mode for connector. 308 * Arg: uint32_t - Connector ID 309 * uint32_t - Power Mode 310 */ 311 CONNECTOR_SET_POWER_MODE, 312 /* 313 * Op: Sets panel ROIs. 314 * Arg: uint32_t - Connector ID 315 * uint32_t - number of ROIs 316 * DRMRect * - Array of Connector ROIs 317 */ 318 CONNECTOR_SET_ROI, 319 /* 320 * Op: Sets the connector to autorefresh mode. 321 * Arg: uint32_t - Connector ID 322 * uint32_t - Enable-1, Disable-0 323 */ 324 CONNECTOR_SET_AUTOREFRESH, 325 /* 326 * Op: Set FB secure mode for Writeback connector. 327 * Arg: uint32_t - Connector ID 328 * uint32_t - FB Secure mode 329 */ 330 CONNECTOR_SET_FB_SECURE_MODE, 331 /* 332 * Op: Sets a crtc id to this connector 333 * Arg: uint32_t - Connector ID 334 * uint32_t - CRTC ID 335 */ 336 CONNECTOR_SET_CRTC, 337 /* 338 * Op: Sets PP feature 339 * Arg: uint32_t - Connector ID 340 * DRMPPFeatureInfo * - PP feature data pointer 341 */ 342 CONNECTOR_SET_POST_PROC, 343 /* 344 * Op: Sets connector hdr metadata 345 * Arg: uint32_t - Connector ID 346 * drm_msm_ext_hdr_metadata - hdr_metadata 347 */ 348 CONNECTOR_SET_HDR_METADATA, 349 }; 350 351 enum struct DRMRotation { 352 FLIP_H = 0x1, 353 FLIP_V = 0x2, 354 ROT_180 = FLIP_H | FLIP_V, 355 ROT_90 = 0x4, 356 }; 357 358 enum struct DRMPowerMode { 359 ON, 360 DOZE, 361 DOZE_SUSPEND, 362 OFF, 363 }; 364 365 enum struct DRMBlendType { 366 UNDEFINED = 0, 367 OPAQUE = 1, 368 PREMULTIPLIED = 2, 369 COVERAGE = 3, 370 }; 371 372 enum struct DRMSrcConfig { 373 DEINTERLACE = 0, 374 }; 375 376 enum struct DRMIdlePCState { 377 NONE, 378 ENABLE, 379 DISABLE, 380 }; 381 382 383 /* Display type to identify a suitable connector */ 384 enum struct DRMDisplayType { 385 PERIPHERAL, 386 TV, 387 VIRTUAL, 388 }; 389 390 struct DRMRect { 391 uint32_t left; // Left-most pixel coordinate. 392 uint32_t top; // Top-most pixel coordinate. 393 uint32_t right; // Right-most pixel coordinate. 394 uint32_t bottom; // Bottom-most pixel coordinate. 395 }; 396 397 //------------------------------------------------------------------------ 398 // DRM Info Query Types 399 //------------------------------------------------------------------------ 400 401 enum struct QSEEDVersion { 402 V1, 403 V2, 404 V3, 405 }; 406 407 /* QSEED3 Step version */ 408 enum struct QSEEDStepVersion { 409 V2, 410 V3, 411 V4, 412 }; 413 414 enum struct SmartDMARevision { 415 V1, 416 V2, 417 }; 418 419 /* Per CRTC Resource Info*/ 420 struct DRMCrtcInfo { 421 bool has_src_split; 422 bool has_hdr; 423 uint32_t max_blend_stages; 424 uint32_t max_solidfill_stages; 425 QSEEDVersion qseed_version; 426 SmartDMARevision smart_dma_rev; 427 float ib_fudge_factor; 428 float clk_fudge_factor; 429 uint32_t dest_scale_prefill_lines; 430 uint32_t undersized_prefill_lines; 431 uint32_t macrotile_prefill_lines; 432 uint32_t nv12_prefill_lines; 433 uint32_t linear_prefill_lines; 434 uint32_t downscale_prefill_lines; 435 uint32_t extra_prefill_lines; 436 uint32_t amortized_threshold; 437 uint64_t max_bandwidth_low; 438 uint64_t max_bandwidth_high; 439 uint32_t max_sde_clk; 440 CompRatioMap comp_ratio_rt_map; 441 CompRatioMap comp_ratio_nrt_map; 442 uint32_t hw_version; 443 uint32_t dest_scaler_count = 0; 444 uint32_t max_dest_scaler_input_width = 0; 445 uint32_t max_dest_scaler_output_width = 0; 446 uint32_t max_dest_scale_up = 1; 447 uint32_t min_prefill_lines = 0; 448 bool concurrent_writeback = false; 449 }; 450 451 enum struct DRMPlaneType { 452 // Has CSC and scaling capability 453 VIG = 0, 454 // Has scaling capability but no CSC 455 RGB, 456 // No scaling support 457 DMA, 458 // Supports a small dimension and doesn't use a CRTC stage 459 CURSOR, 460 MAX, 461 }; 462 463 struct DRMPlaneTypeInfo { 464 DRMPlaneType type; 465 uint32_t master_plane_id; 466 // FourCC format enum and modifier 467 std::vector<std::pair<uint32_t, uint64_t>> formats_supported; 468 uint32_t max_linewidth; 469 uint32_t max_upscale; 470 uint32_t max_downscale; 471 uint32_t max_horizontal_deci; 472 uint32_t max_vertical_deci; 473 uint64_t max_pipe_bandwidth; 474 uint32_t cache_size; // cache size in bytes for inline rotation support. 475 QSEEDStepVersion qseed3_version; 476 bool multirect_prop_present = false; 477 bool block_sec_ui = false; 478 }; 479 480 // All DRM Planes as map<Plane_id , plane_type_info> listed from highest to lowest priority 481 typedef std::vector<std::pair<uint32_t, DRMPlaneTypeInfo>> DRMPlanesInfo; 482 483 enum struct DRMTopology { 484 UNKNOWN, // To be compat with driver defs in sde_rm.h 485 SINGLE_LM, 486 SINGLE_LM_DSC, 487 DUAL_LM, 488 DUAL_LM_DSC, 489 DUAL_LM_MERGE, 490 DUAL_LM_MERGE_DSC, 491 DUAL_LM_DSCMERGE, 492 PPSPLIT, 493 }; 494 495 enum struct DRMPanelMode { 496 VIDEO, 497 COMMAND, 498 }; 499 500 /* Per mode info */ 501 struct DRMModeInfo { 502 drmModeModeInfo mode; 503 DRMTopology topology; 504 // Valid only if mode is command 505 int num_roi; 506 int xstart; 507 int ystart; 508 int walign; 509 int halign; 510 int wmin; 511 int hmin; 512 bool roi_merge; 513 }; 514 515 /* Per Connector Info*/ 516 struct DRMConnectorInfo { 517 uint32_t mmWidth; 518 uint32_t mmHeight; 519 uint32_t type; 520 std::vector<DRMModeInfo> modes; 521 std::string panel_name; 522 DRMPanelMode panel_mode; 523 bool is_primary; 524 // Valid only if DRMPanelMode is VIDEO 525 bool dynamic_fps; 526 // FourCC format enum and modifier 527 std::vector<std::pair<uint32_t, uint64_t>> formats_supported; 528 // Valid only if type is DRM_MODE_CONNECTOR_VIRTUAL 529 uint32_t max_linewidth; 530 DRMRotation panel_orientation; 531 drm_panel_hdr_properties panel_hdr_prop; 532 uint32_t transfer_time_us; 533 drm_msm_ext_hdr_properties ext_hdr_prop; 534 }; 535 536 /* Identifier token for a display */ 537 struct DRMDisplayToken { 538 uint32_t conn_id; 539 uint32_t crtc_id; 540 uint32_t crtc_index; 541 }; 542 543 enum DRMPPFeatureID { 544 kFeaturePcc, 545 kFeatureIgc, 546 kFeaturePgc, 547 kFeatureMixerGc, 548 kFeaturePaV2, 549 kFeatureDither, 550 kFeatureGamut, 551 kFeaturePADither, 552 kFeaturePAHsic, 553 kFeaturePASixZone, 554 kFeaturePAMemColSkin, 555 kFeaturePAMemColSky, 556 kFeaturePAMemColFoliage, 557 kFeaturePAMemColProt, 558 kPPFeaturesMax, 559 }; 560 561 enum DRMPPPropType { 562 kPropEnum, 563 kPropRange, 564 kPropBlob, 565 kPropTypeMax, 566 }; 567 568 struct DRMPPFeatureInfo { 569 DRMPPFeatureID id; 570 DRMPPPropType type; 571 uint32_t version; 572 uint32_t payload_size; 573 void *payload; 574 uint32_t object_type; 575 }; 576 577 enum DRMCscType { 578 kCscYuv2Rgb601L, 579 kCscYuv2Rgb601FR, 580 kCscYuv2Rgb709L, 581 kCscYuv2Rgb2020L, 582 kCscYuv2Rgb2020FR, 583 kCscTypeMax, 584 }; 585 586 struct DRMScalerLUTInfo { 587 uint32_t dir_lut_size = 0; 588 uint32_t cir_lut_size = 0; 589 uint32_t sep_lut_size = 0; 590 uint64_t dir_lut = 0; 591 uint64_t cir_lut = 0; 592 uint64_t sep_lut = 0; 593 }; 594 595 enum struct DRMSecureMode { 596 NON_SECURE, 597 SECURE, 598 NON_SECURE_DIR_TRANSLATION, 599 SECURE_DIR_TRANSLATION, 600 }; 601 602 enum struct DRMSecurityLevel { 603 SECURE_NON_SECURE, 604 SECURE_ONLY, 605 }; 606 607 enum struct DRMMultiRectMode { 608 NONE = 0, 609 PARALLEL = 1, 610 SERIAL = 2, 611 }; 612 613 enum struct DRMCWbCaptureMode { 614 MIXER_OUT = 0, 615 DSPP_OUT = 1, 616 }; 617 618 struct DRMSolidfillStage { 619 DRMRect bounding_rect {}; 620 bool is_exclusion_rect = false; 621 uint32_t color = 0xff000000; // in 8bit argb 622 uint32_t red = 0; 623 uint32_t blue = 0; 624 uint32_t green = 0; 625 uint32_t alpha = 0xff; 626 uint32_t color_bit_depth = 0; 627 uint32_t z_order = 0; 628 uint32_t plane_alpha = 0xff; 629 }; 630 631 /* DRM Atomic Request Property Set. 632 * 633 * Helper class to create and populate atomic properties of DRM components 634 * when rendered in DRM atomic mode */ 635 class DRMAtomicReqInterface { 636 public: ~DRMAtomicReqInterface()637 virtual ~DRMAtomicReqInterface() {} 638 /* Perform request operation. 639 * 640 * [input]: opcode: operation code from DRMOps list. 641 * var_arg: arguments for DRMOps's can differ in number and 642 * data type. Refer above DRMOps to details. 643 * [return]: Error code if the API fails, 0 on success. 644 */ 645 virtual int Perform(DRMOps opcode, ...) = 0; 646 647 /* 648 * Commit the params set via Perform(). Also resets the properties after commit. Needs to be 649 * called every frame. 650 * [input]: synchronous: Determines if the call should block until a h/w flip 651 * [input]: retain_planes: Retains already staged planes. Useful when not explicitly programming 652 * planes but still need the previously staged ones to not be unstaged 653 * [return]: Error code if the API fails, 0 on success. 654 */ 655 virtual int Commit(bool synchronous, bool retain_planes) = 0; 656 /* 657 * Validate the params set via Perform(). 658 * [return]: Error code if the API fails, 0 on success. 659 */ 660 virtual int Validate() = 0; 661 }; 662 663 class DRMManagerInterface; 664 665 /* Populates a singleton instance of DRMManager */ 666 typedef int (*GetDRMManager)(int fd, DRMManagerInterface **intf); 667 668 /* Destroy DRMManager instance */ 669 typedef int (*DestroyDRMManager)(); 670 671 /* 672 * DRM Manager Interface - Any class which plans to implement helper function for vendor 673 * specific DRM driver implementation must implement the below interface routines to work 674 * with SDM. 675 */ 676 677 class DRMManagerInterface { 678 public: ~DRMManagerInterface()679 virtual ~DRMManagerInterface() {} 680 681 /* 682 * Since SDM completely manages the planes. GetPlanesInfo will provide all 683 * the plane information. 684 * [output]: DRMPlanesInfo: Resource Info for planes. 685 */ 686 virtual void GetPlanesInfo(DRMPlanesInfo *info) = 0; 687 688 /* 689 * Will provide all the information of a selected crtc. 690 * [input]: Use crtc id 0 to obtain system wide info 691 * [output]: DRMCrtcInfo: Resource Info for the given CRTC id. 692 */ 693 virtual void GetCrtcInfo(uint32_t crtc_id, DRMCrtcInfo *info) = 0; 694 695 /* 696 * Will provide all the information of a selected connector. 697 * [output]: DRMConnectorInfo: Resource Info for the given connector id 698 */ 699 virtual void GetConnectorInfo(uint32_t conn_id, DRMConnectorInfo *info) = 0; 700 701 /* 702 * Will query post propcessing feature info of a CRTC. 703 * [output]: DRMPPFeatureInfo: CRTC post processing feature info 704 */ 705 virtual void GetCrtcPPInfo(uint32_t crtc_id, DRMPPFeatureInfo *info) = 0; 706 /* 707 * Register a logical display to receive a token. 708 * Each display pipeline in DRM is identified by its CRTC and Connector(s). 709 * On display connect(bootup or hotplug), clients should invoke this interface to 710 * establish the pipeline for the display and should get a DisplayToken 711 * populated with crtc and connnector(s) id's. Here onwards, Client should 712 * use this token to represent the display for any Perform operations if 713 * needed. 714 * 715 * [input]: disp_type - Peripheral / TV / Virtual 716 * [output]: DRMDisplayToken - CRTC and Connector id's for the display 717 * [return]: 0 on success, a negative error value otherwise 718 */ 719 virtual int RegisterDisplay(DRMDisplayType disp_type, DRMDisplayToken *tok) = 0; 720 721 /* Client should invoke this interface on display disconnect. 722 * [input]: DRMDisplayToken - identifier for the display. 723 */ 724 virtual void UnregisterDisplay(const DRMDisplayToken &token) = 0; 725 726 /* 727 * Creates and returns an instance of DRMAtomicReqInterface corresponding to a display token 728 * returned as part of RegisterDisplay API. Needs to be called per display. 729 * [input]: DRMDisplayToken that identifies a display pipeline 730 * [output]: Pointer to an instance of DRMAtomicReqInterface. 731 * [return]: Error code if the API fails, 0 on success. 732 */ 733 virtual int CreateAtomicReq(const DRMDisplayToken &token, DRMAtomicReqInterface **intf) = 0; 734 735 /* 736 * Destroys the instance of DRMAtomicReqInterface 737 * [input]: Pointer to a DRMAtomicReqInterface 738 * [return]: Error code if the API fails, 0 on success. 739 */ 740 virtual int DestroyAtomicReq(DRMAtomicReqInterface *intf) = 0; 741 /* 742 * Sets the global scaler LUT 743 * [input]: LUT Info 744 * [return]: Error code if the API fails, 0 on success. 745 */ 746 virtual int SetScalerLUT(const DRMScalerLUTInfo &lut_info) = 0; 747 }; 748 749 } // namespace sde_drm 750 #endif // __DRM_INTERFACE_H__ 751