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1 /* -*- mode: C; c-file-style: "k&r"; tab-width 4; indent-tabs-mode: t; -*- */
2 
3 /*
4  * Copyright (C) 2014 Rob Clark <robclark@freedesktop.org>
5  *
6  * Permission is hereby granted, free of charge, to any person obtaining a
7  * copy of this software and associated documentation files (the "Software"),
8  * to deal in the Software without restriction, including without limitation
9  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10  * and/or sell copies of the Software, and to permit persons to whom the
11  * Software is furnished to do so, subject to the following conditions:
12  *
13  * The above copyright notice and this permission notice (including the next
14  * paragraph) shall be included in all copies or substantial portions of the
15  * Software.
16  *
17  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
20  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
22  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
23  * SOFTWARE.
24  *
25  * Authors:
26  *    Rob Clark <robclark@freedesktop.org>
27  */
28 
29 #ifndef FD4_DRAW_H_
30 #define FD4_DRAW_H_
31 
32 #include "pipe/p_context.h"
33 
34 #include "freedreno_draw.h"
35 
36 void fd4_draw_init(struct pipe_context *pctx);
37 
38 /* draw packet changed on a4xx, so cannot reuse one from a2xx/a3xx.. */
39 
DRAW4(enum pc_di_primtype prim_type,enum pc_di_src_sel source_select,enum a4xx_index_size index_size,enum pc_di_vis_cull_mode vis_cull_mode)40 static inline uint32_t DRAW4(enum pc_di_primtype prim_type,
41 		enum pc_di_src_sel source_select, enum a4xx_index_size index_size,
42 		enum pc_di_vis_cull_mode vis_cull_mode)
43 {
44 	return CP_DRAW_INDX_OFFSET_0_PRIM_TYPE(prim_type) |
45 			CP_DRAW_INDX_OFFSET_0_SOURCE_SELECT(source_select) |
46 			CP_DRAW_INDX_OFFSET_0_INDEX_SIZE(index_size) |
47 			CP_DRAW_INDX_OFFSET_0_VIS_CULL(vis_cull_mode);
48 }
49 
50 static inline void
fd4_draw(struct fd_batch * batch,struct fd_ringbuffer * ring,enum pc_di_primtype primtype,enum pc_di_vis_cull_mode vismode,enum pc_di_src_sel src_sel,uint32_t count,uint32_t instances,enum a4xx_index_size idx_type,uint32_t idx_size,uint32_t idx_offset,struct pipe_resource * idx_buffer)51 fd4_draw(struct fd_batch *batch, struct fd_ringbuffer *ring,
52 		enum pc_di_primtype primtype,
53 		enum pc_di_vis_cull_mode vismode,
54 		enum pc_di_src_sel src_sel, uint32_t count,
55 		uint32_t instances, enum a4xx_index_size idx_type,
56 		uint32_t idx_size, uint32_t idx_offset,
57 		struct pipe_resource *idx_buffer)
58 {
59 	/* for debug after a lock up, write a unique counter value
60 	 * to scratch7 for each draw, to make it easier to match up
61 	 * register dumps to cmdstream.  The combination of IB
62 	 * (scratch6) and DRAW is enough to "triangulate" the
63 	 * particular draw that caused lockup.
64 	 */
65 	emit_marker(ring, 7);
66 
67 	OUT_PKT3(ring, CP_DRAW_INDX_OFFSET, idx_buffer ? 6 : 3);
68 	if (vismode == USE_VISIBILITY) {
69 		/* leave vis mode blank for now, it will be patched up when
70 		 * we know if we are binning or not
71 		 */
72 		OUT_RINGP(ring, DRAW4(primtype, src_sel, idx_type, 0),
73 				&batch->draw_patches);
74 	} else {
75 		OUT_RING(ring, DRAW4(primtype, src_sel, idx_type, vismode));
76 	}
77 	OUT_RING(ring, instances);         /* NumInstances */
78 	OUT_RING(ring, count);             /* NumIndices */
79 	if (idx_buffer) {
80 		OUT_RING(ring, 0x0);           /* XXX */
81 		OUT_RELOC(ring, fd_resource(idx_buffer)->bo, idx_offset, 0, 0);
82 		OUT_RING (ring, idx_size);
83 	}
84 
85 	emit_marker(ring, 7);
86 
87 	fd_reset_wfi(batch);
88 }
89 
90 static inline enum a4xx_index_size
fd4_size2indextype(unsigned index_size)91 fd4_size2indextype(unsigned index_size)
92 {
93 	switch (index_size) {
94 	case 1: return INDEX4_SIZE_8_BIT;
95 	case 2: return INDEX4_SIZE_16_BIT;
96 	case 4: return INDEX4_SIZE_32_BIT;
97 	}
98 	DBG("unsupported index size: %d", index_size);
99 	assert(0);
100 	return INDEX4_SIZE_32_BIT;
101 }
102 
103 static inline void
fd4_draw_emit(struct fd_batch * batch,struct fd_ringbuffer * ring,enum pc_di_primtype primtype,enum pc_di_vis_cull_mode vismode,const struct pipe_draw_info * info,unsigned index_offset)104 fd4_draw_emit(struct fd_batch *batch, struct fd_ringbuffer *ring,
105 		enum pc_di_primtype primtype,
106 		enum pc_di_vis_cull_mode vismode,
107 		const struct pipe_draw_info *info,
108 		unsigned index_offset)
109 {
110 	struct pipe_resource *idx_buffer = NULL;
111 	enum a4xx_index_size idx_type;
112 	enum pc_di_src_sel src_sel;
113 	uint32_t idx_size, idx_offset;
114 
115 	if (info->indirect) {
116 		struct fd_resource *ind = fd_resource(info->indirect->buffer);
117 
118 		emit_marker(ring, 7);
119 
120 		if (info->index_size) {
121 			struct pipe_resource *idx = info->index.resource;
122 
123 			OUT_PKT3(ring, CP_DRAW_INDX_INDIRECT, 4);
124 			OUT_RINGP(ring, DRAW4(primtype, DI_SRC_SEL_DMA,
125 					fd4_size2indextype(info->index_size), 0),
126 					&batch->draw_patches);
127 			OUT_RELOC(ring, fd_resource(idx)->bo, index_offset, 0, 0);
128 			OUT_RING(ring, A4XX_CP_DRAW_INDX_INDIRECT_2_INDX_SIZE(
129 							 idx->width0 - index_offset));
130 			OUT_RELOC(ring, ind->bo, info->indirect->offset, 0, 0);
131 		} else {
132 			OUT_PKT3(ring, CP_DRAW_INDIRECT, 2);
133 			OUT_RINGP(ring, DRAW4(primtype, DI_SRC_SEL_AUTO_INDEX, 0, 0),
134 					&batch->draw_patches);
135 			OUT_RELOC(ring, ind->bo, info->indirect->offset, 0, 0);
136 		}
137 
138 		emit_marker(ring, 7);
139 		fd_reset_wfi(batch);
140 
141 		return;
142 	}
143 
144 	if (info->index_size) {
145 		assert(!info->has_user_indices);
146 
147 		idx_buffer = info->index.resource;
148 		idx_type = fd4_size2indextype(info->index_size);
149 		idx_size = info->index_size * info->count;
150 		idx_offset = index_offset + info->start * info->index_size;
151 		src_sel = DI_SRC_SEL_DMA;
152 	} else {
153 		idx_buffer = NULL;
154 		idx_type = INDEX4_SIZE_32_BIT;
155 		idx_size = 0;
156 		idx_offset = 0;
157 		src_sel = DI_SRC_SEL_AUTO_INDEX;
158 	}
159 
160 	fd4_draw(batch, ring, primtype, vismode, src_sel,
161 			info->count, info->instance_count,
162 			idx_type, idx_size, idx_offset, idx_buffer);
163 }
164 
165 #endif /* FD4_DRAW_H_ */
166