1 /* 2 * Copyright (c) 2017, ARM Limited and Contributors. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 #ifndef __EP_INFO_H__ 8 #define __EP_INFO_H__ 9 10 #include <param_header.h> 11 #include <utils_def.h> 12 13 #define SECURE U(0x0) 14 #define NON_SECURE U(0x1) 15 #define sec_state_is_valid(s) (((s) == SECURE) || ((s) == NON_SECURE)) 16 17 /******************************************************************************* 18 * Constants that allow assembler code to access members of and the 19 * 'entry_point_info' structure at their correct offsets. 20 ******************************************************************************/ 21 #define ENTRY_POINT_INFO_PC_OFFSET U(0x08) 22 #ifdef AARCH32 23 #define ENTRY_POINT_INFO_ARGS_OFFSET U(0x10) 24 #else 25 #define ENTRY_POINT_INFO_ARGS_OFFSET U(0x18) 26 #endif 27 28 /* The following are used to set/get image attributes. */ 29 #define PARAM_EP_SECURITY_MASK U(0x1) 30 31 #define GET_SECURITY_STATE(x) (x & PARAM_EP_SECURITY_MASK) 32 #define SET_SECURITY_STATE(x, security) \ 33 ((x) = ((x) & ~PARAM_EP_SECURITY_MASK) | (security)) 34 35 #define EP_EE_MASK U(0x2) 36 #define EP_EE_SHIFT 1 37 #define EP_EE_LITTLE U(0x0) 38 #define EP_EE_BIG U(0x2) 39 #define EP_GET_EE(x) (x & EP_EE_MASK) 40 #define EP_SET_EE(x, ee) ((x) = ((x) & ~EP_EE_MASK) | (ee)) 41 42 #define EP_ST_MASK U(0x4) 43 #define EP_ST_DISABLE U(0x0) 44 #define EP_ST_ENABLE U(0x4) 45 #define EP_GET_ST(x) (x & EP_ST_MASK) 46 #define EP_SET_ST(x, ee) ((x) = ((x) & ~EP_ST_MASK) | (ee)) 47 48 #define EP_EXE_MASK U(0x8) 49 #define NON_EXECUTABLE U(0x0) 50 #define EXECUTABLE U(0x8) 51 #define EP_GET_EXE(x) (x & EP_EXE_MASK) 52 #define EP_SET_EXE(x, ee) ((x) = ((x) & ~EP_EXE_MASK) | (ee)) 53 54 #define EP_FIRST_EXE_MASK U(0x10) 55 #define EP_FIRST_EXE U(0x10) 56 #define EP_GET_FIRST_EXE(x) ((x) & EP_FIRST_EXE_MASK) 57 #define EP_SET_FIRST_EXE(x, ee) ((x) = ((x) & ~EP_FIRST_EXE_MASK) | (ee)) 58 59 #ifndef __ASSEMBLY__ 60 61 #include <cassert.h> 62 #include <types.h> 63 64 typedef struct aapcs64_params { 65 u_register_t arg0; 66 u_register_t arg1; 67 u_register_t arg2; 68 u_register_t arg3; 69 u_register_t arg4; 70 u_register_t arg5; 71 u_register_t arg6; 72 u_register_t arg7; 73 } aapcs64_params_t; 74 75 typedef struct aapcs32_params { 76 u_register_t arg0; 77 u_register_t arg1; 78 u_register_t arg2; 79 u_register_t arg3; 80 } aapcs32_params_t; 81 82 /***************************************************************************** 83 * This structure represents the superset of information needed while 84 * switching exception levels. The only two mechanisms to do so are 85 * ERET & SMC. Security state is indicated using bit zero of header 86 * attribute 87 * NOTE: BL1 expects entrypoint followed by spsr at an offset from the start 88 * of this structure defined by the macro `ENTRY_POINT_INFO_PC_OFFSET` while 89 * processing SMC to jump to BL31. 90 *****************************************************************************/ 91 typedef struct entry_point_info { 92 param_header_t h; 93 uintptr_t pc; 94 uint32_t spsr; 95 #ifdef AARCH32 96 aapcs32_params_t args; 97 #else 98 aapcs64_params_t args; 99 #endif 100 } entry_point_info_t; 101 102 /* 103 * Compile time assertions related to the 'entry_point_info' structure to 104 * ensure that the assembler and the compiler view of the offsets of 105 * the structure members is the same. 106 */ 107 CASSERT(ENTRY_POINT_INFO_PC_OFFSET == 108 __builtin_offsetof(entry_point_info_t, pc), \ 109 assert_BL31_pc_offset_mismatch); 110 111 CASSERT(ENTRY_POINT_INFO_ARGS_OFFSET == \ 112 __builtin_offsetof(entry_point_info_t, args), \ 113 assert_BL31_args_offset_mismatch); 114 115 CASSERT(sizeof(uintptr_t) == 116 __builtin_offsetof(entry_point_info_t, spsr) - \ 117 __builtin_offsetof(entry_point_info_t, pc), \ 118 assert_entrypoint_and_spsr_should_be_adjacent); 119 120 #endif /*__ASSEMBLY__*/ 121 122 #endif /* __EP_INFO_H__ */ 123 124