| /external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/ |
| D | MachineOutliner.cpp | 143 unsigned *EndIdx = nullptr; member
309 unsigned EndIdx, unsigned Edge) { in insertInternalNode()
376 unsigned extend(unsigned EndIdx, unsigned SuffixesToAdd) { in extend()
929 unsigned EndIdx = StartIdx + StringLen - 1; in findCandidates() local
|
| D | PostRASchedulerList.cpp | 161 void setEndIndex(unsigned EndIdx) { EndIndex = EndIdx; } in setEndIndex()
|
| D | StackColoring.cpp | 868 SlotIndex EndIdx = Indexes->getMBBEndIdx(&MBB); in calculateLiveIntervals() local
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/DebugInfo/DWARF/ |
| D | DWARFUnit.cpp | 581 for (size_t I = getDIEIndex(Die) + 1, EndIdx = DieArray.size(); I < EndIdx; in getSibling() local
624 for (size_t I = getDIEIndex(Die) + 1, EndIdx = DieArray.size(); I < EndIdx; in getLastChild() local
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/GlobalISel/ |
| D | RegisterBankInfo.cpp | 179 for (unsigned OpIdx = 0, EndIdx = MI.getNumOperands(); OpIdx != EndIdx; in getInstrMappingImpl() local
409 EndIdx = OpdMapper.getInstrMapping().getNumOperands(); in applyDefaultMapping() local
|
| /external/swiftshader/third_party/llvm-7.0/llvm/utils/TableGen/ |
| D | CodeGenRegisters.cpp | 1768 for (unsigned SubIdx = 0, EndIdx = RegUnitSets.size(); in pruneUnitSets() local
1859 for (unsigned Idx = 0, EndIdx = RegUnitSets.size(); Idx != EndIdx; ++Idx) { in computeRegUnitSets() local
2042 for (unsigned Idx = 0, EndIdx = RegUnitSets.size(); Idx != EndIdx; ++Idx) in computeDerivedInfo() local
2047 for (unsigned Idx = 0, EndIdx = RegUnitSets.size(); Idx != EndIdx; ++Idx) in computeDerivedInfo() local
2055 for (unsigned Idx = 0, EndIdx = RegUnitSets.size(); Idx != EndIdx; ++Idx) { in computeDerivedInfo() local
|
| D | SubtargetEmitter.cpp | 1156 for (unsigned UseIdx = 0, EndIdx = Reads.size(); in GenSchedClassTables() local
|
| /external/llvm/utils/TableGen/ |
| D | CodeGenRegisters.cpp | 1565 for (unsigned SubIdx = 0, EndIdx = RegUnitSets.size(); in pruneUnitSets() local
1659 for (unsigned Idx = 0, EndIdx = RegUnitSets.size(); Idx != EndIdx; ++Idx) { in computeRegUnitSets() local
1843 for (unsigned Idx = 0, EndIdx = RegUnitSets.size(); Idx != EndIdx; ++Idx) in computeDerivedInfo() local
1848 for (unsigned Idx = 0, EndIdx = RegUnitSets.size(); Idx != EndIdx; ++Idx) in computeDerivedInfo() local
1856 for (unsigned Idx = 0, EndIdx = RegUnitSets.size(); Idx != EndIdx; ++Idx) { in computeDerivedInfo() local
|
| D | SubtargetEmitter.cpp | 959 for (unsigned UseIdx = 0, EndIdx = Reads.size(); in GenSchedClassTables() local
|
| /external/llvm/lib/CodeGen/ |
| D | PostRASchedulerList.cpp | 161 void setEndIndex(unsigned EndIdx) { EndIndex = EndIdx; } in setEndIndex()
|
| /external/llvm/lib/CodeGen/GlobalISel/ |
| D | RegisterBankInfo.cpp | 338 for (unsigned OpIdx = 0, EndIdx = MI.getNumOperands(); OpIdx != EndIdx; in applyDefaultMapping() local
|
| /external/llvm/lib/Target/AArch64/ |
| D | AArch64ExpandPseudoInsts.cpp | 302 int EndIdx = NotSet; in trySequenceOfOnes() local
|
| D | AArch64InstrInfo.cpp | 756 for (unsigned OpIdx = 0, EndIdx = Instr.getNumOperands(); OpIdx < EndIdx; in UpdateOperandRegClass() local
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/ |
| D | AArch64ExpandPseudoInsts.cpp | 272 int EndIdx = NotSet; in trySequenceOfOnes() local
|
| D | AArch64InstrInfo.cpp | 1183 for (unsigned OpIdx = 0, EndIdx = Instr.getNumOperands(); OpIdx < EndIdx; in UpdateOperandRegClass() local
|
| /external/llvm/lib/Transforms/InstCombine/ |
| D | InstCombineVectorOps.cpp | 910 unsigned EndIdx = Mask.back(); in isShuffleExtractingFromLHS() local
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Transforms/InstCombine/ |
| D | InstCombineVectorOps.cpp | 1134 unsigned EndIdx = Mask.back(); in isShuffleExtractingFromLHS() local
|
| /external/swiftshader/third_party/LLVM/lib/CodeGen/ |
| D | LiveIntervalAnalysis.cpp | 2146 SlotIndex EndIdx = Index.getNextIndex().getBaseIndex(); in spillPhysRegAroundRegDefsUses() local
|
| /external/llvm/lib/Target/PowerPC/ |
| D | PPCISelDAGToDAG.cpp | 862 unsigned StartIdx, EndIdx; member
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/PowerPC/ |
| D | PPCISelDAGToDAG.cpp | 1119 unsigned StartIdx, EndIdx; member
|
| /external/llvm/lib/Target/X86/ |
| D | X86ISelLowering.cpp | 8594 int EndIdx = in lowerVectorShuffleAsBroadcast() local
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/ |
| D | X86ISelLowering.cpp | 10945 int EndIdx = in lowerVectorShuffleAsBroadcast() local
|