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1 // Copyright 2015 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file.
4 
5 #ifndef V8_WASM_WASM_OPCODES_H_
6 #define V8_WASM_WASM_OPCODES_H_
7 
8 #include "src/globals.h"
9 #include "src/vector.h"
10 #include "src/wasm/value-type.h"
11 #include "src/wasm/wasm-constants.h"
12 
13 namespace v8 {
14 namespace internal {
15 
16 template <typename T>
17 class Signature;
18 
19 namespace wasm {
20 
21 using FunctionSig = Signature<ValueType>;
22 std::ostream& operator<<(std::ostream& os, const FunctionSig& function);
23 bool IsJSCompatibleSignature(const FunctionSig* sig);
24 
25 using WasmName = Vector<const char>;
26 
27 // Control expressions and blocks.
28 #define FOREACH_CONTROL_OPCODE(V)         \
29   V(Unreachable, 0x00, _)                 \
30   V(Nop, 0x01, _)                         \
31   V(Block, 0x02, _)                       \
32   V(Loop, 0x03, _)                        \
33   V(If, 0x004, _)                         \
34   V(Else, 0x05, _)                        \
35   V(Try, 0x06, _ /* eh_prototype */)      \
36   V(Catch, 0x07, _ /* eh_prototype */)    \
37   V(Throw, 0x08, _ /* eh_prototype */)    \
38   V(Rethrow, 0x09, _ /* eh_prototype */)  \
39   V(CatchAll, 0x0a, _ /* eh prototype */) \
40   V(End, 0x0b, _)                         \
41   V(Br, 0x0c, _)                          \
42   V(BrIf, 0x0d, _)                        \
43   V(BrTable, 0x0e, _)                     \
44   V(Return, 0x0f, _)
45 
46 // Constants, locals, globals, and calls.
47 #define FOREACH_MISC_OPCODE(V) \
48   V(CallFunction, 0x10, _)     \
49   V(CallIndirect, 0x11, _)     \
50   V(Drop, 0x1a, _)             \
51   V(Select, 0x1b, _)           \
52   V(GetLocal, 0x20, _)         \
53   V(SetLocal, 0x21, _)         \
54   V(TeeLocal, 0x22, _)         \
55   V(GetGlobal, 0x23, _)        \
56   V(SetGlobal, 0x24, _)        \
57   V(I32Const, 0x41, _)         \
58   V(I64Const, 0x42, _)         \
59   V(F32Const, 0x43, _)         \
60   V(F64Const, 0x44, _)         \
61   V(RefNull, 0xd0, _)
62 
63 // Load memory expressions.
64 #define FOREACH_LOAD_MEM_OPCODE(V) \
65   V(I32LoadMem, 0x28, i_i)         \
66   V(I64LoadMem, 0x29, l_i)         \
67   V(F32LoadMem, 0x2a, f_i)         \
68   V(F64LoadMem, 0x2b, d_i)         \
69   V(I32LoadMem8S, 0x2c, i_i)       \
70   V(I32LoadMem8U, 0x2d, i_i)       \
71   V(I32LoadMem16S, 0x2e, i_i)      \
72   V(I32LoadMem16U, 0x2f, i_i)      \
73   V(I64LoadMem8S, 0x30, l_i)       \
74   V(I64LoadMem8U, 0x31, l_i)       \
75   V(I64LoadMem16S, 0x32, l_i)      \
76   V(I64LoadMem16U, 0x33, l_i)      \
77   V(I64LoadMem32S, 0x34, l_i)      \
78   V(I64LoadMem32U, 0x35, l_i)
79 
80 // Store memory expressions.
81 #define FOREACH_STORE_MEM_OPCODE(V) \
82   V(I32StoreMem, 0x36, v_ii)        \
83   V(I64StoreMem, 0x37, v_il)        \
84   V(F32StoreMem, 0x38, v_if)        \
85   V(F64StoreMem, 0x39, v_id)        \
86   V(I32StoreMem8, 0x3a, v_ii)       \
87   V(I32StoreMem16, 0x3b, v_ii)      \
88   V(I64StoreMem8, 0x3c, v_il)       \
89   V(I64StoreMem16, 0x3d, v_il)      \
90   V(I64StoreMem32, 0x3e, v_il)
91 
92 // Miscellaneous memory expressions
93 #define FOREACH_MISC_MEM_OPCODE(V) \
94   V(MemorySize, 0x3f, i_v)         \
95   V(GrowMemory, 0x40, i_i)
96 
97 // Expressions with signatures.
98 #define FOREACH_SIMPLE_OPCODE(V)  \
99   V(I32Eqz, 0x45, i_i)            \
100   V(I32Eq, 0x46, i_ii)            \
101   V(I32Ne, 0x47, i_ii)            \
102   V(I32LtS, 0x48, i_ii)           \
103   V(I32LtU, 0x49, i_ii)           \
104   V(I32GtS, 0x4a, i_ii)           \
105   V(I32GtU, 0x4b, i_ii)           \
106   V(I32LeS, 0x4c, i_ii)           \
107   V(I32LeU, 0x4d, i_ii)           \
108   V(I32GeS, 0x4e, i_ii)           \
109   V(I32GeU, 0x4f, i_ii)           \
110   V(I64Eqz, 0x50, i_l)            \
111   V(I64Eq, 0x51, i_ll)            \
112   V(I64Ne, 0x52, i_ll)            \
113   V(I64LtS, 0x53, i_ll)           \
114   V(I64LtU, 0x54, i_ll)           \
115   V(I64GtS, 0x55, i_ll)           \
116   V(I64GtU, 0x56, i_ll)           \
117   V(I64LeS, 0x57, i_ll)           \
118   V(I64LeU, 0x58, i_ll)           \
119   V(I64GeS, 0x59, i_ll)           \
120   V(I64GeU, 0x5a, i_ll)           \
121   V(F32Eq, 0x5b, i_ff)            \
122   V(F32Ne, 0x5c, i_ff)            \
123   V(F32Lt, 0x5d, i_ff)            \
124   V(F32Gt, 0x5e, i_ff)            \
125   V(F32Le, 0x5f, i_ff)            \
126   V(F32Ge, 0x60, i_ff)            \
127   V(F64Eq, 0x61, i_dd)            \
128   V(F64Ne, 0x62, i_dd)            \
129   V(F64Lt, 0x63, i_dd)            \
130   V(F64Gt, 0x64, i_dd)            \
131   V(F64Le, 0x65, i_dd)            \
132   V(F64Ge, 0x66, i_dd)            \
133   V(I32Clz, 0x67, i_i)            \
134   V(I32Ctz, 0x68, i_i)            \
135   V(I32Popcnt, 0x69, i_i)         \
136   V(I32Add, 0x6a, i_ii)           \
137   V(I32Sub, 0x6b, i_ii)           \
138   V(I32Mul, 0x6c, i_ii)           \
139   V(I32DivS, 0x6d, i_ii)          \
140   V(I32DivU, 0x6e, i_ii)          \
141   V(I32RemS, 0x6f, i_ii)          \
142   V(I32RemU, 0x70, i_ii)          \
143   V(I32And, 0x71, i_ii)           \
144   V(I32Ior, 0x72, i_ii)           \
145   V(I32Xor, 0x73, i_ii)           \
146   V(I32Shl, 0x74, i_ii)           \
147   V(I32ShrS, 0x75, i_ii)          \
148   V(I32ShrU, 0x76, i_ii)          \
149   V(I32Rol, 0x77, i_ii)           \
150   V(I32Ror, 0x78, i_ii)           \
151   V(I64Clz, 0x79, l_l)            \
152   V(I64Ctz, 0x7a, l_l)            \
153   V(I64Popcnt, 0x7b, l_l)         \
154   V(I64Add, 0x7c, l_ll)           \
155   V(I64Sub, 0x7d, l_ll)           \
156   V(I64Mul, 0x7e, l_ll)           \
157   V(I64DivS, 0x7f, l_ll)          \
158   V(I64DivU, 0x80, l_ll)          \
159   V(I64RemS, 0x81, l_ll)          \
160   V(I64RemU, 0x82, l_ll)          \
161   V(I64And, 0x83, l_ll)           \
162   V(I64Ior, 0x84, l_ll)           \
163   V(I64Xor, 0x85, l_ll)           \
164   V(I64Shl, 0x86, l_ll)           \
165   V(I64ShrS, 0x87, l_ll)          \
166   V(I64ShrU, 0x88, l_ll)          \
167   V(I64Rol, 0x89, l_ll)           \
168   V(I64Ror, 0x8a, l_ll)           \
169   V(F32Abs, 0x8b, f_f)            \
170   V(F32Neg, 0x8c, f_f)            \
171   V(F32Ceil, 0x8d, f_f)           \
172   V(F32Floor, 0x8e, f_f)          \
173   V(F32Trunc, 0x8f, f_f)          \
174   V(F32NearestInt, 0x90, f_f)     \
175   V(F32Sqrt, 0x91, f_f)           \
176   V(F32Add, 0x92, f_ff)           \
177   V(F32Sub, 0x93, f_ff)           \
178   V(F32Mul, 0x94, f_ff)           \
179   V(F32Div, 0x95, f_ff)           \
180   V(F32Min, 0x96, f_ff)           \
181   V(F32Max, 0x97, f_ff)           \
182   V(F32CopySign, 0x98, f_ff)      \
183   V(F64Abs, 0x99, d_d)            \
184   V(F64Neg, 0x9a, d_d)            \
185   V(F64Ceil, 0x9b, d_d)           \
186   V(F64Floor, 0x9c, d_d)          \
187   V(F64Trunc, 0x9d, d_d)          \
188   V(F64NearestInt, 0x9e, d_d)     \
189   V(F64Sqrt, 0x9f, d_d)           \
190   V(F64Add, 0xa0, d_dd)           \
191   V(F64Sub, 0xa1, d_dd)           \
192   V(F64Mul, 0xa2, d_dd)           \
193   V(F64Div, 0xa3, d_dd)           \
194   V(F64Min, 0xa4, d_dd)           \
195   V(F64Max, 0xa5, d_dd)           \
196   V(F64CopySign, 0xa6, d_dd)      \
197   V(I32ConvertI64, 0xa7, i_l)     \
198   V(I32SConvertF32, 0xa8, i_f)    \
199   V(I32UConvertF32, 0xa9, i_f)    \
200   V(I32SConvertF64, 0xaa, i_d)    \
201   V(I32UConvertF64, 0xab, i_d)    \
202   V(I64SConvertI32, 0xac, l_i)    \
203   V(I64UConvertI32, 0xad, l_i)    \
204   V(I64SConvertF32, 0xae, l_f)    \
205   V(I64UConvertF32, 0xaf, l_f)    \
206   V(I64SConvertF64, 0xb0, l_d)    \
207   V(I64UConvertF64, 0xb1, l_d)    \
208   V(F32SConvertI32, 0xb2, f_i)    \
209   V(F32UConvertI32, 0xb3, f_i)    \
210   V(F32SConvertI64, 0xb4, f_l)    \
211   V(F32UConvertI64, 0xb5, f_l)    \
212   V(F32ConvertF64, 0xb6, f_d)     \
213   V(F64SConvertI32, 0xb7, d_i)    \
214   V(F64UConvertI32, 0xb8, d_i)    \
215   V(F64SConvertI64, 0xb9, d_l)    \
216   V(F64UConvertI64, 0xba, d_l)    \
217   V(F64ConvertF32, 0xbb, d_f)     \
218   V(I32ReinterpretF32, 0xbc, i_f) \
219   V(I64ReinterpretF64, 0xbd, l_d) \
220   V(F32ReinterpretI32, 0xbe, f_i) \
221   V(F64ReinterpretI64, 0xbf, d_l)
222 
223 #define FOREACH_SIMPLE_PROTOTYPE_OPCODE(V) \
224   V(I32SExtendI8, 0xc0, i_i)               \
225   V(I32SExtendI16, 0xc1, i_i)              \
226   V(I64SExtendI8, 0xc2, l_l)               \
227   V(I64SExtendI16, 0xc3, l_l)              \
228   V(I64SExtendI32, 0xc4, l_l)              \
229   V(RefIsNull, 0xd1, i_r)
230 
231 // For compatibility with Asm.js.
232 #define FOREACH_ASMJS_COMPAT_OPCODE(V) \
233   V(F64Acos, 0xc5, d_d)                \
234   V(F64Asin, 0xc6, d_d)                \
235   V(F64Atan, 0xc7, d_d)                \
236   V(F64Cos, 0xc8, d_d)                 \
237   V(F64Sin, 0xc9, d_d)                 \
238   V(F64Tan, 0xca, d_d)                 \
239   V(F64Exp, 0xcb, d_d)                 \
240   V(F64Log, 0xcc, d_d)                 \
241   V(F64Atan2, 0xcd, d_dd)              \
242   V(F64Pow, 0xce, d_dd)                \
243   V(F64Mod, 0xcf, d_dd)                \
244   V(I32AsmjsDivS, 0xd3, i_ii)          \
245   V(I32AsmjsDivU, 0xd4, i_ii)          \
246   V(I32AsmjsRemS, 0xd5, i_ii)          \
247   V(I32AsmjsRemU, 0xd6, i_ii)          \
248   V(I32AsmjsLoadMem8S, 0xd7, i_i)      \
249   V(I32AsmjsLoadMem8U, 0xd8, i_i)      \
250   V(I32AsmjsLoadMem16S, 0xd9, i_i)     \
251   V(I32AsmjsLoadMem16U, 0xda, i_i)     \
252   V(I32AsmjsLoadMem, 0xdb, i_i)        \
253   V(F32AsmjsLoadMem, 0xdc, f_i)        \
254   V(F64AsmjsLoadMem, 0xdd, d_i)        \
255   V(I32AsmjsStoreMem8, 0xde, i_ii)     \
256   V(I32AsmjsStoreMem16, 0xdf, i_ii)    \
257   V(I32AsmjsStoreMem, 0xe0, i_ii)      \
258   V(F32AsmjsStoreMem, 0xe1, f_if)      \
259   V(F64AsmjsStoreMem, 0xe2, d_id)      \
260   V(I32AsmjsSConvertF32, 0xe3, i_f)    \
261   V(I32AsmjsUConvertF32, 0xe4, i_f)    \
262   V(I32AsmjsSConvertF64, 0xe5, i_d)    \
263   V(I32AsmjsUConvertF64, 0xe6, i_d)
264 
265 #define FOREACH_SIMD_0_OPERAND_OPCODE(V) \
266   V(F32x4Splat, 0xfd00, s_f)             \
267   V(F32x4Abs, 0xfd03, s_s)               \
268   V(F32x4Neg, 0xfd04, s_s)               \
269   V(F32x4RecipApprox, 0xfd06, s_s)       \
270   V(F32x4RecipSqrtApprox, 0xfd07, s_s)   \
271   V(F32x4Add, 0xfd08, s_ss)              \
272   V(F32x4AddHoriz, 0xfdb9, s_ss)         \
273   V(F32x4Sub, 0xfd09, s_ss)              \
274   V(F32x4Mul, 0xfd0a, s_ss)              \
275   V(F32x4Min, 0xfd0c, s_ss)              \
276   V(F32x4Max, 0xfd0d, s_ss)              \
277   V(F32x4Eq, 0xfd10, s_ss)               \
278   V(F32x4Ne, 0xfd11, s_ss)               \
279   V(F32x4Lt, 0xfd12, s_ss)               \
280   V(F32x4Le, 0xfd13, s_ss)               \
281   V(F32x4Gt, 0xfd14, s_ss)               \
282   V(F32x4Ge, 0xfd15, s_ss)               \
283   V(F32x4SConvertI32x4, 0xfd19, s_s)     \
284   V(F32x4UConvertI32x4, 0xfd1a, s_s)     \
285   V(I32x4Splat, 0xfd1b, s_i)             \
286   V(I32x4Neg, 0xfd1e, s_s)               \
287   V(I32x4Add, 0xfd1f, s_ss)              \
288   V(I32x4AddHoriz, 0xfdba, s_ss)         \
289   V(I32x4Sub, 0xfd20, s_ss)              \
290   V(I32x4Mul, 0xfd21, s_ss)              \
291   V(I32x4MinS, 0xfd22, s_ss)             \
292   V(I32x4MaxS, 0xfd23, s_ss)             \
293   V(I32x4Eq, 0xfd26, s_ss)               \
294   V(I32x4Ne, 0xfd27, s_ss)               \
295   V(I32x4LtS, 0xfd28, s_ss)              \
296   V(I32x4LeS, 0xfd29, s_ss)              \
297   V(I32x4GtS, 0xfd2a, s_ss)              \
298   V(I32x4GeS, 0xfd2b, s_ss)              \
299   V(I32x4SConvertF32x4, 0xfd2f, s_s)     \
300   V(I32x4UConvertF32x4, 0xfd37, s_s)     \
301   V(I32x4SConvertI16x8Low, 0xfd94, s_s)  \
302   V(I32x4SConvertI16x8High, 0xfd95, s_s) \
303   V(I32x4UConvertI16x8Low, 0xfd96, s_s)  \
304   V(I32x4UConvertI16x8High, 0xfd97, s_s) \
305   V(I32x4MinU, 0xfd30, s_ss)             \
306   V(I32x4MaxU, 0xfd31, s_ss)             \
307   V(I32x4LtU, 0xfd33, s_ss)              \
308   V(I32x4LeU, 0xfd34, s_ss)              \
309   V(I32x4GtU, 0xfd35, s_ss)              \
310   V(I32x4GeU, 0xfd36, s_ss)              \
311   V(I16x8Splat, 0xfd38, s_i)             \
312   V(I16x8Neg, 0xfd3b, s_s)               \
313   V(I16x8Add, 0xfd3c, s_ss)              \
314   V(I16x8AddSaturateS, 0xfd3d, s_ss)     \
315   V(I16x8AddHoriz, 0xfdbb, s_ss)         \
316   V(I16x8Sub, 0xfd3e, s_ss)              \
317   V(I16x8SubSaturateS, 0xfd3f, s_ss)     \
318   V(I16x8Mul, 0xfd40, s_ss)              \
319   V(I16x8MinS, 0xfd41, s_ss)             \
320   V(I16x8MaxS, 0xfd42, s_ss)             \
321   V(I16x8Eq, 0xfd45, s_ss)               \
322   V(I16x8Ne, 0xfd46, s_ss)               \
323   V(I16x8LtS, 0xfd47, s_ss)              \
324   V(I16x8LeS, 0xfd48, s_ss)              \
325   V(I16x8GtS, 0xfd49, s_ss)              \
326   V(I16x8GeS, 0xfd4a, s_ss)              \
327   V(I16x8AddSaturateU, 0xfd4e, s_ss)     \
328   V(I16x8SubSaturateU, 0xfd4f, s_ss)     \
329   V(I16x8MinU, 0xfd50, s_ss)             \
330   V(I16x8MaxU, 0xfd51, s_ss)             \
331   V(I16x8LtU, 0xfd53, s_ss)              \
332   V(I16x8LeU, 0xfd54, s_ss)              \
333   V(I16x8GtU, 0xfd55, s_ss)              \
334   V(I16x8GeU, 0xfd56, s_ss)              \
335   V(I16x8SConvertI32x4, 0xfd98, s_ss)    \
336   V(I16x8UConvertI32x4, 0xfd99, s_ss)    \
337   V(I16x8SConvertI8x16Low, 0xfd9a, s_s)  \
338   V(I16x8SConvertI8x16High, 0xfd9b, s_s) \
339   V(I16x8UConvertI8x16Low, 0xfd9c, s_s)  \
340   V(I16x8UConvertI8x16High, 0xfd9d, s_s) \
341   V(I8x16Splat, 0xfd57, s_i)             \
342   V(I8x16Neg, 0xfd5a, s_s)               \
343   V(I8x16Add, 0xfd5b, s_ss)              \
344   V(I8x16AddSaturateS, 0xfd5c, s_ss)     \
345   V(I8x16Sub, 0xfd5d, s_ss)              \
346   V(I8x16SubSaturateS, 0xfd5e, s_ss)     \
347   V(I8x16Mul, 0xfd5f, s_ss)              \
348   V(I8x16MinS, 0xfd60, s_ss)             \
349   V(I8x16MaxS, 0xfd61, s_ss)             \
350   V(I8x16Eq, 0xfd64, s_ss)               \
351   V(I8x16Ne, 0xfd65, s_ss)               \
352   V(I8x16LtS, 0xfd66, s_ss)              \
353   V(I8x16LeS, 0xfd67, s_ss)              \
354   V(I8x16GtS, 0xfd68, s_ss)              \
355   V(I8x16GeS, 0xfd69, s_ss)              \
356   V(I8x16AddSaturateU, 0xfd6d, s_ss)     \
357   V(I8x16SubSaturateU, 0xfd6e, s_ss)     \
358   V(I8x16MinU, 0xfd6f, s_ss)             \
359   V(I8x16MaxU, 0xfd70, s_ss)             \
360   V(I8x16LtU, 0xfd72, s_ss)              \
361   V(I8x16LeU, 0xfd73, s_ss)              \
362   V(I8x16GtU, 0xfd74, s_ss)              \
363   V(I8x16GeU, 0xfd75, s_ss)              \
364   V(I8x16SConvertI16x8, 0xfd9e, s_ss)    \
365   V(I8x16UConvertI16x8, 0xfd9f, s_ss)    \
366   V(S128And, 0xfd76, s_ss)               \
367   V(S128Or, 0xfd77, s_ss)                \
368   V(S128Xor, 0xfd78, s_ss)               \
369   V(S128Not, 0xfd79, s_s)                \
370   V(S128Select, 0xfd2c, s_sss)           \
371   V(S1x4AnyTrue, 0xfd84, i_s)            \
372   V(S1x4AllTrue, 0xfd85, i_s)            \
373   V(S1x8AnyTrue, 0xfd8a, i_s)            \
374   V(S1x8AllTrue, 0xfd8b, i_s)            \
375   V(S1x16AnyTrue, 0xfd90, i_s)           \
376   V(S1x16AllTrue, 0xfd91, i_s)
377 
378 #define FOREACH_SIMD_1_OPERAND_1_PARAM_OPCODE(V) \
379   V(F32x4ExtractLane, 0xfd01, _)                 \
380   V(I32x4ExtractLane, 0xfd1c, _)                 \
381   V(I32x4Shl, 0xfd24, _)                         \
382   V(I32x4ShrS, 0xfd25, _)                        \
383   V(I32x4ShrU, 0xfd32, _)                        \
384   V(I16x8ExtractLane, 0xfd39, _)                 \
385   V(I16x8Shl, 0xfd43, _)                         \
386   V(I16x8ShrS, 0xfd44, _)                        \
387   V(I16x8ShrU, 0xfd52, _)                        \
388   V(I8x16ExtractLane, 0xfd58, _)                 \
389   V(I8x16Shl, 0xfd62, _)                         \
390   V(I8x16ShrS, 0xfd63, _)                        \
391   V(I8x16ShrU, 0xfd71, _)
392 
393 #define FOREACH_SIMD_1_OPERAND_2_PARAM_OPCODE(V) \
394   V(F32x4ReplaceLane, 0xfd02, _)                 \
395   V(I32x4ReplaceLane, 0xfd1d, _)                 \
396   V(I16x8ReplaceLane, 0xfd3a, _)                 \
397   V(I8x16ReplaceLane, 0xfd59, _)
398 
399 #define FOREACH_SIMD_1_OPERAND_OPCODE(V)   \
400   FOREACH_SIMD_1_OPERAND_1_PARAM_OPCODE(V) \
401   FOREACH_SIMD_1_OPERAND_2_PARAM_OPCODE(V)
402 
403 #define FOREACH_SIMD_MASK_OPERAND_OPCODE(V) V(S8x16Shuffle, 0xfd6b, s_ss)
404 
405 #define FOREACH_SIMD_MEM_OPCODE(V) \
406   V(S128LoadMem, 0xfd80, s_i)      \
407   V(S128StoreMem, 0xfd81, v_is)
408 
409 #define FOREACH_NUMERIC_OPCODE(V)   \
410   V(I32SConvertSatF32, 0xfc00, i_f) \
411   V(I32UConvertSatF32, 0xfc01, i_f) \
412   V(I32SConvertSatF64, 0xfc02, i_d) \
413   V(I32UConvertSatF64, 0xfc03, i_d) \
414   V(I64SConvertSatF32, 0xfc04, l_f) \
415   V(I64UConvertSatF32, 0xfc05, l_f) \
416   V(I64SConvertSatF64, 0xfc06, l_d) \
417   V(I64UConvertSatF64, 0xfc07, l_d)
418 
419 #define FOREACH_ATOMIC_OPCODE(V)                \
420   V(I32AtomicLoad, 0xfe10, i_i)                 \
421   V(I64AtomicLoad, 0xfe11, l_i)                 \
422   V(I32AtomicLoad8U, 0xfe12, i_i)               \
423   V(I32AtomicLoad16U, 0xfe13, i_i)              \
424   V(I64AtomicLoad8U, 0xfe14, l_i)               \
425   V(I64AtomicLoad16U, 0xfe15, l_i)              \
426   V(I64AtomicLoad32U, 0xfe16, l_i)              \
427   V(I32AtomicStore, 0xfe17, v_ii)               \
428   V(I64AtomicStore, 0xfe18, v_il)               \
429   V(I32AtomicStore8U, 0xfe19, v_ii)             \
430   V(I32AtomicStore16U, 0xfe1a, v_ii)            \
431   V(I64AtomicStore8U, 0xfe1b, v_il)             \
432   V(I64AtomicStore16U, 0xfe1c, v_il)            \
433   V(I64AtomicStore32U, 0xfe1d, v_il)            \
434   V(I32AtomicAdd, 0xfe1e, i_ii)                 \
435   V(I64AtomicAdd, 0xfe1f, l_il)                 \
436   V(I32AtomicAdd8U, 0xfe20, i_ii)               \
437   V(I32AtomicAdd16U, 0xfe21, i_ii)              \
438   V(I64AtomicAdd8U, 0xfe22, l_il)               \
439   V(I64AtomicAdd16U, 0xfe23, l_il)              \
440   V(I64AtomicAdd32U, 0xfe24, l_il)              \
441   V(I32AtomicSub, 0xfe25, i_ii)                 \
442   V(I64AtomicSub, 0xfe26, l_il)                 \
443   V(I32AtomicSub8U, 0xfe27, i_ii)               \
444   V(I32AtomicSub16U, 0xfe28, i_ii)              \
445   V(I64AtomicSub8U, 0xfe29, l_il)               \
446   V(I64AtomicSub16U, 0xfe2a, l_il)              \
447   V(I64AtomicSub32U, 0xfe2b, l_il)              \
448   V(I32AtomicAnd, 0xfe2c, i_ii)                 \
449   V(I64AtomicAnd, 0xfe2d, l_il)                 \
450   V(I32AtomicAnd8U, 0xfe2e, i_ii)               \
451   V(I32AtomicAnd16U, 0xfe2f, i_ii)              \
452   V(I64AtomicAnd8U, 0xfe30, l_il)               \
453   V(I64AtomicAnd16U, 0xfe31, l_il)              \
454   V(I64AtomicAnd32U, 0xfe32, l_il)              \
455   V(I32AtomicOr, 0xfe33, i_ii)                  \
456   V(I64AtomicOr, 0xfe34, l_il)                  \
457   V(I32AtomicOr8U, 0xfe35, i_ii)                \
458   V(I32AtomicOr16U, 0xfe36, i_ii)               \
459   V(I64AtomicOr8U, 0xfe37, l_il)                \
460   V(I64AtomicOr16U, 0xfe38, l_il)               \
461   V(I64AtomicOr32U, 0xfe39, l_il)               \
462   V(I32AtomicXor, 0xfe3a, i_ii)                 \
463   V(I64AtomicXor, 0xfe3b, l_il)                 \
464   V(I32AtomicXor8U, 0xfe3c, i_ii)               \
465   V(I32AtomicXor16U, 0xfe3d, i_ii)              \
466   V(I64AtomicXor8U, 0xfe3e, l_il)               \
467   V(I64AtomicXor16U, 0xfe3f, l_il)              \
468   V(I64AtomicXor32U, 0xfe40, l_il)              \
469   V(I32AtomicExchange, 0xfe41, i_ii)            \
470   V(I64AtomicExchange, 0xfe42, l_il)            \
471   V(I32AtomicExchange8U, 0xfe43, i_ii)          \
472   V(I32AtomicExchange16U, 0xfe44, i_ii)         \
473   V(I64AtomicExchange8U, 0xfe45, l_il)          \
474   V(I64AtomicExchange16U, 0xfe46, l_il)         \
475   V(I64AtomicExchange32U, 0xfe47, l_il)         \
476   V(I32AtomicCompareExchange, 0xfe48, i_iii)    \
477   V(I64AtomicCompareExchange, 0xfe49, l_ill)    \
478   V(I32AtomicCompareExchange8U, 0xfe4a, i_iii)  \
479   V(I32AtomicCompareExchange16U, 0xfe4b, i_iii) \
480   V(I64AtomicCompareExchange8U, 0xfe4c, l_ill)  \
481   V(I64AtomicCompareExchange16U, 0xfe4d, l_ill) \
482   V(I64AtomicCompareExchange32U, 0xfe4e, l_ill)
483 
484 // All opcodes.
485 #define FOREACH_OPCODE(V)             \
486   FOREACH_CONTROL_OPCODE(V)           \
487   FOREACH_MISC_OPCODE(V)              \
488   FOREACH_SIMPLE_OPCODE(V)            \
489   FOREACH_SIMPLE_PROTOTYPE_OPCODE(V)  \
490   FOREACH_STORE_MEM_OPCODE(V)         \
491   FOREACH_LOAD_MEM_OPCODE(V)          \
492   FOREACH_MISC_MEM_OPCODE(V)          \
493   FOREACH_ASMJS_COMPAT_OPCODE(V)      \
494   FOREACH_SIMD_0_OPERAND_OPCODE(V)    \
495   FOREACH_SIMD_1_OPERAND_OPCODE(V)    \
496   FOREACH_SIMD_MASK_OPERAND_OPCODE(V) \
497   FOREACH_SIMD_MEM_OPCODE(V)          \
498   FOREACH_ATOMIC_OPCODE(V)            \
499   FOREACH_NUMERIC_OPCODE(V)
500 
501 // All signatures.
502 #define FOREACH_SIGNATURE(V)                       \
503   FOREACH_SIMD_SIGNATURE(V)                        \
504   V(i_ii, kWasmI32, kWasmI32, kWasmI32)            \
505   V(i_i, kWasmI32, kWasmI32)                       \
506   V(i_v, kWasmI32)                                 \
507   V(i_ff, kWasmI32, kWasmF32, kWasmF32)            \
508   V(i_f, kWasmI32, kWasmF32)                       \
509   V(i_dd, kWasmI32, kWasmF64, kWasmF64)            \
510   V(i_d, kWasmI32, kWasmF64)                       \
511   V(i_l, kWasmI32, kWasmI64)                       \
512   V(l_ll, kWasmI64, kWasmI64, kWasmI64)            \
513   V(i_ll, kWasmI32, kWasmI64, kWasmI64)            \
514   V(l_l, kWasmI64, kWasmI64)                       \
515   V(l_i, kWasmI64, kWasmI32)                       \
516   V(l_f, kWasmI64, kWasmF32)                       \
517   V(l_d, kWasmI64, kWasmF64)                       \
518   V(f_ff, kWasmF32, kWasmF32, kWasmF32)            \
519   V(f_f, kWasmF32, kWasmF32)                       \
520   V(f_d, kWasmF32, kWasmF64)                       \
521   V(f_i, kWasmF32, kWasmI32)                       \
522   V(f_l, kWasmF32, kWasmI64)                       \
523   V(d_dd, kWasmF64, kWasmF64, kWasmF64)            \
524   V(d_d, kWasmF64, kWasmF64)                       \
525   V(d_f, kWasmF64, kWasmF32)                       \
526   V(d_i, kWasmF64, kWasmI32)                       \
527   V(d_l, kWasmF64, kWasmI64)                       \
528   V(v_ii, kWasmStmt, kWasmI32, kWasmI32)           \
529   V(v_id, kWasmStmt, kWasmI32, kWasmF64)           \
530   V(d_id, kWasmF64, kWasmI32, kWasmF64)            \
531   V(v_if, kWasmStmt, kWasmI32, kWasmF32)           \
532   V(f_if, kWasmF32, kWasmI32, kWasmF32)            \
533   V(v_il, kWasmStmt, kWasmI32, kWasmI64)           \
534   V(l_il, kWasmI64, kWasmI32, kWasmI64)            \
535   V(i_iii, kWasmI32, kWasmI32, kWasmI32, kWasmI32) \
536   V(l_ill, kWasmI64, kWasmI32, kWasmI64, kWasmI64) \
537   V(i_r, kWasmI32, kWasmAnyRef)
538 
539 #define FOREACH_SIMD_SIGNATURE(V)          \
540   V(s_s, kWasmS128, kWasmS128)             \
541   V(s_f, kWasmS128, kWasmF32)              \
542   V(s_ss, kWasmS128, kWasmS128, kWasmS128) \
543   V(s_i, kWasmS128, kWasmI32)              \
544   V(s_si, kWasmS128, kWasmS128, kWasmI32)  \
545   V(i_s, kWasmI32, kWasmS128)              \
546   V(v_is, kWasmStmt, kWasmI32, kWasmS128)  \
547   V(s_sss, kWasmS128, kWasmS128, kWasmS128, kWasmS128)
548 
549 #define FOREACH_PREFIX(V) \
550   V(Numeric, 0xfc)        \
551   V(Simd, 0xfd)           \
552   V(Atomic, 0xfe)
553 
554 enum WasmOpcode {
555 // Declare expression opcodes.
556 #define DECLARE_NAMED_ENUM(name, opcode, sig) kExpr##name = opcode,
557   FOREACH_OPCODE(DECLARE_NAMED_ENUM)
558 #undef DECLARE_NAMED_ENUM
559 #define DECLARE_PREFIX(name, opcode) k##name##Prefix = opcode,
560       FOREACH_PREFIX(DECLARE_PREFIX)
561 #undef DECLARE_PREFIX
562 };
563 
564 enum TrapReason {
565 #define DECLARE_ENUM(name) k##name,
566   FOREACH_WASM_TRAPREASON(DECLARE_ENUM)
567   kTrapCount
568 #undef DECLARE_ENUM
569 };
570 
571 extern const std::array<const FunctionSig*, 256> kSimpleOpcodeSigs;
572 
573 // A collection of opcode-related static methods.
574 class V8_EXPORT_PRIVATE WasmOpcodes {
575  public:
576   static const char* OpcodeName(WasmOpcode opcode);
577   static FunctionSig* Signature(WasmOpcode opcode);
578   static FunctionSig* AsmjsSignature(WasmOpcode opcode);
579   static bool IsPrefixOpcode(WasmOpcode opcode);
580   static bool IsControlOpcode(WasmOpcode opcode);
581   static bool IsSignExtensionOpcode(WasmOpcode opcode);
582   static bool IsAnyRefOpcode(WasmOpcode opcode);
583   // Check whether the given opcode always jumps, i.e. all instructions after
584   // this one in the current block are dead. Returns false for |end|.
585   static bool IsUnconditionalJump(WasmOpcode opcode);
586 
587   static int TrapReasonToMessageId(TrapReason reason);
588   static const char* TrapReasonMessage(TrapReason reason);
589 };
590 
591 // Representation of an initializer expression.
592 struct WasmInitExpr {
593   enum WasmInitKind {
594     kNone,
595     kGlobalIndex,
596     kI32Const,
597     kI64Const,
598     kF32Const,
599     kF64Const,
600     kAnyRefConst,
601   } kind;
602 
603   union {
604     int32_t i32_const;
605     int64_t i64_const;
606     float f32_const;
607     double f64_const;
608     uint32_t global_index;
609   } val;
610 
WasmInitExprWasmInitExpr611   WasmInitExpr() : kind(kNone) {}
WasmInitExprWasmInitExpr612   explicit WasmInitExpr(int32_t v) : kind(kI32Const) { val.i32_const = v; }
WasmInitExprWasmInitExpr613   explicit WasmInitExpr(int64_t v) : kind(kI64Const) { val.i64_const = v; }
WasmInitExprWasmInitExpr614   explicit WasmInitExpr(float v) : kind(kF32Const) { val.f32_const = v; }
WasmInitExprWasmInitExpr615   explicit WasmInitExpr(double v) : kind(kF64Const) { val.f64_const = v; }
WasmInitExprWasmInitExpr616   WasmInitExpr(WasmInitKind kind, uint32_t global_index) : kind(kGlobalIndex) {
617     val.global_index = global_index;
618   }
619 };
620 
621 }  // namespace wasm
622 }  // namespace internal
623 }  // namespace v8
624 
625 #endif  // V8_WASM_WASM_OPCODES_H_
626