• Home
  • Line#
  • Scopes#
  • Navigate#
  • Raw
  • Download
1 /* SPDX-License-Identifier: BSD-3-Clause */
2 /*
3  * From Coreboot soc/intel/broadwell/include/soc/iomap.h
4  *
5  * Copyright (C) 2016 Google Inc.
6  */
7 
8 #ifndef __asm_arch_iomap_h
9 #define __asm_arch_iomap_h
10 
11 #define MCFG_BASE_ADDRESS	0xf0000000
12 #define MCFG_BASE_SIZE		0x4000000
13 
14 #define HPET_BASE_ADDRESS	0xfed00000
15 
16 #define MCH_BASE_ADDRESS	0xfed10000
17 #define MCH_BASE_SIZE		0x8000
18 
19 #define DMI_BASE_ADDRESS	0xfed18000
20 #define DMI_BASE_SIZE		0x1000
21 
22 #define EP_BASE_ADDRESS		0xfed19000
23 #define EP_BASE_SIZE		0x1000
24 
25 #define EDRAM_BASE_ADDRESS	0xfed80000
26 #define EDRAM_BASE_SIZE		0x4000
27 
28 #define GDXC_BASE_ADDRESS	0xfed84000
29 #define GDXC_BASE_SIZE		0x1000
30 
31 #define RCBA_BASE_ADDRESS	0xfed1c000
32 #define RCBA_BASE_SIZE		0x4000
33 
34 #define HPET_BASE_ADDRESS	0xfed00000
35 
36 #define ACPI_BASE_ADDRESS	0x1000
37 #define ACPI_BASE_SIZE		0x100
38 
39 #define GPIO_BASE_ADDRESS	0x1400
40 #define GPIO_BASE_SIZE		0x400
41 
42 #define SMBUS_BASE_ADDRESS	0x0400
43 #define SMBUS_BASE_SIZE		0x10
44 
45 /* Temporary addresses used before relocation */
46 #define EARLY_GTT_BAR		0xe0000000
47 #define EARLY_XHCI_BAR		0xd7000000
48 #define EARLY_EHCI_BAR		0xd8000000
49 #define EARLY_UART_BAR		0x3f8
50 #define EARLY_TEMP_MMIO		0xfed08000
51 
52 #endif
53