| /external/llvm/lib/Target/PowerPC/ |
| D | PPCTLSDynamicCall.cpp | 72 unsigned InReg = MI->getOperand(1).getReg(); in processBlock() local
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/PowerPC/ |
| D | PPCTLSDynamicCall.cpp | 83 unsigned InReg = MI.getOperand(1).getReg(); in processBlock() local
|
| /external/swiftshader/third_party/LLVM/include/llvm/ |
| D | Attributes.h | 40 const Attributes InReg = 1<<3; ///< Force argument to be passed in register variable
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| /external/swiftshader/third_party/LLVM/include/llvm/Target/ |
| D | TargetCallingConv.h | 27 static const uint64_t InReg = 1ULL<<2; ///< Passed in register member
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| /external/llvm/include/llvm/Target/ |
| D | TargetCallingConv.h | 32 static const uint64_t InReg = 1ULL<<2; ///< Passed in register member
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| /external/clang/include/clang/CodeGen/ |
| D | CGFunctionInfo.h | 96 bool InReg : 1; // isDirect() || isExtend() || isIndirect() variable
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/WebAssembly/ |
| D | WebAssemblyISelLowering.cpp | 207 unsigned InReg = MI.getOperand(1).getReg(); in LowerFPToInt() local
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| /external/swiftshader/third_party/LLVM/lib/CodeGen/ |
| D | VirtRegRewriter.cpp | 1808 unsigned InReg = Spills.getSpillSlotOrReMatPhysReg(SSorRMId); in InsertRestores() local
2359 if (unsigned InReg = Spills.getSpillSlotOrReMatPhysReg(SS)) { in RewriteMBB() local
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| /external/clang/lib/CodeGen/ |
| D | TargetInfo.cpp | 1430 bool &InReg, in shouldAggregateUseDirect()
1523 bool InReg; in classifyArgumentType() local
1572 bool InReg = shouldPrimitiveUseInReg(Ty, State); in classifyArgumentType() local
6852 bool InReg = shouldUseInReg(Ty, State); in classifyArgumentType() local
7012 bool InReg; member
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| /external/swiftshader/third_party/LLVM/lib/CodeGen/SelectionDAG/ |
| D | SelectionDAGBuilder.cpp | 984 unsigned InReg = It->second; in getValue() local
1122 unsigned InReg = FuncInfo.InitializeRegForValue(Inst); in getValueImpl() local
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Hexagon/ |
| D | HexagonISelLowering.cpp | 727 bool InReg = VA.isRegLoc() && in LowerFormalArguments() local
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/ |
| D | AMDGPUMachineCFGStructurizer.cpp | 2737 unsigned InReg = LRegion->getBBSelectRegIn(); in structurizeComplexRegion() local
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| /external/llvm/lib/CodeGen/SelectionDAG/ |
| D | SelectionDAGBuilder.cpp | 1041 unsigned InReg = It->second; in getCopyFromRegs() local
1231 unsigned InReg = FuncInfo.InitializeRegForValue(Inst); in getValueImpl() local
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/SelectionDAG/ |
| D | SelectionDAGBuilder.cpp | 1178 unsigned InReg = It->second; in getCopyFromRegs() local
1369 unsigned InReg = FuncInfo.InitializeRegForValue(Inst); in getValueImpl() local
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| /external/swiftshader/third_party/subzero/src/ |
| D | IceTargetLoweringMIPS32.cpp | 3390 bool InReg = false; in lowerCall() local
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| D | IceTargetLoweringARM32.cpp | 3718 bool InReg = false; in lowerCall() local
|