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1 /*
2  * Copyright © 2017 Advanced Micro Devices, Inc.
3  * All Rights Reserved.
4  *
5  * Permission is hereby granted, free of charge, to any person obtaining
6  * a copy of this software and associated documentation files (the
7  * "Software"), to deal in the Software without restriction, including
8  * without limitation the rights to use, copy, modify, merge, publish,
9  * distribute, sub license, and/or sell copies of the Software, and to
10  * permit persons to whom the Software is furnished to do so, subject to
11  * the following conditions:
12  *
13  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
14  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
15  * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
16  * NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS, AUTHORS
17  * AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
18  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
20  * USE OR OTHER DEALINGS IN THE SOFTWARE.
21  *
22  * The above copyright notice and this permission notice (including the
23  * next paragraph) shall be included in all copies or substantial portions
24  * of the Software.
25  */
26 
27 /**
28 ************************************************************************************************************************
29 * @file  addrlib2.h
30 * @brief Contains the Addr::V2::Lib class definition.
31 ************************************************************************************************************************
32 */
33 
34 #ifndef __ADDR2_LIB2_H__
35 #define __ADDR2_LIB2_H__
36 
37 #include "addrlib.h"
38 
39 namespace Addr
40 {
41 namespace V2
42 {
43 
44 /**
45 ************************************************************************************************************************
46 * @brief Flags for SwizzleModeTable
47 ************************************************************************************************************************
48 */
49 struct SwizzleModeFlags
50 {
51     // Swizzle mode
52     UINT_32 isLinear        : 1;    // Linear
53 
54     // Block size
55     UINT_32 is256b          : 1;    // Block size is 256B
56     UINT_32 is4kb           : 1;    // Block size is 4KB
57     UINT_32 is64kb          : 1;    // Block size is 64KB
58     UINT_32 isVar           : 1;    // Block size is variable
59 
60     UINT_32 isZ             : 1;    // Z order swizzle mode
61     UINT_32 isStd           : 1;    // Standard swizzle mode
62     UINT_32 isDisp          : 1;    // Display swizzle mode
63     UINT_32 isRot           : 1;    // Rotate swizzle mode
64 
65     // XOR mode
66     UINT_32 isXor           : 1;    // XOR after swizzle if set
67 
68     UINT_32 isT             : 1;    // T mode
69 
70     UINT_32 isRtOpt         : 1;    // mode opt for render target
71 };
72 
73 struct Dim2d
74 {
75     UINT_32 w;
76     UINT_32 h;
77 };
78 
79 struct Dim3d
80 {
81     UINT_32 w;
82     UINT_32 h;
83     UINT_32 d;
84 };
85 
86 /**
87 ************************************************************************************************************************
88 * @brief This class contains asic independent address lib functionalities
89 ************************************************************************************************************************
90 */
91 class Lib : public Addr::Lib
92 {
93 public:
94     virtual ~Lib();
95 
96     static Lib* GetLib(
97         ADDR_HANDLE hLib);
98 
99     //
100     // Interface stubs
101     //
102 
103     // For data surface
104     ADDR_E_RETURNCODE ComputeSurfaceInfo(
105         const ADDR2_COMPUTE_SURFACE_INFO_INPUT* pIn,
106         ADDR2_COMPUTE_SURFACE_INFO_OUTPUT*      pOut) const;
107 
108     ADDR_E_RETURNCODE ComputeSurfaceAddrFromCoord(
109         const ADDR2_COMPUTE_SURFACE_ADDRFROMCOORD_INPUT* pIn,
110         ADDR2_COMPUTE_SURFACE_ADDRFROMCOORD_OUTPUT*      pOut) const;
111 
112     ADDR_E_RETURNCODE ComputeSurfaceCoordFromAddr(
113         const ADDR2_COMPUTE_SURFACE_COORDFROMADDR_INPUT* pIn,
114         ADDR2_COMPUTE_SURFACE_COORDFROMADDR_OUTPUT*      pOut) const;
115 
116     // For HTile
117     ADDR_E_RETURNCODE ComputeHtileInfo(
118         const ADDR2_COMPUTE_HTILE_INFO_INPUT* pIn,
119         ADDR2_COMPUTE_HTILE_INFO_OUTPUT*      pOut) const;
120 
121     ADDR_E_RETURNCODE ComputeHtileAddrFromCoord(
122         const ADDR2_COMPUTE_HTILE_ADDRFROMCOORD_INPUT* pIn,
123         ADDR2_COMPUTE_HTILE_ADDRFROMCOORD_OUTPUT*      pOut);
124 
125     ADDR_E_RETURNCODE ComputeHtileCoordFromAddr(
126         const ADDR2_COMPUTE_HTILE_COORDFROMADDR_INPUT* pIn,
127         ADDR2_COMPUTE_HTILE_COORDFROMADDR_OUTPUT*      pOut);
128 
129     // For CMask
130     ADDR_E_RETURNCODE ComputeCmaskInfo(
131         const ADDR2_COMPUTE_CMASK_INFO_INPUT* pIn,
132         ADDR2_COMPUTE_CMASK_INFO_OUTPUT*      pOut) const;
133 
134     ADDR_E_RETURNCODE ComputeCmaskAddrFromCoord(
135         const ADDR2_COMPUTE_CMASK_ADDRFROMCOORD_INPUT* pIn,
136         ADDR2_COMPUTE_CMASK_ADDRFROMCOORD_OUTPUT*      pOut);
137 
138     ADDR_E_RETURNCODE ComputeCmaskCoordFromAddr(
139         const ADDR2_COMPUTE_CMASK_COORDFROMADDR_INPUT* pIn,
140         ADDR2_COMPUTE_CMASK_COORDFROMADDR_OUTPUT*      pOut) const;
141 
142     // For FMask
143     ADDR_E_RETURNCODE ComputeFmaskInfo(
144         const ADDR2_COMPUTE_FMASK_INFO_INPUT* pIn,
145         ADDR2_COMPUTE_FMASK_INFO_OUTPUT*      pOut);
146 
147     ADDR_E_RETURNCODE ComputeFmaskAddrFromCoord(
148         const ADDR2_COMPUTE_FMASK_ADDRFROMCOORD_INPUT* pIn,
149         ADDR2_COMPUTE_FMASK_ADDRFROMCOORD_OUTPUT*      pOut) const;
150 
151     ADDR_E_RETURNCODE ComputeFmaskCoordFromAddr(
152         const ADDR2_COMPUTE_FMASK_COORDFROMADDR_INPUT* pIn,
153         ADDR2_COMPUTE_FMASK_COORDFROMADDR_OUTPUT*      pOut) const;
154 
155     // For DCC key
156     ADDR_E_RETURNCODE ComputeDccInfo(
157         const ADDR2_COMPUTE_DCCINFO_INPUT* pIn,
158         ADDR2_COMPUTE_DCCINFO_OUTPUT*      pOut) const;
159 
160     ADDR_E_RETURNCODE ComputeDccAddrFromCoord(
161         const ADDR2_COMPUTE_DCC_ADDRFROMCOORD_INPUT* pIn,
162         ADDR2_COMPUTE_DCC_ADDRFROMCOORD_OUTPUT*      pOut);
163 
164     // Misc
165     ADDR_E_RETURNCODE ComputePipeBankXor(
166         const ADDR2_COMPUTE_PIPEBANKXOR_INPUT* pIn,
167         ADDR2_COMPUTE_PIPEBANKXOR_OUTPUT*      pOut);
168 
169     ADDR_E_RETURNCODE ComputeSlicePipeBankXor(
170         const ADDR2_COMPUTE_SLICE_PIPEBANKXOR_INPUT* pIn,
171         ADDR2_COMPUTE_SLICE_PIPEBANKXOR_OUTPUT*      pOut);
172 
173     ADDR_E_RETURNCODE ComputeSubResourceOffsetForSwizzlePattern(
174         const ADDR2_COMPUTE_SUBRESOURCE_OFFSET_FORSWIZZLEPATTERN_INPUT* pIn,
175         ADDR2_COMPUTE_SUBRESOURCE_OFFSET_FORSWIZZLEPATTERN_OUTPUT*      pOut);
176 
177     ADDR_E_RETURNCODE Addr2GetPreferredSurfaceSetting(
178         const ADDR2_GET_PREFERRED_SURF_SETTING_INPUT* pIn,
179         ADDR2_GET_PREFERRED_SURF_SETTING_OUTPUT*      pOut) const;
180 
IsValidDisplaySwizzleMode(const ADDR2_COMPUTE_SURFACE_INFO_INPUT * pIn)181     virtual BOOL_32 IsValidDisplaySwizzleMode(
182         const ADDR2_COMPUTE_SURFACE_INFO_INPUT* pIn) const
183     {
184         ADDR_NOT_IMPLEMENTED();
185         return ADDR_NOTIMPLEMENTED;
186     }
187 
188 protected:
189     Lib();  // Constructor is protected
190     Lib(const Client* pClient);
191 
192     static const UINT_32 MaxNumOfBpp = 5;
193 
194     static const Dim2d Block256_2d[MaxNumOfBpp];
195     static const Dim3d Block1K_3d[MaxNumOfBpp];
196 
197     static const UINT_32 PrtAlignment = 64 * 1024;
198     static const UINT_32 MaxMacroBits = 20;
199 
200     static const UINT_32 MaxMipLevels = 16;
201 
202     // Checking block size
IsBlock256b(AddrSwizzleMode swizzleMode)203     BOOL_32 IsBlock256b(AddrSwizzleMode swizzleMode) const
204     {
205         return m_swizzleModeTable[swizzleMode].is256b;
206     }
207 
IsBlock4kb(AddrSwizzleMode swizzleMode)208     BOOL_32 IsBlock4kb(AddrSwizzleMode swizzleMode) const
209     {
210         return m_swizzleModeTable[swizzleMode].is4kb;
211     }
212 
IsBlock64kb(AddrSwizzleMode swizzleMode)213     BOOL_32 IsBlock64kb(AddrSwizzleMode swizzleMode) const
214     {
215         return m_swizzleModeTable[swizzleMode].is64kb;
216     }
217 
IsBlockVariable(AddrSwizzleMode swizzleMode)218     BOOL_32 IsBlockVariable(AddrSwizzleMode swizzleMode) const
219     {
220         return m_swizzleModeTable[swizzleMode].isVar;
221     }
222 
223     // Checking swizzle mode
IsLinear(AddrSwizzleMode swizzleMode)224     BOOL_32 IsLinear(AddrSwizzleMode swizzleMode) const
225     {
226         return m_swizzleModeTable[swizzleMode].isLinear;
227     }
228 
IsRtOptSwizzle(AddrSwizzleMode swizzleMode)229     BOOL_32 IsRtOptSwizzle(AddrSwizzleMode swizzleMode) const
230     {
231         return m_swizzleModeTable[swizzleMode].isRtOpt;
232     }
233 
IsZOrderSwizzle(AddrSwizzleMode swizzleMode)234     BOOL_32 IsZOrderSwizzle(AddrSwizzleMode swizzleMode) const
235     {
236         return m_swizzleModeTable[swizzleMode].isZ;
237     }
238 
IsStandardSwizzle(AddrResourceType resourceType,AddrSwizzleMode swizzleMode)239     BOOL_32 IsStandardSwizzle(AddrResourceType resourceType, AddrSwizzleMode swizzleMode) const
240     {
241         return HwlIsStandardSwizzle(resourceType, swizzleMode);
242     }
243 
IsDisplaySwizzle(AddrResourceType resourceType,AddrSwizzleMode swizzleMode)244     BOOL_32 IsDisplaySwizzle(AddrResourceType resourceType, AddrSwizzleMode swizzleMode) const
245     {
246         return HwlIsDisplaySwizzle(resourceType, swizzleMode);
247     }
248 
IsRotateSwizzle(AddrSwizzleMode swizzleMode)249     BOOL_32 IsRotateSwizzle(AddrSwizzleMode swizzleMode) const
250     {
251         return m_swizzleModeTable[swizzleMode].isRot;
252     }
253 
IsXor(AddrSwizzleMode swizzleMode)254     BOOL_32 IsXor(AddrSwizzleMode swizzleMode) const
255     {
256         return m_swizzleModeTable[swizzleMode].isXor;
257     }
258 
IsPrt(AddrSwizzleMode swizzleMode)259     BOOL_32 IsPrt(AddrSwizzleMode swizzleMode) const
260     {
261         return m_swizzleModeTable[swizzleMode].isT;
262     }
263 
IsNonPrtXor(AddrSwizzleMode swizzleMode)264     BOOL_32 IsNonPrtXor(AddrSwizzleMode swizzleMode) const
265     {
266         return (IsXor(swizzleMode) && (IsPrt(swizzleMode) == FALSE));
267     }
268 
269     // Checking resource type
IsTex1d(AddrResourceType resourceType)270     static BOOL_32 IsTex1d(AddrResourceType resourceType)
271     {
272         return (resourceType == ADDR_RSRC_TEX_1D);
273     }
274 
IsTex2d(AddrResourceType resourceType)275     static BOOL_32 IsTex2d(AddrResourceType resourceType)
276     {
277         return (resourceType == ADDR_RSRC_TEX_2D);
278     }
279 
IsTex3d(AddrResourceType resourceType)280     static BOOL_32 IsTex3d(AddrResourceType resourceType)
281     {
282         return (resourceType == ADDR_RSRC_TEX_3D);
283     }
284 
IsThick(AddrResourceType resourceType,AddrSwizzleMode swizzleMode)285     BOOL_32 IsThick(AddrResourceType resourceType, AddrSwizzleMode swizzleMode) const
286     {
287         return HwlIsThick(resourceType, swizzleMode);
288     }
289 
IsThin(AddrResourceType resourceType,AddrSwizzleMode swizzleMode)290     BOOL_32 IsThin(AddrResourceType resourceType, AddrSwizzleMode swizzleMode) const
291     {
292         return HwlIsThin(resourceType, swizzleMode);
293     }
294 
GetBlockSizeLog2(AddrSwizzleMode swizzleMode)295     UINT_32 GetBlockSizeLog2(AddrSwizzleMode swizzleMode) const
296     {
297         UINT_32 blockSizeLog2 = 0;
298 
299         if (IsBlock256b(swizzleMode) || IsLinear(swizzleMode))
300         {
301             blockSizeLog2 = 8;
302         }
303         else if (IsBlock4kb(swizzleMode))
304         {
305             blockSizeLog2 = 12;
306         }
307         else if (IsBlock64kb(swizzleMode))
308         {
309             blockSizeLog2 = 16;
310         }
311         else if (IsBlockVariable(swizzleMode))
312         {
313             blockSizeLog2 = m_blockVarSizeLog2;
314         }
315         else
316         {
317             ADDR_ASSERT_ALWAYS();
318         }
319 
320         return blockSizeLog2;
321     }
322 
GetBlockSize(AddrSwizzleMode swizzleMode)323     UINT_32 GetBlockSize(AddrSwizzleMode swizzleMode) const
324     {
325         return (1 << GetBlockSizeLog2(swizzleMode));
326     }
327 
GetFmaskBpp(UINT_32 sample,UINT_32 frag)328     static UINT_32 GetFmaskBpp(UINT_32 sample, UINT_32 frag)
329     {
330         sample = (sample == 0) ? 1 : sample;
331         frag   = (frag   == 0) ? sample : frag;
332 
333         UINT_32 fmaskBpp = QLog2(frag);
334 
335         if (sample > frag)
336         {
337             fmaskBpp++;
338         }
339 
340         if (fmaskBpp == 3)
341         {
342             fmaskBpp = 4;
343         }
344 
345         fmaskBpp = Max(8u, fmaskBpp * sample);
346 
347         return fmaskBpp;
348     }
349 
HwlIsStandardSwizzle(AddrResourceType resourceType,AddrSwizzleMode swizzleMode)350     virtual BOOL_32 HwlIsStandardSwizzle(
351         AddrResourceType resourceType,
352         AddrSwizzleMode  swizzleMode) const
353     {
354         ADDR_NOT_IMPLEMENTED();
355         return FALSE;
356     }
357 
HwlIsDisplaySwizzle(AddrResourceType resourceType,AddrSwizzleMode swizzleMode)358     virtual BOOL_32 HwlIsDisplaySwizzle(
359         AddrResourceType resourceType,
360         AddrSwizzleMode  swizzleMode) const
361     {
362         ADDR_NOT_IMPLEMENTED();
363         return FALSE;
364     }
365 
HwlIsThin(AddrResourceType resourceType,AddrSwizzleMode swizzleMode)366     virtual BOOL_32 HwlIsThin(
367         AddrResourceType resourceType,
368         AddrSwizzleMode  swizzleMode) const
369     {
370         ADDR_NOT_IMPLEMENTED();
371         return FALSE;
372     }
373 
HwlIsThick(AddrResourceType resourceType,AddrSwizzleMode swizzleMode)374     virtual BOOL_32 HwlIsThick(
375         AddrResourceType resourceType,
376         AddrSwizzleMode  swizzleMode) const
377     {
378         ADDR_NOT_IMPLEMENTED();
379         return FALSE;
380     }
381 
HwlComputeHtileInfo(const ADDR2_COMPUTE_HTILE_INFO_INPUT * pIn,ADDR2_COMPUTE_HTILE_INFO_OUTPUT * pOut)382     virtual ADDR_E_RETURNCODE HwlComputeHtileInfo(
383         const ADDR2_COMPUTE_HTILE_INFO_INPUT*    pIn,
384         ADDR2_COMPUTE_HTILE_INFO_OUTPUT*         pOut) const
385     {
386         ADDR_NOT_IMPLEMENTED();
387         return ADDR_NOTSUPPORTED;
388     }
389 
HwlComputeCmaskInfo(const ADDR2_COMPUTE_CMASK_INFO_INPUT * pIn,ADDR2_COMPUTE_CMASK_INFO_OUTPUT * pOut)390     virtual ADDR_E_RETURNCODE HwlComputeCmaskInfo(
391         const ADDR2_COMPUTE_CMASK_INFO_INPUT*    pIn,
392         ADDR2_COMPUTE_CMASK_INFO_OUTPUT*         pOut) const
393     {
394         ADDR_NOT_IMPLEMENTED();
395         return ADDR_NOTSUPPORTED;
396     }
397 
HwlComputeDccInfo(const ADDR2_COMPUTE_DCCINFO_INPUT * pIn,ADDR2_COMPUTE_DCCINFO_OUTPUT * pOut)398     virtual ADDR_E_RETURNCODE HwlComputeDccInfo(
399         const ADDR2_COMPUTE_DCCINFO_INPUT*    pIn,
400         ADDR2_COMPUTE_DCCINFO_OUTPUT*         pOut) const
401     {
402         ADDR_NOT_IMPLEMENTED();
403         return ADDR_NOTSUPPORTED;
404     }
405 
HwlComputeDccAddrFromCoord(const ADDR2_COMPUTE_DCC_ADDRFROMCOORD_INPUT * pIn,ADDR2_COMPUTE_DCC_ADDRFROMCOORD_OUTPUT * pOut)406     virtual ADDR_E_RETURNCODE HwlComputeDccAddrFromCoord(
407         const ADDR2_COMPUTE_DCC_ADDRFROMCOORD_INPUT* pIn,
408         ADDR2_COMPUTE_DCC_ADDRFROMCOORD_OUTPUT*      pOut)
409     {
410         ADDR_NOT_IMPLEMENTED();
411         return ADDR_NOTSUPPORTED;
412     }
413 
HwlComputeCmaskAddrFromCoord(const ADDR2_COMPUTE_CMASK_ADDRFROMCOORD_INPUT * pIn,ADDR2_COMPUTE_CMASK_ADDRFROMCOORD_OUTPUT * pOut)414     virtual ADDR_E_RETURNCODE HwlComputeCmaskAddrFromCoord(
415         const ADDR2_COMPUTE_CMASK_ADDRFROMCOORD_INPUT* pIn,
416         ADDR2_COMPUTE_CMASK_ADDRFROMCOORD_OUTPUT*      pOut)
417     {
418         ADDR_NOT_IMPLEMENTED();
419         return ADDR_NOTSUPPORTED;
420     }
421 
HwlComputeHtileAddrFromCoord(const ADDR2_COMPUTE_HTILE_ADDRFROMCOORD_INPUT * pIn,ADDR2_COMPUTE_HTILE_ADDRFROMCOORD_OUTPUT * pOut)422     virtual ADDR_E_RETURNCODE HwlComputeHtileAddrFromCoord(
423         const ADDR2_COMPUTE_HTILE_ADDRFROMCOORD_INPUT* pIn,
424         ADDR2_COMPUTE_HTILE_ADDRFROMCOORD_OUTPUT*      pOut)
425     {
426         ADDR_NOT_IMPLEMENTED();
427         return ADDR_NOTSUPPORTED;
428     }
429 
HwlComputeHtileCoordFromAddr(const ADDR2_COMPUTE_HTILE_COORDFROMADDR_INPUT * pIn,ADDR2_COMPUTE_HTILE_COORDFROMADDR_OUTPUT * pOut)430     virtual ADDR_E_RETURNCODE HwlComputeHtileCoordFromAddr(
431         const ADDR2_COMPUTE_HTILE_COORDFROMADDR_INPUT* pIn,
432         ADDR2_COMPUTE_HTILE_COORDFROMADDR_OUTPUT*      pOut)
433     {
434         ADDR_NOT_IMPLEMENTED();
435         return ADDR_NOTSUPPORTED;
436     }
437 
HwlComputeBlock256Equation(AddrResourceType rsrcType,AddrSwizzleMode swMode,UINT_32 elementBytesLog2,ADDR_EQUATION * pEquation)438     virtual ADDR_E_RETURNCODE HwlComputeBlock256Equation(
439         AddrResourceType rsrcType,
440         AddrSwizzleMode swMode,
441         UINT_32 elementBytesLog2,
442         ADDR_EQUATION* pEquation) const
443     {
444         ADDR_NOT_IMPLEMENTED();
445         return ADDR_NOTSUPPORTED;
446     }
447 
HwlComputeThinEquation(AddrResourceType rsrcType,AddrSwizzleMode swMode,UINT_32 elementBytesLog2,ADDR_EQUATION * pEquation)448     virtual ADDR_E_RETURNCODE HwlComputeThinEquation(
449         AddrResourceType rsrcType,
450         AddrSwizzleMode swMode,
451         UINT_32 elementBytesLog2,
452         ADDR_EQUATION* pEquation) const
453     {
454         ADDR_NOT_IMPLEMENTED();
455         return ADDR_NOTSUPPORTED;
456     }
457 
HwlComputeThickEquation(AddrResourceType rsrcType,AddrSwizzleMode swMode,UINT_32 elementBytesLog2,ADDR_EQUATION * pEquation)458     virtual ADDR_E_RETURNCODE HwlComputeThickEquation(
459         AddrResourceType rsrcType,
460         AddrSwizzleMode swMode,
461         UINT_32 elementBytesLog2,
462         ADDR_EQUATION* pEquation) const
463     {
464         ADDR_NOT_IMPLEMENTED();
465         return ADDR_NOTSUPPORTED;
466     }
467 
HwlGetEquationIndex(const ADDR2_COMPUTE_SURFACE_INFO_INPUT * pIn,ADDR2_COMPUTE_SURFACE_INFO_OUTPUT * pOut)468     virtual UINT_32 HwlGetEquationIndex(
469         const ADDR2_COMPUTE_SURFACE_INFO_INPUT* pIn,
470         ADDR2_COMPUTE_SURFACE_INFO_OUTPUT*      pOut) const
471     {
472         ADDR_NOT_IMPLEMENTED();
473         return ADDR_INVALID_EQUATION_INDEX;
474     }
475 
GetEquationIndex(const ADDR2_COMPUTE_SURFACE_INFO_INPUT * pIn,ADDR2_COMPUTE_SURFACE_INFO_OUTPUT * pOut)476     UINT_32 GetEquationIndex(
477         const ADDR2_COMPUTE_SURFACE_INFO_INPUT* pIn,
478         ADDR2_COMPUTE_SURFACE_INFO_OUTPUT*      pOut) const
479     {
480         return HwlGetEquationIndex(pIn, pOut);
481     }
482 
HwlComputeSurfaceBaseAlign(AddrSwizzleMode swizzleMode)483     virtual UINT_32 HwlComputeSurfaceBaseAlign(AddrSwizzleMode swizzleMode) const
484     {
485         ADDR_NOT_IMPLEMENTED();
486         return 0;
487     }
488 
HwlComputePipeBankXor(const ADDR2_COMPUTE_PIPEBANKXOR_INPUT * pIn,ADDR2_COMPUTE_PIPEBANKXOR_OUTPUT * pOut)489     virtual ADDR_E_RETURNCODE HwlComputePipeBankXor(
490         const ADDR2_COMPUTE_PIPEBANKXOR_INPUT* pIn,
491         ADDR2_COMPUTE_PIPEBANKXOR_OUTPUT*      pOut) const
492     {
493         ADDR_NOT_IMPLEMENTED();
494         return ADDR_NOTSUPPORTED;
495     }
496 
HwlComputeSlicePipeBankXor(const ADDR2_COMPUTE_SLICE_PIPEBANKXOR_INPUT * pIn,ADDR2_COMPUTE_SLICE_PIPEBANKXOR_OUTPUT * pOut)497     virtual ADDR_E_RETURNCODE HwlComputeSlicePipeBankXor(
498         const ADDR2_COMPUTE_SLICE_PIPEBANKXOR_INPUT* pIn,
499         ADDR2_COMPUTE_SLICE_PIPEBANKXOR_OUTPUT*      pOut) const
500     {
501         ADDR_NOT_IMPLEMENTED();
502         return ADDR_NOTSUPPORTED;
503     }
504 
505 
HwlComputeSubResourceOffsetForSwizzlePattern(const ADDR2_COMPUTE_SUBRESOURCE_OFFSET_FORSWIZZLEPATTERN_INPUT * pIn,ADDR2_COMPUTE_SUBRESOURCE_OFFSET_FORSWIZZLEPATTERN_OUTPUT * pOut)506     virtual ADDR_E_RETURNCODE HwlComputeSubResourceOffsetForSwizzlePattern(
507         const ADDR2_COMPUTE_SUBRESOURCE_OFFSET_FORSWIZZLEPATTERN_INPUT* pIn,
508         ADDR2_COMPUTE_SUBRESOURCE_OFFSET_FORSWIZZLEPATTERN_OUTPUT*      pOut) const
509     {
510         ADDR_NOT_IMPLEMENTED();
511         return ADDR_NOTSUPPORTED;
512     }
513 
HwlGetPreferredSurfaceSetting(const ADDR2_GET_PREFERRED_SURF_SETTING_INPUT * pIn,ADDR2_GET_PREFERRED_SURF_SETTING_OUTPUT * pOut)514     virtual ADDR_E_RETURNCODE HwlGetPreferredSurfaceSetting(
515         const ADDR2_GET_PREFERRED_SURF_SETTING_INPUT* pIn,
516         ADDR2_GET_PREFERRED_SURF_SETTING_OUTPUT*      pOut) const
517     {
518         ADDR_NOT_IMPLEMENTED();
519         return ADDR_NOTSUPPORTED;
520     }
521 
HwlComputeSurfaceInfoSanityCheck(const ADDR2_COMPUTE_SURFACE_INFO_INPUT * pIn)522     virtual ADDR_E_RETURNCODE HwlComputeSurfaceInfoSanityCheck(
523         const ADDR2_COMPUTE_SURFACE_INFO_INPUT* pIn) const
524     {
525         ADDR_NOT_IMPLEMENTED();
526         return ADDR_NOTSUPPORTED;
527     }
528 
HwlComputeSurfaceInfoTiled(const ADDR2_COMPUTE_SURFACE_INFO_INPUT * pIn,ADDR2_COMPUTE_SURFACE_INFO_OUTPUT * pOut)529     virtual ADDR_E_RETURNCODE HwlComputeSurfaceInfoTiled(
530          const ADDR2_COMPUTE_SURFACE_INFO_INPUT* pIn,
531          ADDR2_COMPUTE_SURFACE_INFO_OUTPUT*      pOut) const
532     {
533         ADDR_NOT_IMPLEMENTED();
534         return ADDR_NOTIMPLEMENTED;
535     }
536 
HwlComputeSurfaceInfoLinear(const ADDR2_COMPUTE_SURFACE_INFO_INPUT * pIn,ADDR2_COMPUTE_SURFACE_INFO_OUTPUT * pOut)537     virtual ADDR_E_RETURNCODE HwlComputeSurfaceInfoLinear(
538          const ADDR2_COMPUTE_SURFACE_INFO_INPUT* pIn,
539          ADDR2_COMPUTE_SURFACE_INFO_OUTPUT*      pOut) const
540     {
541         ADDR_NOT_IMPLEMENTED();
542         return ADDR_NOTIMPLEMENTED;
543     }
544 
HwlComputeSurfaceAddrFromCoordTiled(const ADDR2_COMPUTE_SURFACE_ADDRFROMCOORD_INPUT * pIn,ADDR2_COMPUTE_SURFACE_ADDRFROMCOORD_OUTPUT * pOut)545     virtual ADDR_E_RETURNCODE HwlComputeSurfaceAddrFromCoordTiled(
546         const ADDR2_COMPUTE_SURFACE_ADDRFROMCOORD_INPUT* pIn,
547         ADDR2_COMPUTE_SURFACE_ADDRFROMCOORD_OUTPUT*      pOut) const
548     {
549         ADDR_NOT_IMPLEMENTED();
550         return ADDR_NOTIMPLEMENTED;
551     }
552 
553     ADDR_E_RETURNCODE ComputeBlock256Equation(
554         AddrResourceType rsrcType,
555         AddrSwizzleMode swMode,
556         UINT_32 elementBytesLog2,
557         ADDR_EQUATION* pEquation) const;
558 
559     ADDR_E_RETURNCODE ComputeThinEquation(
560         AddrResourceType rsrcType,
561         AddrSwizzleMode swMode,
562         UINT_32 elementBytesLog2,
563         ADDR_EQUATION* pEquation) const;
564 
565     ADDR_E_RETURNCODE ComputeThickEquation(
566         AddrResourceType rsrcType,
567         AddrSwizzleMode swMode,
568         UINT_32 elementBytesLog2,
569         ADDR_EQUATION* pEquation) const;
570 
571     ADDR_E_RETURNCODE ComputeSurfaceInfoSanityCheck(
572         const ADDR2_COMPUTE_SURFACE_INFO_INPUT* pIn) const;
573 
574     ADDR_E_RETURNCODE ComputeSurfaceInfoLinear(
575         const ADDR2_COMPUTE_SURFACE_INFO_INPUT* pIn,
576         ADDR2_COMPUTE_SURFACE_INFO_OUTPUT*      pOut) const;
577 
578     ADDR_E_RETURNCODE ComputeSurfaceInfoTiled(
579         const ADDR2_COMPUTE_SURFACE_INFO_INPUT* pIn,
580         ADDR2_COMPUTE_SURFACE_INFO_OUTPUT*      pOut) const;
581 
582     ADDR_E_RETURNCODE ComputeSurfaceAddrFromCoordLinear(
583         const ADDR2_COMPUTE_SURFACE_ADDRFROMCOORD_INPUT* pIn,
584         ADDR2_COMPUTE_SURFACE_ADDRFROMCOORD_OUTPUT*      pOut) const;
585 
586     ADDR_E_RETURNCODE ComputeSurfaceAddrFromCoordTiled(
587         const ADDR2_COMPUTE_SURFACE_ADDRFROMCOORD_INPUT* pIn,
588         ADDR2_COMPUTE_SURFACE_ADDRFROMCOORD_OUTPUT*      pOut) const;
589 
590     ADDR_E_RETURNCODE ComputeSurfaceCoordFromAddrLinear(
591         const ADDR2_COMPUTE_SURFACE_COORDFROMADDR_INPUT* pIn,
592         ADDR2_COMPUTE_SURFACE_COORDFROMADDR_OUTPUT*      pOut) const;
593 
594     ADDR_E_RETURNCODE ComputeSurfaceCoordFromAddrTiled(
595         const ADDR2_COMPUTE_SURFACE_COORDFROMADDR_INPUT* pIn,
596         ADDR2_COMPUTE_SURFACE_COORDFROMADDR_OUTPUT*      pOut) const;
597 
598     UINT_32 ComputeSurface2DMicroBlockOffset(
599         const _ADDR2_COMPUTE_SURFACE_ADDRFROMCOORD_INPUT* pIn) const;
600 
601     UINT_32 ComputeSurface3DMicroBlockOffset(
602         const _ADDR2_COMPUTE_SURFACE_ADDRFROMCOORD_INPUT* pIn) const;
603 
604     // Misc
605     ADDR_E_RETURNCODE ComputeBlockDimensionForSurf(
606         UINT_32*         pWidth,
607         UINT_32*         pHeight,
608         UINT_32*         pDepth,
609         UINT_32          bpp,
610         UINT_32          numSamples,
611         AddrResourceType resourceType,
612         AddrSwizzleMode  swizzleMode) const;
613 
614     ADDR_E_RETURNCODE ComputeBlockDimension(
615         UINT_32*          pWidth,
616         UINT_32*          pHeight,
617         UINT_32*          pDepth,
618         UINT_32           bpp,
619         AddrResourceType  resourceType,
620         AddrSwizzleMode   swizzleMode) const;
621 
ComputePadSize(const Dim3d * pBlkDim,UINT_32 width,UINT_32 height,UINT_32 numSlices,Dim3d * pPadDim)622     static UINT_64 ComputePadSize(
623         const Dim3d*      pBlkDim,
624         UINT_32           width,
625         UINT_32           height,
626         UINT_32           numSlices,
627         Dim3d*            pPadDim)
628     {
629         pPadDim->w = PowTwoAlign(width ,pBlkDim->w);
630         pPadDim->h = PowTwoAlign(height ,pBlkDim->h);
631         pPadDim->d = PowTwoAlign(numSlices, pBlkDim->d);
632         return static_cast<UINT_64>(pPadDim->w) * pPadDim->h * pPadDim->d;
633     }
634 
635     static ADDR_E_RETURNCODE ExtractPipeBankXor(
636         UINT_32  pipeBankXor,
637         UINT_32  bankBits,
638         UINT_32  pipeBits,
639         UINT_32* pBankX,
640         UINT_32* pPipeX);
641 
Valid3DMipSliceIdConstraint(UINT_32 numSlices,UINT_32 mipId,UINT_32 slice)642     static BOOL_32 Valid3DMipSliceIdConstraint(
643         UINT_32 numSlices,
644         UINT_32 mipId,
645         UINT_32 slice)
646     {
647         return (Max((numSlices >> mipId), 1u) > slice);
648     }
649 
650     Dim3d GetMipTailDim(
651         AddrResourceType  resourceType,
652         AddrSwizzleMode   swizzleMode,
653         UINT_32           blockWidth,
654         UINT_32           blockHeight,
655         UINT_32           blockDepth) const;
656 
IsInMipTail(AddrResourceType resourceType,AddrSwizzleMode swizzleMode,Dim3d mipTailDim,UINT_32 width,UINT_32 height,UINT_32 depth)657     BOOL_32 IsInMipTail(
658         AddrResourceType  resourceType,
659         AddrSwizzleMode   swizzleMode,
660         Dim3d             mipTailDim,
661         UINT_32           width,
662         UINT_32           height,
663         UINT_32           depth) const
664     {
665         BOOL_32 inTail = ((width <= mipTailDim.w) &&
666                           (height <= mipTailDim.h) &&
667                           (IsThin(resourceType, swizzleMode) || (depth <= mipTailDim.d)));
668 
669         return inTail;
670     }
671 
IsLocalHeap(AddrResrouceLocation resourceType)672     static BOOL_32 IsLocalHeap(AddrResrouceLocation resourceType)
673     {
674         return ((resourceType == ADDR_RSRC_LOC_LOCAL) ||
675                 (resourceType == ADDR_RSRC_LOC_INVIS));
676     }
677 
IsInvisibleHeap(AddrResrouceLocation resourceType)678     static BOOL_32 IsInvisibleHeap(AddrResrouceLocation resourceType)
679     {
680         return (resourceType == ADDR_RSRC_LOC_INVIS);
681     }
682 
IsNonlocalHeap(AddrResrouceLocation resourceType)683     static BOOL_32 IsNonlocalHeap(AddrResrouceLocation resourceType)
684     {
685         return ((resourceType == ADDR_RSRC_LOC_USWC) ||
686                 (resourceType == ADDR_RSRC_LOC_CACHED));
687     }
688 
GetPipeLog2ForMetaAddressing(BOOL_32 pipeAligned,AddrSwizzleMode swizzleMode)689     UINT_32 GetPipeLog2ForMetaAddressing(BOOL_32 pipeAligned, AddrSwizzleMode swizzleMode) const
690     {
691         UINT_32 numPipeLog2 = pipeAligned ? Min(m_pipesLog2 + m_seLog2, 5u) : 0;
692 
693         if (IsXor(swizzleMode))
694         {
695             UINT_32 maxPipeLog2 = GetBlockSizeLog2(swizzleMode) - m_pipeInterleaveLog2;
696 
697             numPipeLog2 = Min(numPipeLog2, maxPipeLog2);
698         }
699 
700         return numPipeLog2;
701     }
702 
GetPipeNumForMetaAddressing(BOOL_32 pipeAligned,AddrSwizzleMode swizzleMode)703     UINT_32 GetPipeNumForMetaAddressing(BOOL_32 pipeAligned, AddrSwizzleMode swizzleMode) const
704     {
705         return (1 << GetPipeLog2ForMetaAddressing(pipeAligned, swizzleMode));
706     }
707 
VerifyMipLevelInfo(const ADDR2_COMPUTE_SURFACE_INFO_INPUT * pIn)708     VOID VerifyMipLevelInfo(const ADDR2_COMPUTE_SURFACE_INFO_INPUT* pIn) const
709     {
710 #if DEBUG
711         if (pIn->numMipLevels > 1)
712         {
713             UINT_32 actualMipLevels = 1;
714             switch (pIn->resourceType)
715             {
716                 case ADDR_RSRC_TEX_3D:
717                     // Fall through to share 2D case
718                     actualMipLevels = Max(actualMipLevels, Log2NonPow2(pIn->numSlices) + 1);
719                 case ADDR_RSRC_TEX_2D:
720                     // Fall through to share 1D case
721                     actualMipLevels = Max(actualMipLevels, Log2NonPow2(pIn->height) + 1);
722                 case ADDR_RSRC_TEX_1D:
723                     // Base 1D case
724                     actualMipLevels = Max(actualMipLevels, Log2NonPow2(pIn->width) + 1);
725                     break;
726                 default:
727                     ADDR_ASSERT_ALWAYS();
728                     break;
729             }
730             // Client pass wrong number of MipLevels to addrlib and result will be bad.
731             // Not sure if we should fail this calling instead of putting an assertion here.
732             ADDR_ASSERT(actualMipLevels >= pIn->numMipLevels);
733         }
734 #endif
735     }
736 
ApplyCustomerPipeBankXor(AddrSwizzleMode swizzleMode,UINT_32 pipeBankXor,UINT_32 bankBits,UINT_32 pipeBits,UINT_32 * pBlockOffset)737     ADDR_E_RETURNCODE ApplyCustomerPipeBankXor(
738         AddrSwizzleMode swizzleMode,
739         UINT_32         pipeBankXor,
740         UINT_32         bankBits,
741         UINT_32         pipeBits,
742         UINT_32*        pBlockOffset) const
743     {
744         ADDR_E_RETURNCODE returnCode = ADDR_OK;
745 
746         if (IsXor(swizzleMode))
747         {
748             // Apply driver set bankPipeXor
749             UINT_32 bankX = 0;
750             UINT_32 pipeX = 0;
751             returnCode = ExtractPipeBankXor(pipeBankXor, bankBits, pipeBits, &bankX, &pipeX);
752             *pBlockOffset ^= (pipeX << m_pipeInterleaveLog2);
753             *pBlockOffset ^= (bankX << (m_pipeInterleaveLog2 + pipeBits));
754         }
755 
756         return returnCode;
757     }
758 
759     UINT_32 GetPipeXorBits(UINT_32 macroBlockBits) const;
760     UINT_32 GetBankXorBits(UINT_32 macroBlockBits) const;
761 
762     ADDR_E_RETURNCODE ApplyCustomizedPitchHeight(
763         const ADDR2_COMPUTE_SURFACE_INFO_INPUT* pIn,
764         UINT_32                                 elementBytes,
765         UINT_32                                 pitchAlignInElement,
766         UINT_32*                                pPitch,
767         UINT_32*                                pHeight) const;
768 
769     VOID ComputeQbStereoInfo(ADDR2_COMPUTE_SURFACE_INFO_OUTPUT* pOut) const;
770 
771     UINT_32 m_se;                       ///< Number of shader engine
772     UINT_32 m_rbPerSe;                  ///< Number of render backend per shader engine
773     UINT_32 m_maxCompFrag;              ///< Number of max compressed fragment
774 
775     UINT_32 m_banksLog2;                ///< Number of bank Log2
776     UINT_32 m_pipesLog2;                ///< Number of pipe per shader engine Log2
777     UINT_32 m_seLog2;                   ///< Number of shader engine Log2
778     UINT_32 m_rbPerSeLog2;              ///< Number of render backend per shader engine Log2
779     UINT_32 m_maxCompFragLog2;          ///< Number of max compressed fragment Log2
780 
781     UINT_32 m_pipeInterleaveLog2;       ///< Log2 of pipe interleave bytes
782 
783     UINT_32 m_blockVarSizeLog2;         ///< Log2 of block var size
784 
785     SwizzleModeFlags m_swizzleModeTable[ADDR_SW_MAX_TYPE];  ///< Swizzle mode table
786 
787 private:
788     // Disallow the copy constructor
789     Lib(const Lib& a);
790 
791     // Disallow the assignment operator
792     Lib& operator=(const Lib& a);
793 };
794 
795 } // V2
796 } // Addr
797 
798 #endif
799 
800