1 /* SPDX-License-Identifier: GPL-2.0+ */ 2 /* 3 * (C) Copyright 2009 4 * Marvell Semiconductor <www.marvell.com> 5 * Prafulla Wadaskar <prafulla@marvell.com> 6 * 7 * (C) Copyright 2009 8 * Stefan Roese, DENX Software Engineering, sr@denx.de. 9 * 10 * (C) Copyright 2011-2012 11 * Holger Brunck, Keymile GmbH Hannover, holger.brunck@keymile.com 12 * Valentin Longchamp, Keymile AG, valentin.longchamp@keymile.com 13 */ 14 15 /* 16 * for linking errors see 17 * http://lists.denx.de/pipermail/u-boot/2009-July/057350.html 18 */ 19 20 #ifndef _CONFIG_KM_KIRKWOOD_H 21 #define _CONFIG_KM_KIRKWOOD_H 22 23 /* KM_KIRKWOOD */ 24 #if defined(CONFIG_KM_KIRKWOOD) 25 #define CONFIG_HOSTNAME "km_kirkwood" 26 #define CONFIG_KM_DISABLE_PCIE 27 #define CONFIG_KM_IVM_BUS 1 /* I2C2 (Mux-Port 1)*/ 28 29 /* KM_KIRKWOOD_PCI */ 30 #elif defined(CONFIG_KM_KIRKWOOD_PCI) 31 #define CONFIG_HOSTNAME "km_kirkwood_pci" 32 #define CONFIG_KM_IVM_BUS 1 /* I2C2 (Mux-Port 1)*/ 33 #define CONFIG_KM_FPGA_CONFIG 34 #define CONFIG_KM_UBI_PART_BOOT_OPTS ",2048" 35 #define CONFIG_SYS_NAND_NO_SUBPAGE_WRITE 36 37 /* KM_KIRKWOOD_128M16 */ 38 #elif defined(CONFIG_KM_KIRKWOOD_128M16) 39 #define CONFIG_HOSTNAME "km_kirkwood_128m16" 40 #undef CONFIG_SYS_KWD_CONFIG 41 #define CONFIG_SYS_KWD_CONFIG $(CONFIG_BOARDDIR)/kwbimage_128M16_1.cfg 42 #define CONFIG_KM_DISABLE_PCIE 43 #define CONFIG_KM_IVM_BUS 1 /* I2C2 (Mux-Port 1)*/ 44 45 /* KM_NUSA / KM_SUGP1 */ 46 #elif defined(CONFIG_KM_NUSA) || defined(CONFIG_KM_SUGP1) 47 #define CONFIG_KM_IVM_BUS 1 /* I2C2 (Mux-Port 1)*/ 48 49 # if defined(CONFIG_KM_NUSA) 50 #define CONFIG_HOSTNAME "kmnusa" 51 # elif defined(CONFIG_KM_SUGP1) 52 #define CONFIG_HOSTNAME "kmsugp1" 53 #define KM_PCIE_RESET_MPP7 54 #endif 55 56 #undef CONFIG_SYS_KWD_CONFIG 57 #define CONFIG_SYS_KWD_CONFIG $(CONFIG_BOARDDIR)/kwbimage_128M16_1.cfg 58 #define CONFIG_KM_ENV_IS_IN_SPI_NOR 59 #define CONFIG_KM_FPGA_CONFIG 60 #define CONFIG_KM_PIGGY4_88E6352 61 #define CONFIG_MV88E6352_SWITCH 62 #define CONFIG_KM_MVEXTSW_ADDR 0x10 63 64 /* KM_MGCOGE3UN */ 65 #elif defined(CONFIG_KM_MGCOGE3UN) 66 #define CONFIG_HOSTNAME "mgcoge3un" 67 #define CONFIG_KM_IVM_BUS 1 /* I2C2 (Mux-Port 1)*/ 68 #undef CONFIG_SYS_KWD_CONFIG 69 #define CONFIG_SYS_KWD_CONFIG $(CONFIG_BOARDDIR)/kwbimage-memphis.cfg 70 #define CONFIG_KM_BOARD_EXTRA_ENV "waitforne=true\0" 71 #define CONFIG_PIGGY_MAC_ADRESS_OFFSET 3 72 #define CONFIG_KM_DISABLE_PCIE 73 #define CONFIG_KM_PIGGY4_88E6061 74 75 /* KMCOGE5UN */ 76 #elif defined(CONFIG_KM_COGE5UN) 77 #define CONFIG_KM_IVM_BUS 1 /* I2C2 (Mux-Port 1)*/ 78 #undef CONFIG_SYS_KWD_CONFIG 79 #define CONFIG_SYS_KWD_CONFIG $(CONFIG_BOARDDIR)/kwbimage_256M8_1.cfg 80 #define CONFIG_KM_ENV_IS_IN_SPI_NOR 81 #define CONFIG_PIGGY_MAC_ADRESS_OFFSET 3 82 #define CONFIG_HOSTNAME "kmcoge5un" 83 #define CONFIG_KM_DISABLE_PCIE 84 #define CONFIG_KM_PIGGY4_88E6352 85 86 /* KM_PORTL2 */ 87 #elif defined(CONFIG_KM_PORTL2) 88 #define CONFIG_HOSTNAME "portl2" 89 #define CONFIG_KM_IVM_BUS 1 /* I2C2 (Mux-Port 1)*/ 90 #define CONFIG_KM_PIGGY4_88E6061 91 92 /* KM_SUV31 */ 93 #elif defined(CONFIG_KM_SUV31) 94 #define CONFIG_KM_IVM_BUS 1 /* I2C2 (Mux-Port 1)*/ 95 #define CONFIG_HOSTNAME "kmsuv31" 96 #undef CONFIG_SYS_KWD_CONFIG 97 #define CONFIG_SYS_KWD_CONFIG $(CONFIG_BOARDDIR)/kwbimage_128M16_1.cfg 98 #define CONFIG_KM_ENV_IS_IN_SPI_NOR 99 #define CONFIG_KM_FPGA_CONFIG 100 #define CONFIG_KM_UBI_PART_BOOT_OPTS ",2048" 101 #define CONFIG_SYS_NAND_NO_SUBPAGE_WRITE 102 #else 103 #error ("Board unsupported") 104 #endif 105 106 /* include common defines/options for all arm based Keymile boards */ 107 #include "km/km_arm.h" 108 109 #if defined(CONFIG_KM_PIGGY4_88E6352) 110 /* 111 * Some keymile boards like mgcoge5un & nusa1 have their PIGGY4 connected via 112 * an Marvell 88E6352 simple switch. 113 * In this case we have to change the default settings for the etherent mac. 114 * There is NO ethernet phy. The ARM and Switch are conencted directly over 115 * RGMII in MAC-MAC mode 116 * In this case 1GBit full duplex and autoneg off 117 */ 118 #define PORT_SERIAL_CONTROL_VALUE ( \ 119 MVGBE_FORCE_LINK_PASS | \ 120 MVGBE_DIS_AUTO_NEG_FOR_DUPLX | \ 121 MVGBE_DIS_AUTO_NEG_FOR_FLOW_CTRL | \ 122 MVGBE_ADV_NO_FLOW_CTRL | \ 123 MVGBE_FORCE_FC_MODE_NO_PAUSE_DIS_TX | \ 124 MVGBE_FORCE_BP_MODE_NO_JAM | \ 125 (1 << 9) /* Reserved bit has to be 1 */ | \ 126 MVGBE_DO_NOT_FORCE_LINK_FAIL | \ 127 MVGBE_DIS_AUTO_NEG_SPEED_GMII | \ 128 MVGBE_DTE_ADV_0 | \ 129 MVGBE_MIIPHY_MAC_MODE | \ 130 MVGBE_AUTO_NEG_NO_CHANGE | \ 131 MVGBE_MAX_RX_PACKET_1552BYTE | \ 132 MVGBE_CLR_EXT_LOOPBACK | \ 133 MVGBE_SET_FULL_DUPLEX_MODE | \ 134 MVGBE_EN_FLOW_CTRL_TX_RX_IN_FULL_DUPLEX |\ 135 MVGBE_SET_GMII_SPEED_TO_1000 |\ 136 MVGBE_SET_MII_SPEED_TO_100) 137 138 #endif 139 140 #ifdef CONFIG_KM_PIGGY4_88E6061 141 /* 142 * Some keymile boards like mgcoge3un have their PIGGY4 connected via 143 * an Marvell 88E6061 simple switch. 144 * In this case we have to change the default settings for the 145 * ethernet phy connected to the kirkwood. 146 * In this case 100MB full duplex and autoneg off 147 */ 148 #define PORT_SERIAL_CONTROL_VALUE ( \ 149 MVGBE_FORCE_LINK_PASS | \ 150 MVGBE_DIS_AUTO_NEG_FOR_DUPLX | \ 151 MVGBE_DIS_AUTO_NEG_FOR_FLOW_CTRL | \ 152 MVGBE_ADV_NO_FLOW_CTRL | \ 153 MVGBE_FORCE_FC_MODE_NO_PAUSE_DIS_TX | \ 154 MVGBE_FORCE_BP_MODE_NO_JAM | \ 155 (1 << 9) /* Reserved bit has to be 1 */ | \ 156 MVGBE_DO_NOT_FORCE_LINK_FAIL | \ 157 MVGBE_DIS_AUTO_NEG_SPEED_GMII | \ 158 MVGBE_DTE_ADV_0 | \ 159 MVGBE_MIIPHY_MAC_MODE | \ 160 MVGBE_AUTO_NEG_NO_CHANGE | \ 161 MVGBE_MAX_RX_PACKET_1552BYTE | \ 162 MVGBE_CLR_EXT_LOOPBACK | \ 163 MVGBE_SET_FULL_DUPLEX_MODE | \ 164 MVGBE_DIS_FLOW_CTRL_TX_RX_IN_FULL_DUPLEX |\ 165 MVGBE_SET_GMII_SPEED_TO_10_100 |\ 166 MVGBE_SET_MII_SPEED_TO_100) 167 #endif 168 169 #ifdef CONFIG_KM_DISABLE_PCI 170 #undef CONFIG_KIRKWOOD_PCIE_INIT 171 #endif 172 173 #endif /* _CONFIG_KM_KIRKWOOD */ 174